[PATCH/RFA] Include sh64 support for shle-*-netbsdelf*

[PATCH/RFA] Include sh64 support for shle-*-netbsdelf*

[Jason R Thorpe]

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sh64 support is already present for sh-*-netbsdelf*, but shle-*-netbsdelf*
was apparently missed when this was added.

This patch is necessary in order to build GDB for shle-*-netbsdelf*, now
that sh64 support has been added to GDB.

OK to commit?

bfd:
	* config.bfd (shle-*-netbsdelf*): Add target which includes
	sh64 support.

opcodes:
	* configure.in (shle-*-*elf*): Include sh64 support.
	* configure: Regenerate.

-- 
        -- Jason R. Thorpe <thorpej@wasabisystems.com>

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Index: bfd/config.bfd
===================================================================
RCS file: /cvs/src/src/bfd/config.bfd,v
retrieving revision 1.89
diff -u -r1.89 config.bfd
--- bfd/config.bfd	11 May 2002 09:10:14 -0000	1.89
+++ bfd/config.bfd	11 May 2002 18:42:46 -0000
@@ -879,6 +879,13 @@
     targ_defvec=bfd_elf32_shlin_vec
     ;;
 
+  shle-*-netbsdelf*)
+    targ_defvec=bfd_elf32_shlnbsd_vec
+    targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"
+#ifdef BFD64
+    targ_selvecs="${targ_selvecs} bfd_elf32_sh64_vec bfd_elf32_sh64l_vec bfd_elf64_sh64_vec bfd_elf64_sh64l_vec"
+#endif
+    ;;
   sh*le-*-netbsdelf*)
     targ_defvec=bfd_elf32_shlnbsd_vec
     targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"
Index: opcodes/configure.in
===================================================================
RCS file: /cvs/src/src/opcodes/configure.in,v
retrieving revision 1.34
diff -u -r1.34 configure.in
--- opcodes/configure.in	24 Apr 2002 09:01:46 -0000	1.34
+++ opcodes/configure.in	11 May 2002 18:42:46 -0000
@@ -215,7 +215,8 @@
 	  # Include it just for ELF targets, since the SH5 bfd:s are ELF only.
 	  for t in $target $canon_targets; do
 	    case $t in
-	      all |  sh64-* | sh-*-*elf* | shl-*-*elf* | sh-*-linux* | shl-*-linux*)
+	      all |  sh64-* | sh-*-*elf* | shl-*-*elf* | shle-*-*elf* | \
+	      sh-*-linux* | shl-*-linux*)
 				ta="$ta sh64-dis.lo sh64-opc.lo"
 				archdefs="$archdefs -DINCLUDE_SHMEDIA"
 				break;;

Re: [PATCH/RFA] Include sh64 support for shle-*-netbsdelf*

[Nick Clifton]

Hi Jason,

> sh64 support is already present for sh-*-netbsdelf*, but shle-*-netbsdelf*
> was apparently missed when this was added.
> 
> This patch is necessary in order to build GDB for shle-*-netbsdelf*, now
> that sh64 support has been added to GDB.
> 
> OK to commit?
> 
> bfd:
> 	* config.bfd (shle-*-netbsdelf*): Add target which includes
> 	sh64 support.

See below,

> opcodes:
> 	* configure.in (shle-*-*elf*): Include sh64 support.
> 	* configure: Regenerate.

Approved - please apply.


> Index: bfd/config.bfd
> ===================================================================
> RCS file: /cvs/src/src/bfd/config.bfd,v
> retrieving revision 1.89
> diff -u -r1.89 config.bfd
> --- bfd/config.bfd	11 May 2002 09:10:14 -0000	1.89
> +++ bfd/config.bfd	11 May 2002 18:42:46 -0000
> @@ -879,6 +879,13 @@
>      targ_defvec=bfd_elf32_shlin_vec
>      ;;
>  
> +  shle-*-netbsdelf*)
> +    targ_defvec=bfd_elf32_shlnbsd_vec
> +    targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"
> +#ifdef BFD64
> +    targ_selvecs="${targ_selvecs} bfd_elf32_sh64_vec bfd_elf32_sh64l_vec bfd_elf64_sh64_vec bfd_elf64_sh64l_vec"
> +#endif
> +    ;;
>    sh*le-*-netbsdelf*)
>      targ_defvec=bfd_elf32_shlnbsd_vec
>      targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"

Doesn't the "sh*le-*-netbsdelf*" target (immediately below the lines
you have added) already cover this situation ?

Cheers
        Nick

Re: [PATCH/RFA] Include sh64 support for shle-*-netbsdelf*

[Jason R Thorpe]

On Mon, May 13, 2002 at 09:48:26AM +0100, Nick Clifton wrote:

 > > +  shle-*-netbsdelf*)
 > > +    targ_defvec=bfd_elf32_shlnbsd_vec
 > > +    targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"
 > > +#ifdef BFD64
 > > +    targ_selvecs="${targ_selvecs} bfd_elf32_sh64_vec bfd_elf32_sh64l_vec bfd_elf64_sh64_vec bfd_elf64_sh64l_vec"
 > > +#endif
 > > +    ;;
 > >    sh*le-*-netbsdelf*)
 > >      targ_defvec=bfd_elf32_shlnbsd_vec
 > >      targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"
 > 
 > Doesn't the "sh*le-*-netbsdelf*" target (immediately below the lines
 > you have added) already cover this situation ?

It appears as if the intent in other configurations was to include sh64
support only if the target was "sh", not "sh3" or "sh4", etc.  Look down
one and two more, and you see the sh-*-netbsdelf* (added by hp when the
sh64 code went in) and the sh*-*-netbsdelf* (added by me when I checked
in NetBSD SH support) configs.

-- 
        -- Jason R. Thorpe <thorpej@wasabisystems.com>

Re: [PATCH/RFA] Include sh64 support for shle-*-netbsdelf*

[Nick Clifton]

Hi Jason,

>  > > +  shle-*-netbsdelf*)
>  > > +    targ_defvec=bfd_elf32_shlnbsd_vec
>  > > +    targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"
>  > > +#ifdef BFD64
>  > > +    targ_selvecs="${targ_selvecs} bfd_elf32_sh64_vec bfd_elf32_sh64l_vec bfd_elf64_sh64_vec bfd_elf64_sh64l_vec"
>  > > +#endif
>  > > +    ;;
>  > >    sh*le-*-netbsdelf*)
>  > >      targ_defvec=bfd_elf32_shlnbsd_vec
>  > >      targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"
>  > 
>  > Doesn't the "sh*le-*-netbsdelf*" target (immediately below the lines
>  > you have added) already cover this situation ?
> 
> It appears as if the intent in other configurations was to include sh64
> support only if the target was "sh", not "sh3" or "sh4", etc.  Look down
> one and two more, and you see the sh-*-netbsdelf* (added by hp when the
> sh64 code went in) and the sh*-*-netbsdelf* (added by me when I checked
> in NetBSD SH support) configs.

Oh right, I understand now.  In which case please consider this part
of the patch approved too.

Cheers
        Nick

Re: [PATCH/RFA] Include sh64 support for shle-*-netbsdelf*

[Jason R Thorpe]

On Mon, May 13, 2002 at 05:10:27PM -0400, Elena Zannoni wrote:

 > Wouldn't the same change be required to build sh*le-*-netbdself* ?
 > The tdep gdb file is going to be built for all the sh targets. And that file
 > requires the sh64 disassembly functions.

Yah, probably.  I've only been confiugring as sh-netbsdelf and shle-netbsdelf
(since that is what the NetBSD OS build framework generally uses).

 > Even the sh coff targets will require the sh64 stuff. :-(

Sigh.  Maybe the sh64 stuff should be split out a bit more?

-- 
        -- Jason R. Thorpe <thorpej@wasabisystems.com>

Re: [PATCH/RFA] Include sh64 support for shle-*-netbsdelf*

[Elena Zannoni]

Nick Clifton writes:
 > Hi Jason,
 > 
 > >  > > +  shle-*-netbsdelf*)
 > >  > > +    targ_defvec=bfd_elf32_shlnbsd_vec
 > >  > > +    targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"
 > >  > > +#ifdef BFD64
 > >  > > +    targ_selvecs="${targ_selvecs} bfd_elf32_sh64_vec bfd_elf32_sh64l_vec bfd_elf64_sh64_vec bfd_elf64_sh64l_vec"
 > >  > > +#endif
 > >  > > +    ;;
 > >  > >    sh*le-*-netbsdelf*)
 > >  > >      targ_defvec=bfd_elf32_shlnbsd_vec
 > >  > >      targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"
 > >  > 
 > >  > Doesn't the "sh*le-*-netbsdelf*" target (immediately below the lines
 > >  > you have added) already cover this situation ?
 > > 
 > > It appears as if the intent in other configurations was to include sh64
 > > support only if the target was "sh", not "sh3" or "sh4", etc.  Look down
 > > one and two more, and you see the sh-*-netbsdelf* (added by hp when the
 > > sh64 code went in) and the sh*-*-netbsdelf* (added by me when I checked
 > > in NetBSD SH support) configs.
 > 
 > Oh right, I understand now.  In which case please consider this part
 > of the patch approved too.
 > 

Wouldn't the same change be required to build sh*le-*-netbdself* ?
The tdep gdb file is going to be built for all the sh targets. And that file
requires the sh64 disassembly functions.
Even the sh coff targets will require the sh64 stuff. :-(

Elena


 > Cheers
 >         Nick

Re: [PATCH/RFA] Include sh64 support for shle-*-netbsdelf*

[Elena Zannoni]

Jason R Thorpe writes:
 > On Mon, May 13, 2002 at 05:10:27PM -0400, Elena Zannoni wrote:
 > 
 >  > Wouldn't the same change be required to build sh*le-*-netbdself* ?
 >  > The tdep gdb file is going to be built for all the sh targets. And that file
 >  > requires the sh64 disassembly functions.
 > 
 > Yah, probably.  I've only been confiugring as sh-netbsdelf and shle-netbsdelf
 > (since that is what the NetBSD OS build framework generally uses).
 > 

Yes, that's the same thing I did. I am going to drop the sh-hms target
in gdb.  From the gdb point of view is just the same as the sh-elf
target.

 >  > Even the sh coff targets will require the sh64 stuff. :-(
 > 
 > Sigh.  Maybe the sh64 stuff should be split out a bit more?
 > 

I would suggest going the opposite direction. :-) Just unify everything as
much as possible, like gdb does. Just have a sh* target and be done
with it. Netbsd already builds elf and coff bfd targets together anyway.
Having 12 bfd sh targets seems confusing to me.

I think the main problem is that the sh disassembly interface is not
offering a single entry point. I think I'll write a wrapper.

Elena


 > -- 
 >         -- Jason R. Thorpe <thorpej@wasabisystems.com>

Re: [PATCH/RFA] Include sh64 support for shle-*-netbsdelf*

[Nick Clifton]

Hi Elena,

> > +  shle-*-netbsdelf*)
> > +    targ_defvec=bfd_elf32_shlnbsd_vec
> > +    targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"
> > +#ifdef BFD64
> > +    targ_selvecs="${targ_selvecs} bfd_elf32_sh64_vec bfd_elf32_sh64l_vec bfd_elf64_sh64_vec bfd_elf64_sh64l_vec"
> > +#endif
> > +    ;;
> >    sh*le-*-netbsdelf*)
> >      targ_defvec=bfd_elf32_shlnbsd_vec
> >      targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"

> Wouldn't the same change be required to build sh*le-*-netbdself* ?

Err, no.  I think that Jason's point was that support for the SH64
architecture was only desireable if the configure target was "sh" and
not "sh3" or "sh4".  Presumably "sh" is intended to mean "any SH
processor" whereas "sh3" means "only the SH3 processor".

> The tdep gdb file is going to be built for all the sh targets. And
> that file requires the sh64 disassembly functions.

In which case there may well be a problem.  As it stands configuring
BFD as, eg, sh3-elf will not bring in the sh64 architecture or
disassembly functions.  Can the tdep file be made conditional on the
SH architecture specified on the configure command line ?

Cheers
        Nick

Re: [PATCH/RFA] Include sh64 support for shle-*-netbsdelf*

[Elena Zannoni]

Nick Clifton writes:
 > Hi Elena,
 > 
 > > > +  shle-*-netbsdelf*)
 > > > +    targ_defvec=bfd_elf32_shlnbsd_vec
 > > > +    targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"
 > > > +#ifdef BFD64
 > > > +    targ_selvecs="${targ_selvecs} bfd_elf32_sh64_vec bfd_elf32_sh64l_vec bfd_elf64_sh64_vec bfd_elf64_sh64l_vec"
 > > > +#endif
 > > > +    ;;
 > > >    sh*le-*-netbsdelf*)
 > > >      targ_defvec=bfd_elf32_shlnbsd_vec
 > > >      targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"
 > 
 > > Wouldn't the same change be required to build sh*le-*-netbdself* ?
 > 
 > Err, no.  I think that Jason's point was that support for the SH64
 > architecture was only desireable if the configure target was "sh" and
 > not "sh3" or "sh4".  Presumably "sh" is intended to mean "any SH
 > processor" whereas "sh3" means "only the SH3 processor".

Yes, I realized that.

 > 
 > > The tdep gdb file is going to be built for all the sh targets. And
 > > that file requires the sh64 disassembly functions.
 > 
 > In which case there may well be a problem.  As it stands configuring
 > BFD as, eg, sh3-elf will not bring in the sh64 architecture or
 > disassembly functions.  Can the tdep file be made conditional on the
 > SH architecture specified on the configure command line ?
 > 

No, it wouldn't be accepted. We are going towards unifying all the
targets for a given architecture, so that we can switch at runtime
with multiarch.  I mean, it is not technically impossible, but it is
philosophically inconsistent with where gdb is going nowadays. We are
even going to build multiple architectures together, like sh and ppc,
in a single executable.  As a matter of fact I had such defines when I
first submitted the port, and I removed them.

Elena


 > Cheers
 >         Nick

Re: [PATCH/RFA] Include sh64 support for shle-*-netbsdelf*

[Nick Clifton]

Hi Elena,

>  > > The tdep gdb file is going to be built for all the sh targets. And
>  > > that file requires the sh64 disassembly functions.
>  > 
>  > In which case there may well be a problem.  As it stands configuring
>  > BFD as, eg, sh3-elf will not bring in the sh64 architecture or
>  > disassembly functions.  Can the tdep file be made conditional on the
>  > SH architecture specified on the configure command line ?
>  > 
> 
> No, it wouldn't be accepted. We are going towards unifying all the
> targets for a given architecture, so that we can switch at runtime
> with multiarch.  I mean, it is not technically impossible, but it is
> philosophically inconsistent with where gdb is going nowadays. We are
> even going to build multiple architectures together, like sh and ppc,
> in a single executable.  As a matter of fact I had such defines when I
> first submitted the port, and I removed them.

Hmm, OK - in which case would it be acceptable to say that in order to
obtain GDB support an SH toolchain should be configured as "sh-elf"
and not "sh3-elf" even if the intended default processor is the SH3 ?
ie that configurations such as "sh3-elf" are becoming obsolete and
will one day be removed ?

Cheers
        Nick

Re: [PATCH/RFA] Include sh64 support for shle-*-netbsdelf*

[Elena Zannoni]

Nick Clifton writes:
 > Hi Elena,
 > 
 > >  > > The tdep gdb file is going to be built for all the sh targets. And
 > >  > > that file requires the sh64 disassembly functions.
 > >  > 
 > >  > In which case there may well be a problem.  As it stands configuring
 > >  > BFD as, eg, sh3-elf will not bring in the sh64 architecture or
 > >  > disassembly functions.  Can the tdep file be made conditional on the
 > >  > SH architecture specified on the configure command line ?
 > >  > 
 > > 
 > > No, it wouldn't be accepted. We are going towards unifying all the
 > > targets for a given architecture, so that we can switch at runtime
 > > with multiarch.  I mean, it is not technically impossible, but it is
 > > philosophically inconsistent with where gdb is going nowadays. We are
 > > even going to build multiple architectures together, like sh and ppc,
 > > in a single executable.  As a matter of fact I had such defines when I
 > > first submitted the port, and I removed them.
 > 
 > Hmm, OK - in which case would it be acceptable to say that in order to
 > obtain GDB support an SH toolchain should be configured as "sh-elf"
 > and not "sh3-elf" even if the intended default processor is the SH3 ?
 > ie that configurations such as "sh3-elf" are becoming obsolete and
 > will one day be removed ?
 > 

Yes, kind of. The sh3-elf support (for instance) is in there, together
with all the rest.  sh-elf gets you the whole shebang, in theory. Gdb gets the
list of available architectures from bfd:

(gdb) set architecture 
Requires an argument. Valid arguments are sh, sh2, sh-dsp, sh3, sh3-dsp, sh3e, sh4, sh5, auto.

Now, this happens in theory only, because the sh5 disassembly support
is not always integrated.  So if you configure with sh3-elf at the
moment, gdb tries to build *everything*, treating it just like
sh-elf. But the build will barf because of the disassembly function.
(never mind that at present I forgot to add a sh* target, I'll do it now).

To be even clearer, the real problem is the disassembly function interface.
Right now gdb does this (more or less):

if (machine is sh5)
{
  if (target is big endian)
     call print_insn_sh64()
  else
     call print_insn_sh64l()
}
else
{
  if (target is big endian)
     call print_insn_sh()
  else
     call print_insn_shl()
}

It shouldn't. It should just call a print_insn_sh() function that
based on the contents of the info parameter decides what to do.
I.e., the opcodes/sh-dis.c should have something like this:

int
print_insn_sh (memaddr, info)
     bfd_vma memaddr;
     struct disassemble_info *info;
{
  int r;

  if (info->mach == bfd_mach_sh5)
    {
      if (info->endian == BFD_ENDIAN_LITTLE)
	r = print_insn_sh64_little (memaddr, info);
      else
	r = print_insn_sh64_big (memaddr, info);
    }
  else
    {
      if (info->endian == BFD_ENDIAN_LITTLE)
	r = print_insn_sh_little (memaddr, info);
      else
	r = print_insn_sh_big (memaddr, info);
    }

  return r;
}

opcodes/disassemble.c should also use this generic 'wrapper' like most
of the other targets do, instead of using the INCLUDE_SHMEDIA macro.

This way the interface into the disassembler would just be one function.
Right now there are a lot of sh disassembly functions:

extern int print_insn_sh64		PARAMS ((bfd_vma, disassemble_info *));
extern int print_insn_sh64l		PARAMS ((bfd_vma, disassemble_info *));
extern int print_insn_sh64x_media	PARAMS ((bfd_vma, disassemble_info *));
extern int print_insn_sh		PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_shl		PARAMS ((bfd_vma, disassemble_info*));


Elena

Re: [PATCH/RFA] Include sh64 support for shle-*-netbsdelf*

[Alexandre Oliva]

On May 14, 2002, Nick Clifton <nickc@cambridge.redhat.com> wrote:

> Hi Elena,

[snip]
>> No, it wouldn't be accepted. We are going towards unifying all the
>> targets for a given architecture, so that we can switch at runtime
>> with multiarch.

> Hmm, OK - in which case would it be acceptable to say that in order to
> obtain GDB support an SH toolchain should be configured as "sh-elf"
> and not "sh3-elf" even if the intended default processor is the SH3 ?
> ie that configurations such as "sh3-elf" are becoming obsolete and
> will one day be removed ?

This would be a bad idea.  Consider, for example, sh3-linux-gnu, where
you *really* have to configure at least glibc with sh3-linux-gnu
(because glibc can't be multilibbed).  Ideally, you should be able to
configure everything with the same triplet.

It wouldn't be the end of the world if glibc required a different
configure triplet, but I guess the GNU/Linux/SH folks would be annoyed
if they couldn't have a config.guess that was enough to build all of
their tools.  I.e., at least sh3-*-linux-gnu should remain supported
by GDB.

Not that care strongly whether sh3-linux-gnu includes SH64 bits or
not; I just thought I'd point this out before we take a step before
realizing one of the consequences.

I still have the impression that having the GDB SH configuration
forcibly bring in SH64 bits too is not the right way to do
multi-arching.  OTOH, it's not like I know much about multi-arching
anyway, but in my conception of a perfect world, it would be possible
to enable or disable SH64 support independently from SH support, just
like it would be nice to be able to, say, strip out the Thumb-support
bits from an ARM-targeted toolchain, when you won't ever want to use
it with Thumb-capable processors.

But then, the only justifications for this feature would be toolchain
build time and size, hardly an issue these days.  It's not like
stripping bits out would benefit the toolchain performance.  But then,
why don't we always --enable-targets=all?

Yeah, it's clear I'm confused.  I almost deleted this message before
posting it, but I ended up deciding to post it.  Hope it can at least
get us all on the same page :-)

Cheers,

-- 
Alexandre Oliva   Enjoy Guarana', see http://www.ic.unicamp.br/~oliva/
Red Hat GCC Developer                  aoliva@{cygnus.com, redhat.com}
CS PhD student at IC-Unicamp        oliva@{lsd.ic.unicamp.br, gnu.org}
Free Software Evangelist                Professional serial bug killer

Re: [PATCH/RFA] Include sh64 support for shle-*-netbsdelf*

[Elena Zannoni]

Alexandre Oliva writes:
 > On May 14, 2002, Nick Clifton <nickc@cambridge.redhat.com> wrote:
 > 
 > > Hi Elena,
 > 
 > [snip]
 > >> No, it wouldn't be accepted. We are going towards unifying all the
 > >> targets for a given architecture, so that we can switch at runtime
 > >> with multiarch.
 > 
 > > Hmm, OK - in which case would it be acceptable to say that in order to
 > > obtain GDB support an SH toolchain should be configured as "sh-elf"
 > > and not "sh3-elf" even if the intended default processor is the SH3 ?
 > > ie that configurations such as "sh3-elf" are becoming obsolete and
 > > will one day be removed ?
 > 
 > This would be a bad idea.  Consider, for example, sh3-linux-gnu, where
 > you *really* have to configure at least glibc with sh3-linux-gnu
 > (because glibc can't be multilibbed).  Ideally, you should be able to
 > configure everything with the same triplet.
 > 
 > It wouldn't be the end of the world if glibc required a different
 > configure triplet, but I guess the GNU/Linux/SH folks would be annoyed
 > if they couldn't have a config.guess that was enough to build all of
 > their tools.  I.e., at least sh3-*-linux-gnu should remain supported
 > by GDB.
 > 

Ah, actually at the moment there is just sh-*-linux*.  I think it is
just a configury oversight.  JasonT added sh*-*-netbsdelf* for
instance, which should catch all the instances. I think there should
be a corresponding sh*-*-linux*.
Groan, how many other is gdb missing?


 > Not that care strongly whether sh3-linux-gnu includes SH64 bits or
 > not; I just thought I'd point this out before we take a step before
 > realizing one of the consequences.
 > 
 > I still have the impression that having the GDB SH configuration
 > forcibly bring in SH64 bits too is not the right way to do
 > multi-arching.  OTOH, it's not like I know much about multi-arching
 > anyway, but in my conception of a perfect world, it would be possible
 > to enable or disable SH64 support independently from SH support, just
 > like it would be nice to be able to, say, strip out the Thumb-support
 > bits from an ARM-targeted toolchain, when you won't ever want to use
 > it with Thumb-capable processors.
 > 

Have a look at:
http://sources.redhat.com/gdb/papers/multi-arch

 > But then, the only justifications for this feature would be toolchain
 > build time and size, hardly an issue these days.  It's not like
 > stripping bits out would benefit the toolchain performance.  But then,
 > why don't we always --enable-targets=all?
 > 

This is where we (can't take credit here, actually, it's mostly
Andrew) are taking gdb. Andrew has built a gdb which inlcuded 2
completely different architectures. I believe it was mn10300 and d10v.
There needs to be some more (a lot more) gdb internals cleanup, but
that will be true multiarch. Probably building all the targets would
be a bit too much, in practice, but it would become possible to
combine any of the architectures.


 > Yeah, it's clear I'm confused.  I almost deleted this message before
 > posting it, but I ended up deciding to post it.  Hope it can at least
 > get us all on the same page :-)
 > 

I think these exchanges are really really useful, actually.


Elena


 > Cheers,
 > 
 > -- 
 > Alexandre Oliva   Enjoy Guarana', see http://www.ic.unicamp.br/~oliva/
 > Red Hat GCC Developer                  aoliva@{cygnus.com, redhat.com}
 > CS PhD student at IC-Unicamp        oliva@{lsd.ic.unicamp.br, gnu.org}
 > Free Software Evangelist                Professional serial bug killer

Re: [PATCH/RFA] Include sh64 support for shle-*-netbsdelf*

[Daniel Jacobowitz]

On Tue, May 14, 2002 at 12:19:31PM -0300, Alexandre Oliva wrote:
> On May 14, 2002, Nick Clifton <nickc@cambridge.redhat.com> wrote:
> 
> > Hi Elena,
> 
> [snip]
> >> No, it wouldn't be accepted. We are going towards unifying all the
> >> targets for a given architecture, so that we can switch at runtime
> >> with multiarch.
> 
> > Hmm, OK - in which case would it be acceptable to say that in order to
> > obtain GDB support an SH toolchain should be configured as "sh-elf"
> > and not "sh3-elf" even if the intended default processor is the SH3 ?
> > ie that configurations such as "sh3-elf" are becoming obsolete and
> > will one day be removed ?
> 
> This would be a bad idea.  Consider, for example, sh3-linux-gnu, where
> you *really* have to configure at least glibc with sh3-linux-gnu
> (because glibc can't be multilibbed).  Ideally, you should be able to
> configure everything with the same triplet.
> 
> It wouldn't be the end of the world if glibc required a different
> configure triplet, but I guess the GNU/Linux/SH folks would be annoyed
> if they couldn't have a config.guess that was enough to build all of
> their tools.  I.e., at least sh3-*-linux-gnu should remain supported
> by GDB.

Actually, since we already need to build most userland programs as
sh-*-linux-gnu, it doesn't really matter.  Just treat GDB as an
application instead of a tool.  This is needed because of the long
history of indecision on what the SH targets should be called; the only
one routinely supported by config.* versions in existing packages is
sh-.

-- 
Daniel Jacobowitz                           Carnegie Mellon University
MontaVista Software                         Debian GNU/Linux Developer

print_insn_sh cleanup

[Joern Rennecke]

[-- Attachment #1: Type: text/plain, Size: 704 bytes --]

Elena Zannoni wrote:
> We still need a gdb_print_insn_sh function, because the user can
> set the target endiannes from the command line overwriting the architecture
> endiannes.
> So we need to leave in there the check of the TARGET_BYTE_ORDER.
> I think something like this:
> gdb_print_insn_sh (bfd_vma address, disassemble_info *info)
> {
>  if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
>     BFD_ENDIAN_BIG;
>  else
>    info->endian = BFD_ENDIAN_LITTLE;
>  return print_insn_sh (address, info);
> }

I have used
info->endian = TARGET_BYTE_ORDER;
I hope there isn't any hidden problem with that.

-- 
--------------------------
SuperH
2430 Aztec West / Almondsbury / BRISTOL / BS32 4AQ
T:+44 1454 462330

[-- Attachment #2: print-insn-sh-patch-2 --]
[-- Type: text/plain, Size: 13579 bytes --]

Fri May 17 13:30:50 2002  J"orn Rennecke <joern.rennecke@superh.com>

include:
	* dis-asm.h (print_insn_shl, print_insn_sh64l): Remove prototype.
gdb:
	* sh-tdep.c (gdb_print_insn_sh64): Delete.
	(gdb_print_insn_sh): Just set info->endian and use print_insn_sh.
	(sh_gdbarch_init): Always use gdb_print_insn_sh.
opcodes:
	* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
	* sh-dis.c (LITTLE_BIT): Delete.
	(print_insn_sh, print_insn_shl): Deleted.
	(print_insn_shx): Renamed to
	(print_insn_sh).  No longer static.  Handle SHmedia instructions.
	Use info->endian to determine endianness.
	* sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
	(print_insn_sh64x): No longer static.  Renamed to
	(print_insn_sh64).  Removed pfun_compact and endian arguments.
	If we got an uneven address to indicate SHmedia, adjust it.
	Return -2 for SHcompact instructions.
sim/sh64:
	* sim-if.c (sh64_disassemble_insn): Use  print_insn_sh instead of
	print_insn_shl.

Index: include/dis-asm.h
===================================================================
RCS file: /cvs/src/src/include/dis-asm.h,v
retrieving revision 1.32
diff -p -r1.32 dis-asm.h
*** include/dis-asm.h	8 Feb 2002 05:01:25 -0000	1.32
--- include/dis-asm.h	15 May 2002 18:38:50 -0000
*************** extern int print_insn_little_powerpc	PAR
*** 226,232 ****
  extern int print_insn_rs6000		PARAMS ((bfd_vma, disassemble_info*));
  extern int print_insn_s390              PARAMS ((bfd_vma, disassemble_info*)); 
  extern int print_insn_sh		PARAMS ((bfd_vma, disassemble_info*));
- extern int print_insn_shl		PARAMS ((bfd_vma, disassemble_info*));
  extern int print_insn_tic30		PARAMS ((bfd_vma, disassemble_info*));
  extern int print_insn_tic54x		PARAMS ((bfd_vma, disassemble_info*));
  extern int print_insn_tic80		PARAMS ((bfd_vma, disassemble_info*));
--- 226,231 ----
*************** extern int print_insn_vax		PARAMS ((bfd_
*** 235,241 ****
  extern int print_insn_w65		PARAMS ((bfd_vma, disassemble_info*));
  extern int print_insn_xstormy16		PARAMS ((bfd_vma, disassemble_info*));
  extern int print_insn_sh64		PARAMS ((bfd_vma, disassemble_info *));
- extern int print_insn_sh64l		PARAMS ((bfd_vma, disassemble_info *));
  extern int print_insn_sh64x_media	PARAMS ((bfd_vma, disassemble_info *));
  
  extern disassembler_ftype arc_get_disassembler PARAMS ((void *));
--- 234,239 ----
Index: gdb/sh-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/sh-tdep.c,v
retrieving revision 1.58
diff -p -r1.58 sh-tdep.c
*** gdb/sh-tdep.c	10 May 2002 23:59:09 -0000	1.58
--- gdb/sh-tdep.c	17 May 2002 12:25:42 -0000
*************** sh_store_struct_return (CORE_ADDR addr, 
*** 906,934 ****
  static int
  gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info)
  {
!   if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
!     return print_insn_sh (memaddr, info);
!   else
!     return print_insn_shl (memaddr, info);
! }
! 
! /* Disassemble an instruction.  */
! static int
! gdb_print_insn_sh64 (bfd_vma memaddr, disassemble_info *info)
! {
!   if (pc_is_isa32 (memaddr))
!     {
!       /* Round down the instruction address to the appropriate boundary
! 	 before disassembling it. */
!       return print_insn_sh64x_media (UNMAKE_ISA32_ADDR (memaddr), info);
!     }
!   else
!     {
!       if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
! 	return print_insn_sh (memaddr, info);
!       else
! 	return print_insn_shl (memaddr, info);
!     }
  }
  
  /* Given a GDB frame, determine the address of the calling function's frame.
--- 906,913 ----
  static int
  gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info)
  {
!   info->endian = TARGET_BYTE_ORDER;
!   return print_insn_sh (memaddr, info);
  }
  
  /* Given a GDB frame, determine the address of the calling function's frame.
*************** sh_gdbarch_init (struct gdbarch_info inf
*** 4682,4688 ****
        sh_store_return_value = sh64_store_return_value;
        skip_prologue_hard_way = sh64_skip_prologue_hard_way;
        do_pseudo_register = sh64_do_pseudo_register;
-       set_gdbarch_print_insn (gdbarch, gdb_print_insn_sh64);
        set_gdbarch_register_raw_size (gdbarch, sh_sh64_register_raw_size);
        set_gdbarch_register_virtual_size (gdbarch, sh_sh64_register_raw_size);
        set_gdbarch_register_byte (gdbarch, sh_sh64_register_byte);
--- 4661,4666 ----
Index: opcodes/disassemble.c
===================================================================
RCS file: /cvs/src/src/opcodes/disassemble.c,v
retrieving revision 1.32
diff -p -r1.32 disassemble.c
*** opcodes/disassemble.c	8 Feb 2002 05:51:03 -0000	1.32
--- opcodes/disassemble.c	15 May 2002 18:39:01 -0000
*************** disassembler (abfd)
*** 278,297 ****
  #endif
  #ifdef ARCH_sh
      case bfd_arch_sh:
! #ifdef INCLUDE_SHMEDIA
!       if (bfd_get_mach (abfd) == bfd_mach_sh5)
! 	{
! 	  if (bfd_big_endian (abfd))
! 	    disassemble = print_insn_sh64;
! 	  else
! 	    disassemble = print_insn_sh64l;
! 	  break;
! 	}
! #endif
!       if (bfd_big_endian (abfd))
! 	disassemble = print_insn_sh;
!       else
! 	disassemble = print_insn_shl;
        break;
  #endif
  #ifdef ARCH_sparc
--- 278,284 ----
  #endif
  #ifdef ARCH_sh
      case bfd_arch_sh:
!       disassemble = print_insn_sh;
        break;
  #endif
  #ifdef ARCH_sparc
Index: opcodes/sh-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/sh-dis.c,v
retrieving revision 1.10
diff -p -r1.10 sh-dis.c
*** opcodes/sh-dis.c	8 Feb 2002 05:51:03 -0000	1.10
--- opcodes/sh-dis.c	15 May 2002 18:39:01 -0000
*************** Foundation, Inc., 59 Temple Place - Suit
*** 24,37 ****
  #include "sh-opc.h"
  #include "dis-asm.h"
  
- #define LITTLE_BIT 2
- 
  static void print_movxy
    PARAMS ((sh_opcode_info *, int, int, fprintf_ftype, void *));
  static void print_insn_ddt PARAMS ((int, struct disassemble_info *));
  static void print_dsp_reg PARAMS ((int, fprintf_ftype, void *));
  static void print_insn_ppi PARAMS ((int, struct disassemble_info *));
- static int print_insn_shx PARAMS ((bfd_vma, struct disassemble_info *));
  
  static void
  print_movxy (op, rn, rm, fprintf_fn, stream)
--- 24,34 ----
*************** print_insn_ppi (field_b, info)
*** 286,293 ****
    fprintf_fn (stream, ".word 0x%x", field_b);
  }
  
! static int
! print_insn_shx (memaddr, info)
       bfd_vma memaddr;
       struct disassemble_info *info;
  {
--- 283,290 ----
    fprintf_fn (stream, ".word 0x%x", field_b);
  }
  
! int
! print_insn_sh (memaddr, info)
       bfd_vma memaddr;
       struct disassemble_info *info;
  {
*************** print_insn_shx (memaddr, info)
*** 324,329 ****
--- 321,331 ----
        target_arch = arch_sh4;
        break;
      case bfd_mach_sh5:
+ #ifdef INCLUDE_SHMEDIA
+       status = print_insn_sh64 (memaddr, info);
+       if (status != -2)
+ 	return status;
+ #endif
        /* When we get here for sh64, it's because we want to disassemble
  	 SHcompact, i.e. arch_sh4.  */
        target_arch = arch_sh4;
*************** print_insn_shx (memaddr, info)
*** 340,346 ****
        return -1;
      }
  
!   if (info->flags & LITTLE_BIT)
      {
        nibs[0] = (insn[1] >> 4) & 0xf;
        nibs[1] = insn[1] & 0xf;
--- 342,348 ----
        return -1;
      }
  
!   if (info->endian == BFD_ENDIAN_LITTLE)
      {
        nibs[0] = (insn[1] >> 4) & 0xf;
        nibs[1] = insn[1] & 0xf;
*************** print_insn_shx (memaddr, info)
*** 371,377 ****
  	      return -1;
  	    }
  
! 	  if (info->flags & LITTLE_BIT)
  	    field_b = insn[1] << 8 | insn[0];
  	  else
  	    field_b = insn[0] << 8 | insn[1];
--- 373,379 ----
  	      return -1;
  	    }
  
! 	  if (info->endian == BFD_ENDIAN_LITTLE)
  	    field_b = insn[1] << 8 | insn[0];
  	  else
  	    field_b = insn[0] << 8 | insn[1];
*************** print_insn_shx (memaddr, info)
*** 677,683 ****
  	{
  	  info->flags |= 1;
  	  fprintf_fn (stream, "\t(slot ");
! 	  print_insn_shx (memaddr + 2, info);
  	  info->flags &= ~1;
  	  fprintf_fn (stream, ")");
  	  return 4;
--- 679,685 ----
  	{
  	  info->flags |= 1;
  	  fprintf_fn (stream, "\t(slot ");
! 	  print_insn_sh (memaddr + 2, info);
  	  info->flags &= ~1;
  	  fprintf_fn (stream, ")");
  	  return 4;
*************** print_insn_shx (memaddr, info)
*** 700,713 ****
  
  	      if (size == 2)
  		{
! 		  if ((info->flags & LITTLE_BIT) != 0)
  		    val = bfd_getl16 (bytes);
  		  else
  		    val = bfd_getb16 (bytes);
  		}
  	      else
  		{
! 		  if ((info->flags & LITTLE_BIT) != 0)
  		    val = bfd_getl32 (bytes);
  		  else
  		    val = bfd_getb32 (bytes);
--- 702,715 ----
  
  	      if (size == 2)
  		{
! 		  if (info->endian == BFD_ENDIAN_LITTLE)
  		    val = bfd_getl16 (bytes);
  		  else
  		    val = bfd_getb16 (bytes);
  		}
  	      else
  		{
! 		  if (info->endian == BFD_ENDIAN_LITTLE)
  		    val = bfd_getl32 (bytes);
  		  else
  		    val = bfd_getb32 (bytes);
*************** print_insn_shx (memaddr, info)
*** 723,750 ****
      }
    fprintf_fn (stream, ".word 0x%x%x%x%x", nibs[0], nibs[1], nibs[2], nibs[3]);
    return 2;
- }
- 
- int
- print_insn_shl (memaddr, info)
-      bfd_vma memaddr;
-      struct disassemble_info *info;
- {
-   int r;
- 
-   info->flags = LITTLE_BIT;
-   r = print_insn_shx (memaddr, info);
-   return r;
- }
- 
- int
- print_insn_sh (memaddr, info)
-      bfd_vma memaddr;
-      struct disassemble_info *info;
- {
-   int r;
- 
-   info->flags = 0;
-   r = print_insn_shx (memaddr, info);
-   return r;
  }
--- 725,728 ----
Index: opcodes/sh64-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/sh64-dis.c,v
retrieving revision 1.1
diff -p -r1.1 sh64-dis.c
*** opcodes/sh64-dis.c	8 Feb 2002 05:51:03 -0000	1.1
--- opcodes/sh64-dis.c	15 May 2002 18:39:01 -0000
*************** static unsigned long *shmedia_opcode_mas
*** 55,64 ****
  
  static void initialize_shmedia_opcode_mask_table PARAMS ((void));
  static int print_insn_shmedia PARAMS ((bfd_vma, disassemble_info *));
- static int print_insn_sh64x
-   PARAMS ((bfd_vma, disassemble_info *,
- 	   int (*) PARAMS ((bfd_vma, struct disassemble_info *)),
- 	   enum bfd_endian));
  static const char *creg_name PARAMS ((int));
  static boolean init_sh64_disasm_info PARAMS ((struct disassemble_info *));
  static enum sh64_elf_cr_type sh64_get_contents_type_disasm
--- 55,60 ----
*************** print_insn_sh64x_media (memaddr, info)
*** 555,569 ****
    return print_insn_shmedia (memaddr, info);
  }
  
! /* Main entry to disassemble SHcompact or SHmedia insns.  */
  
! static int 
! print_insn_sh64x (memaddr, info, pfun_compact, endian)
       bfd_vma memaddr;
       struct disassemble_info *info;
-      int (*pfun_compact) PARAMS ((bfd_vma, struct disassemble_info *));
-      enum bfd_endian endian;
  {
    enum sh64_elf_cr_type cr_type;
  
    if (info->private_data == NULL && ! init_sh64_disasm_info (info))
--- 551,565 ----
    return print_insn_shmedia (memaddr, info);
  }
  
! /* Main entry to disassemble SHmedia insns.
!    If we see an SHcompact instruction, return -2.  */
  
! int 
! print_insn_sh64 (memaddr, info)
       bfd_vma memaddr;
       struct disassemble_info *info;
  {
+   enum bfd_endian endian = info->endian;
    enum sh64_elf_cr_type cr_type;
  
    if (info->private_data == NULL && ! init_sh64_disasm_info (info))
*************** print_insn_sh64x (memaddr, info, pfun_co
*** 575,580 ****
--- 571,580 ----
        int length = 4 - (memaddr % 4);
        info->display_endian = endian;
  
+       /* If we got an uneven address to indicate SHmedia, adjust it.  */
+       if (cr_type == CRT_SH5_ISA32 && length == 3)
+ 	memaddr--, length = 4;
+ 
        /* Only disassemble on four-byte boundaries.  Addresses that are not
  	 a multiple of four can happen after a data region.  */
        if (cr_type == CRT_SH5_ISA32 && length == 4)
*************** print_insn_sh64x (memaddr, info, pfun_co
*** 633,659 ****
  	}
      }
  
!   return (*pfun_compact) (memaddr, info);
! }
! 
! /* Main entry to disassemble SHcompact or SHmedia insns, big endian.  */
! 
! int 
! print_insn_sh64 (memaddr, info)
!      bfd_vma memaddr;
!      struct disassemble_info *info;
! {
!   return
!     print_insn_sh64x (memaddr, info, print_insn_sh, BFD_ENDIAN_BIG);
! }
! 
! /* Main entry to disassemble SHcompact or SHmedia insns, little endian.  */
! 
! int 
! print_insn_sh64l (memaddr, info)
!      bfd_vma memaddr;
!      struct disassemble_info *info;
! {
!   return
!     print_insn_sh64x (memaddr, info, print_insn_shl, BFD_ENDIAN_LITTLE);
  }
--- 633,638 ----
  	}
      }
  
!   /* SH1 .. SH4 instruction, let caller handle it.  */
!   return -2;
  }
Index: sim/sh64/sim-if.c
===================================================================
RCS file: /cvs/src/src/sim/sh64/sim-if.c,v
retrieving revision 1.1
diff -p -r1.1 sim-if.c
*** sim/sh64/sim-if.c	1 Feb 2002 11:44:27 -0000	1.1
--- sim/sh64/sim-if.c	15 May 2002 18:39:01 -0000
*************** sh64_disassemble_insn (SIM_CPU *cpu, con
*** 232,246 ****
    if (sh64_h_ism_get (cpu) == ISM_MEDIA)
      print_insn_sh64x_media (pc, &disasm_info);
    else
!     switch (disasm_info.endian)
!     {
!     case BFD_ENDIAN_BIG:
!       print_insn_sh (pc, &disasm_info);
!       break;
!     case BFD_ENDIAN_LITTLE:
!       print_insn_shl (pc, &disasm_info);
!       break;
!     default:
!       abort();
!     }
  }
--- 232,236 ----
    if (sh64_h_ism_get (cpu) == ISM_MEDIA)
      print_insn_sh64x_media (pc, &disasm_info);
    else
!     print_insn_sh (pc, &disasm_info);
  }

Re: print_insn_sh cleanup

[Elena Zannoni]

Joern Rennecke writes:
 > Elena Zannoni wrote:
 > > We still need a gdb_print_insn_sh function, because the user can
 > > set the target endiannes from the command line overwriting the architecture
 > > endiannes.
 > > So we need to leave in there the check of the TARGET_BYTE_ORDER.
 > > I think something like this:
 > > gdb_print_insn_sh (bfd_vma address, disassemble_info *info)
 > > {
 > >  if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
 > >     BFD_ENDIAN_BIG;
 > >  else
 > >    info->endian = BFD_ENDIAN_LITTLE;
 > >  return print_insn_sh (address, info);
 > > }
 > 
 > I have used
 > info->endian = TARGET_BYTE_ORDER;
 > I hope there isn't any hidden problem with that.

I hope not either.
The gdb part is approved. (Of course this should go in after/at the same time
the opcodes are committed).

All we are missing now is a sh disassembly gdb test in gdb.asm.

Elena


 > 
 > -- 
 > --------------------------
 > SuperH
 > 2430 Aztec West / Almondsbury / BRISTOL / BS32 4AQ
 > T:+44 1454 462330Fri May 17 13:30:50 2002  J"orn Rennecke <joern.rennecke@superh.com>
 > 
 > include:
 > 	* dis-asm.h (print_insn_shl, print_insn_sh64l): Remove prototype.
 > gdb:
 > 	* sh-tdep.c (gdb_print_insn_sh64): Delete.
 > 	(gdb_print_insn_sh): Just set info->endian and use print_insn_sh.
 > 	(sh_gdbarch_init): Always use gdb_print_insn_sh.
 > opcodes:
 > 	* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
 > 	* sh-dis.c (LITTLE_BIT): Delete.
 > 	(print_insn_sh, print_insn_shl): Deleted.
 > 	(print_insn_shx): Renamed to
 > 	(print_insn_sh).  No longer static.  Handle SHmedia instructions.
 > 	Use info->endian to determine endianness.
 > 	* sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
 > 	(print_insn_sh64x): No longer static.  Renamed to
 > 	(print_insn_sh64).  Removed pfun_compact and endian arguments.
 > 	If we got an uneven address to indicate SHmedia, adjust it.
 > 	Return -2 for SHcompact instructions.
 > sim/sh64:
 > 	* sim-if.c (sh64_disassemble_insn): Use  print_insn_sh instead of
 > 	print_insn_shl.
 > 
 > Index: include/dis-asm.h
 > ===================================================================
 > RCS file: /cvs/src/src/include/dis-asm.h,v
 > retrieving revision 1.32
 > diff -p -r1.32 dis-asm.h
 > *** include/dis-asm.h	8 Feb 2002 05:01:25 -0000	1.32
 > --- include/dis-asm.h	15 May 2002 18:38:50 -0000
 > *************** extern int print_insn_little_powerpc	PAR
 > *** 226,232 ****
 >   extern int print_insn_rs6000		PARAMS ((bfd_vma, disassemble_info*));
 >   extern int print_insn_s390              PARAMS ((bfd_vma, disassemble_info*)); 
 >   extern int print_insn_sh		PARAMS ((bfd_vma, disassemble_info*));
 > - extern int print_insn_shl		PARAMS ((bfd_vma, disassemble_info*));
 >   extern int print_insn_tic30		PARAMS ((bfd_vma, disassemble_info*));
 >   extern int print_insn_tic54x		PARAMS ((bfd_vma, disassemble_info*));
 >   extern int print_insn_tic80		PARAMS ((bfd_vma, disassemble_info*));
 > --- 226,231 ----
 > *************** extern int print_insn_vax		PARAMS ((bfd_
 > *** 235,241 ****
 >   extern int print_insn_w65		PARAMS ((bfd_vma, disassemble_info*));
 >   extern int print_insn_xstormy16		PARAMS ((bfd_vma, disassemble_info*));
 >   extern int print_insn_sh64		PARAMS ((bfd_vma, disassemble_info *));
 > - extern int print_insn_sh64l		PARAMS ((bfd_vma, disassemble_info *));
 >   extern int print_insn_sh64x_media	PARAMS ((bfd_vma, disassemble_info *));
 >   
 >   extern disassembler_ftype arc_get_disassembler PARAMS ((void *));
 > --- 234,239 ----
 > Index: gdb/sh-tdep.c
 > ===================================================================
 > RCS file: /cvs/src/src/gdb/sh-tdep.c,v
 > retrieving revision 1.58
 > diff -p -r1.58 sh-tdep.c
 > *** gdb/sh-tdep.c	10 May 2002 23:59:09 -0000	1.58
 > --- gdb/sh-tdep.c	17 May 2002 12:25:42 -0000
 > *************** sh_store_struct_return (CORE_ADDR addr, 
 > *** 906,934 ****
 >   static int
 >   gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info)
 >   {
 > !   if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
 > !     return print_insn_sh (memaddr, info);
 > !   else
 > !     return print_insn_shl (memaddr, info);
 > ! }
 > ! 
 > ! /* Disassemble an instruction.  */
 > ! static int
 > ! gdb_print_insn_sh64 (bfd_vma memaddr, disassemble_info *info)
 > ! {
 > !   if (pc_is_isa32 (memaddr))
 > !     {
 > !       /* Round down the instruction address to the appropriate boundary
 > ! 	 before disassembling it. */
 > !       return print_insn_sh64x_media (UNMAKE_ISA32_ADDR (memaddr), info);
 > !     }
 > !   else
 > !     {
 > !       if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
 > ! 	return print_insn_sh (memaddr, info);
 > !       else
 > ! 	return print_insn_shl (memaddr, info);
 > !     }
 >   }
 >   
 >   /* Given a GDB frame, determine the address of the calling function's frame.
 > --- 906,913 ----
 >   static int
 >   gdb_print_insn_sh (bfd_vma memaddr, disassemble_info *info)
 >   {
 > !   info->endian = TARGET_BYTE_ORDER;
 > !   return print_insn_sh (memaddr, info);
 >   }
 >   
 >   /* Given a GDB frame, determine the address of the calling function's frame.
 > *************** sh_gdbarch_init (struct gdbarch_info inf
 > *** 4682,4688 ****
 >         sh_store_return_value = sh64_store_return_value;
 >         skip_prologue_hard_way = sh64_skip_prologue_hard_way;
 >         do_pseudo_register = sh64_do_pseudo_register;
 > -       set_gdbarch_print_insn (gdbarch, gdb_print_insn_sh64);
 >         set_gdbarch_register_raw_size (gdbarch, sh_sh64_register_raw_size);
 >         set_gdbarch_register_virtual_size (gdbarch, sh_sh64_register_raw_size);
 >         set_gdbarch_register_byte (gdbarch, sh_sh64_register_byte);
 > --- 4661,4666 ----
 > Index: opcodes/disassemble.c
 > ===================================================================
 > RCS file: /cvs/src/src/opcodes/disassemble.c,v
 > retrieving revision 1.32
 > diff -p -r1.32 disassemble.c
 > *** opcodes/disassemble.c	8 Feb 2002 05:51:03 -0000	1.32
 > --- opcodes/disassemble.c	15 May 2002 18:39:01 -0000
 > *************** disassembler (abfd)
 > *** 278,297 ****
 >   #endif
 >   #ifdef ARCH_sh
 >       case bfd_arch_sh:
 > ! #ifdef INCLUDE_SHMEDIA
 > !       if (bfd_get_mach (abfd) == bfd_mach_sh5)
 > ! 	{
 > ! 	  if (bfd_big_endian (abfd))
 > ! 	    disassemble = print_insn_sh64;
 > ! 	  else
 > ! 	    disassemble = print_insn_sh64l;
 > ! 	  break;
 > ! 	}
 > ! #endif
 > !       if (bfd_big_endian (abfd))
 > ! 	disassemble = print_insn_sh;
 > !       else
 > ! 	disassemble = print_insn_shl;
 >         break;
 >   #endif
 >   #ifdef ARCH_sparc
 > --- 278,284 ----
 >   #endif
 >   #ifdef ARCH_sh
 >       case bfd_arch_sh:
 > !       disassemble = print_insn_sh;
 >         break;
 >   #endif
 >   #ifdef ARCH_sparc
 > Index: opcodes/sh-dis.c
 > ===================================================================
 > RCS file: /cvs/src/src/opcodes/sh-dis.c,v
 > retrieving revision 1.10
 > diff -p -r1.10 sh-dis.c
 > *** opcodes/sh-dis.c	8 Feb 2002 05:51:03 -0000	1.10
 > --- opcodes/sh-dis.c	15 May 2002 18:39:01 -0000
 > *************** Foundation, Inc., 59 Temple Place - Suit
 > *** 24,37 ****
 >   #include "sh-opc.h"
 >   #include "dis-asm.h"
 >   
 > - #define LITTLE_BIT 2
 > - 
 >   static void print_movxy
 >     PARAMS ((sh_opcode_info *, int, int, fprintf_ftype, void *));
 >   static void print_insn_ddt PARAMS ((int, struct disassemble_info *));
 >   static void print_dsp_reg PARAMS ((int, fprintf_ftype, void *));
 >   static void print_insn_ppi PARAMS ((int, struct disassemble_info *));
 > - static int print_insn_shx PARAMS ((bfd_vma, struct disassemble_info *));
 >   
 >   static void
 >   print_movxy (op, rn, rm, fprintf_fn, stream)
 > --- 24,34 ----
 > *************** print_insn_ppi (field_b, info)
 > *** 286,293 ****
 >     fprintf_fn (stream, ".word 0x%x", field_b);
 >   }
 >   
 > ! static int
 > ! print_insn_shx (memaddr, info)
 >        bfd_vma memaddr;
 >        struct disassemble_info *info;
 >   {
 > --- 283,290 ----
 >     fprintf_fn (stream, ".word 0x%x", field_b);
 >   }
 >   
 > ! int
 > ! print_insn_sh (memaddr, info)
 >        bfd_vma memaddr;
 >        struct disassemble_info *info;
 >   {
 > *************** print_insn_shx (memaddr, info)
 > *** 324,329 ****
 > --- 321,331 ----
 >         target_arch = arch_sh4;
 >         break;
 >       case bfd_mach_sh5:
 > + #ifdef INCLUDE_SHMEDIA
 > +       status = print_insn_sh64 (memaddr, info);
 > +       if (status != -2)
 > + 	return status;
 > + #endif
 >         /* When we get here for sh64, it's because we want to disassemble
 >   	 SHcompact, i.e. arch_sh4.  */
 >         target_arch = arch_sh4;
 > *************** print_insn_shx (memaddr, info)
 > *** 340,346 ****
 >         return -1;
 >       }
 >   
 > !   if (info->flags & LITTLE_BIT)
 >       {
 >         nibs[0] = (insn[1] >> 4) & 0xf;
 >         nibs[1] = insn[1] & 0xf;
 > --- 342,348 ----
 >         return -1;
 >       }
 >   
 > !   if (info->endian == BFD_ENDIAN_LITTLE)
 >       {
 >         nibs[0] = (insn[1] >> 4) & 0xf;
 >         nibs[1] = insn[1] & 0xf;
 > *************** print_insn_shx (memaddr, info)
 > *** 371,377 ****
 >   	      return -1;
 >   	    }
 >   
 > ! 	  if (info->flags & LITTLE_BIT)
 >   	    field_b = insn[1] << 8 | insn[0];
 >   	  else
 >   	    field_b = insn[0] << 8 | insn[1];
 > --- 373,379 ----
 >   	      return -1;
 >   	    }
 >   
 > ! 	  if (info->endian == BFD_ENDIAN_LITTLE)
 >   	    field_b = insn[1] << 8 | insn[0];
 >   	  else
 >   	    field_b = insn[0] << 8 | insn[1];
 > *************** print_insn_shx (memaddr, info)
 > *** 677,683 ****
 >   	{
 >   	  info->flags |= 1;
 >   	  fprintf_fn (stream, "\t(slot ");
 > ! 	  print_insn_shx (memaddr + 2, info);
 >   	  info->flags &= ~1;
 >   	  fprintf_fn (stream, ")");
 >   	  return 4;
 > --- 679,685 ----
 >   	{
 >   	  info->flags |= 1;
 >   	  fprintf_fn (stream, "\t(slot ");
 > ! 	  print_insn_sh (memaddr + 2, info);
 >   	  info->flags &= ~1;
 >   	  fprintf_fn (stream, ")");
 >   	  return 4;
 > *************** print_insn_shx (memaddr, info)
 > *** 700,713 ****
 >   
 >   	      if (size == 2)
 >   		{
 > ! 		  if ((info->flags & LITTLE_BIT) != 0)
 >   		    val = bfd_getl16 (bytes);
 >   		  else
 >   		    val = bfd_getb16 (bytes);
 >   		}
 >   	      else
 >   		{
 > ! 		  if ((info->flags & LITTLE_BIT) != 0)
 >   		    val = bfd_getl32 (bytes);
 >   		  else
 >   		    val = bfd_getb32 (bytes);
 > --- 702,715 ----
 >   
 >   	      if (size == 2)
 >   		{
 > ! 		  if (info->endian == BFD_ENDIAN_LITTLE)
 >   		    val = bfd_getl16 (bytes);
 >   		  else
 >   		    val = bfd_getb16 (bytes);
 >   		}
 >   	      else
 >   		{
 > ! 		  if (info->endian == BFD_ENDIAN_LITTLE)
 >   		    val = bfd_getl32 (bytes);
 >   		  else
 >   		    val = bfd_getb32 (bytes);
 > *************** print_insn_shx (memaddr, info)
 > *** 723,750 ****
 >       }
 >     fprintf_fn (stream, ".word 0x%x%x%x%x", nibs[0], nibs[1], nibs[2], nibs[3]);
 >     return 2;
 > - }
 > - 
 > - int
 > - print_insn_shl (memaddr, info)
 > -      bfd_vma memaddr;
 > -      struct disassemble_info *info;
 > - {
 > -   int r;
 > - 
 > -   info->flags = LITTLE_BIT;
 > -   r = print_insn_shx (memaddr, info);
 > -   return r;
 > - }
 > - 
 > - int
 > - print_insn_sh (memaddr, info)
 > -      bfd_vma memaddr;
 > -      struct disassemble_info *info;
 > - {
 > -   int r;
 > - 
 > -   info->flags = 0;
 > -   r = print_insn_shx (memaddr, info);
 > -   return r;
 >   }
 > --- 725,728 ----
 > Index: opcodes/sh64-dis.c
 > ===================================================================
 > RCS file: /cvs/src/src/opcodes/sh64-dis.c,v
 > retrieving revision 1.1
 > diff -p -r1.1 sh64-dis.c
 > *** opcodes/sh64-dis.c	8 Feb 2002 05:51:03 -0000	1.1
 > --- opcodes/sh64-dis.c	15 May 2002 18:39:01 -0000
 > *************** static unsigned long *shmedia_opcode_mas
 > *** 55,64 ****
 >   
 >   static void initialize_shmedia_opcode_mask_table PARAMS ((void));
 >   static int print_insn_shmedia PARAMS ((bfd_vma, disassemble_info *));
 > - static int print_insn_sh64x
 > -   PARAMS ((bfd_vma, disassemble_info *,
 > - 	   int (*) PARAMS ((bfd_vma, struct disassemble_info *)),
 > - 	   enum bfd_endian));
 >   static const char *creg_name PARAMS ((int));
 >   static boolean init_sh64_disasm_info PARAMS ((struct disassemble_info *));
 >   static enum sh64_elf_cr_type sh64_get_contents_type_disasm
 > --- 55,60 ----
 > *************** print_insn_sh64x_media (memaddr, info)
 > *** 555,569 ****
 >     return print_insn_shmedia (memaddr, info);
 >   }
 >   
 > ! /* Main entry to disassemble SHcompact or SHmedia insns.  */
 >   
 > ! static int 
 > ! print_insn_sh64x (memaddr, info, pfun_compact, endian)
 >        bfd_vma memaddr;
 >        struct disassemble_info *info;
 > -      int (*pfun_compact) PARAMS ((bfd_vma, struct disassemble_info *));
 > -      enum bfd_endian endian;
 >   {
 >     enum sh64_elf_cr_type cr_type;
 >   
 >     if (info->private_data == NULL && ! init_sh64_disasm_info (info))
 > --- 551,565 ----
 >     return print_insn_shmedia (memaddr, info);
 >   }
 >   
 > ! /* Main entry to disassemble SHmedia insns.
 > !    If we see an SHcompact instruction, return -2.  */
 >   
 > ! int 
 > ! print_insn_sh64 (memaddr, info)
 >        bfd_vma memaddr;
 >        struct disassemble_info *info;
 >   {
 > +   enum bfd_endian endian = info->endian;
 >     enum sh64_elf_cr_type cr_type;
 >   
 >     if (info->private_data == NULL && ! init_sh64_disasm_info (info))
 > *************** print_insn_sh64x (memaddr, info, pfun_co
 > *** 575,580 ****
 > --- 571,580 ----
 >         int length = 4 - (memaddr % 4);
 >         info->display_endian = endian;
 >   
 > +       /* If we got an uneven address to indicate SHmedia, adjust it.  */
 > +       if (cr_type == CRT_SH5_ISA32 && length == 3)
 > + 	memaddr--, length = 4;
 > + 
 >         /* Only disassemble on four-byte boundaries.  Addresses that are not
 >   	 a multiple of four can happen after a data region.  */
 >         if (cr_type == CRT_SH5_ISA32 && length == 4)
 > *************** print_insn_sh64x (memaddr, info, pfun_co
 > *** 633,659 ****
 >   	}
 >       }
 >   
 > !   return (*pfun_compact) (memaddr, info);
 > ! }
 > ! 
 > ! /* Main entry to disassemble SHcompact or SHmedia insns, big endian.  */
 > ! 
 > ! int 
 > ! print_insn_sh64 (memaddr, info)
 > !      bfd_vma memaddr;
 > !      struct disassemble_info *info;
 > ! {
 > !   return
 > !     print_insn_sh64x (memaddr, info, print_insn_sh, BFD_ENDIAN_BIG);
 > ! }
 > ! 
 > ! /* Main entry to disassemble SHcompact or SHmedia insns, little endian.  */
 > ! 
 > ! int 
 > ! print_insn_sh64l (memaddr, info)
 > !      bfd_vma memaddr;
 > !      struct disassemble_info *info;
 > ! {
 > !   return
 > !     print_insn_sh64x (memaddr, info, print_insn_shl, BFD_ENDIAN_LITTLE);
 >   }
 > --- 633,638 ----
 >   	}
 >       }
 >   
 > !   /* SH1 .. SH4 instruction, let caller handle it.  */
 > !   return -2;
 >   }
 > Index: sim/sh64/sim-if.c
 > ===================================================================
 > RCS file: /cvs/src/src/sim/sh64/sim-if.c,v
 > retrieving revision 1.1
 > diff -p -r1.1 sim-if.c
 > *** sim/sh64/sim-if.c	1 Feb 2002 11:44:27 -0000	1.1
 > --- sim/sh64/sim-if.c	15 May 2002 18:39:01 -0000
 > *************** sh64_disassemble_insn (SIM_CPU *cpu, con
 > *** 232,246 ****
 >     if (sh64_h_ism_get (cpu) == ISM_MEDIA)
 >       print_insn_sh64x_media (pc, &disasm_info);
 >     else
 > !     switch (disasm_info.endian)
 > !     {
 > !     case BFD_ENDIAN_BIG:
 > !       print_insn_sh (pc, &disasm_info);
 > !       break;
 > !     case BFD_ENDIAN_LITTLE:
 > !       print_insn_shl (pc, &disasm_info);
 > !       break;
 > !     default:
 > !       abort();
 > !     }
 >   }
 > --- 232,236 ----
 >     if (sh64_h_ism_get (cpu) == ISM_MEDIA)
 >       print_insn_sh64x_media (pc, &disasm_info);
 >     else
 > !     print_insn_sh (pc, &disasm_info);
 >   }

Re: print_insn_sh cleanup

[Joern Rennecke]

Elena Zannoni wrote:
> The gdb part is approved. (Of course this should go in after/at the same time
> the opcodes are committed).

Thanks.  I've committed the whole lot together.
		
-- 
--------------------------
SuperH
2430 Aztec West / Almondsbury / BRISTOL / BS32 4AQ
T:+44 1454 462330

Re: print_insn_sh cleanup

[Alexandre Oliva]

On May 17, 2002, Joern Rennecke <joern.rennecke@superh.com> wrote:

> Elena Zannoni wrote:
>> The gdb part is approved. (Of course this should go in after/at the same time
>> the opcodes are committed).

> Thanks.  I've committed the whole lot together.
		
Did you run check in binutils too?  It's badly hosed at the moment;
all SH64 tests in a sh64-elf build with --target_board=sh-hms-sim fail
because the disassembler is printing SHmedia instructions as if they
were SHcompact.

-- 
Alexandre Oliva   Enjoy Guarana', see http://www.ic.unicamp.br/~oliva/
Red Hat GCC Developer                  aoliva@{cygnus.com, redhat.com}
CS PhD student at IC-Unicamp        oliva@{lsd.ic.unicamp.br, gnu.org}
Free Software Evangelist                Professional serial bug killer

Re: print_insn_sh cleanup

[Joern Rennecke]

Alexandre Oliva wrote:
> Did you run check in binutils too?  It's badly hosed at the moment;
> all SH64 tests in a sh64-elf build with --target_board=sh-hms-sim fail
> because the disassembler is printing SHmedia instructions as if they
> were SHcompact.

I get expected passes: 25 and untested testcases: 7.
I'm not sure what you mean with --target-board=sh-hms-sim, though.  Is
that something you used for configuring, or that you supply for testing?
My site.exp uses set_target_list { "sh-hms-sim" } .
	
-- 
--------------------------
SuperH
2430 Aztec West / Almondsbury / BRISTOL / BS32 4AQ
T:+44 1454 462330

Re: print_insn_sh cleanup

[Hans-Peter Nilsson]

On Mon, 20 May 2002, Joern Rennecke wrote:
> Alexandre Oliva wrote:
> > Did you run check in binutils too?  It's badly hosed at the moment;
> > all SH64 tests in a sh64-elf build with --target_board=sh-hms-sim fail
> > because the disassembler is printing SHmedia instructions as if they
> > were SHcompact.
>
> I get expected passes: 25 and untested testcases: 7.

Those numbers seems like you interpreted binutils as binutils,
:-) not "a build tree for binutils, including subpackages gas,
binutils and ld".  BTW, I think you can ignore the test option
RUNTESTFLAGS=--target_board=sh-hms-sim option in this case, if
it confuses you.

brgds, H-P