Re: [PATCH 03/24] RISC-V sim: Atomic fixes.

[Jim Wilson <jimw@sifive.com>]

On Wed, Apr 21, 2021 at 5:09 PM Mike Frysinger <vapier@gentoo.org> wrote:

> > Most of the other stuff is well tested just by running the gcc testsuite.
>
> imo, "just run the gcc testsuite" is not reasonable.  it is extremely large
> and slow and not conducive to iterative/fast development.   it happening to
> hit a bug sometimes depending on the current codegen behavior isn't the
> same
> as having good targetted logic.
>

I agree that the sim should have good testcases.  It is only a question of
how we get there.  I'm stretched thin.  If you want me to work on this, it
will likely take a while.  Meanwhile, the RISC-V sim won't be very useful
until most of these patches get merged in.  Some of the syscall stuff could
just be dropped from this patch set if you don't like them, they aren't
critical.  Most of the rest is necessary to get a working simulator.

my concern is that this becomes a convenient "we'll get to it later" and
> then
> later never comes.  i'm not saying you don't have good intentions, but they
> often don't last with real world pressures.  the only carrot/leverage that
> exists is not yet being merged.
>
> so maybe, maybe, you get a pass now, but this isn't the status quo moving
> forward.
>

I'm helping maintain about 8 different software packages, 3 documents, and
doing support on multiple mailing lists and social media channels for 3
organizations.  So yes, there is risk that stuff may get delayed or
dropped.  But I've been doing GNU toolchain work for 34 years now, so I'm
not going away tomorrow unless maybe I have a heart attack or something.
And I'm hoping that more people start helping maintain this stuff as RISC-V
gets more mainstream.  Meanwhile, I'd much rather have a useful RISC-V sim
upstream than the one we have now.  I think others are more likely to help
if we have a working simulator upstream.  Also, part of the plan here is to
kill off the github riscv/riscv-binutils-gdb tree to force people to work
upstream.  But that gets more complicated if riscv-binutils-gdb has a
working simulator, and FSF gdb does not.  These gdb sim patches are the
only major non-ISA-extension work that hasn't been upstreamed yet.  And we
have separate plans for the ISA-extension work to put them on development
branches in the FSF trees.

Jim