* [RFA 6/8] New port: TI C6x: gdbserver
@ 2011-07-20 2:12 Yao Qi
2011-07-20 18:22 ` Pedro Alves
2011-07-21 14:04 ` Joseph S. Myers
0 siblings, 2 replies; 15+ messages in thread
From: Yao Qi @ 2011-07-20 2:12 UTC (permalink / raw)
To: gdb-patches
[-- Attachment #1: Type: text/plain, Size: 88 bytes --]
This patch is to add gdbserver support and feature xml for c6x.
--
Yao (é½å°§)
[-- Attachment #2: 0006-gdbserver-tic6x-and-target-description-xml.patch --]
[-- Type: text/x-patch, Size: 21652 bytes --]
2011-07-19 Andrew Jenner <andrew@codesourcery.com>
Yao Qi <yao@codesourcery.com>
gdb/
* features/Makefile (WHICH): Add tic6x-linux.
* features/tic6x-cpu.xml: New.
* features/tic6x-linux.xml: New.
* regformats/tic6x-linux.dat: New.
gdb/gdbserver/
* Makefile.in (clean): Remove tic6x-linux.c.
(linux-tic6x-low.o, tic6x-linux.o, tic6x-linux.c): New rules.
* configure.srv: Add support for tic6x-*-uclinux.
* linux-tic6x-low.c: New.
* linux-low.c (PT_TEXT_ADDR, PT_DATA_ADDR, PT_TEXT_END_ADDR):
Define.
---
gdb/features/Makefile | 3 +-
gdb/features/tic6x-cpu.xml | 137 +++++++++++++++
gdb/features/tic6x-linux.xml | 12 ++
gdb/gdbserver/Makefile.in | 5 +
gdb/gdbserver/configure.srv | 6 +
gdb/gdbserver/linux-low.c | 4 +
gdb/gdbserver/linux-tic6x-low.c | 346 +++++++++++++++++++++++++++++++++++++++
gdb/regformats/tic6x-linux.dat | 131 +++++++++++++++
8 files changed, 643 insertions(+), 1 deletions(-)
create mode 100644 gdb/features/tic6x-cpu.xml
create mode 100644 gdb/features/tic6x-linux.xml
create mode 100644 gdb/gdbserver/linux-tic6x-low.c
create mode 100644 gdb/regformats/tic6x-linux.dat
diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index 4e8e7ee..396ce8a 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -41,7 +41,7 @@ WHICH = arm-with-iwmmxt arm-with-vfpv2 arm-with-vfpv3 arm-with-neon \
rs6000/powerpc-32l rs6000/powerpc-altivec32l rs6000/powerpc-e500l \
rs6000/powerpc-64l rs6000/powerpc-altivec64l rs6000/powerpc-vsx32l \
rs6000/powerpc-vsx64l rs6000/powerpc-cell32l rs6000/powerpc-cell64l \
- s390-linux32 s390-linux64 s390x-linux64
+ s390-linux32 s390-linux64 s390x-linux64 tic6x-linux
# Record which registers should be sent to GDB by default after stop.
arm-expedite = r11,sp,pc
@@ -63,6 +63,7 @@ rs6000/powerpc-cell64l-expedite = r1,pc,r0,orig_r3,r4
s390-linux32-expedite = r14,r15,pswa
s390-linux64-expedite = r14l,r15l,pswa
s390x-linux64-expedite = r14,r15,pswa
+tic6x-linux-expedite = A15,PC
XSLTPROC = xsltproc
diff --git a/gdb/features/tic6x-cpu.xml b/gdb/features/tic6x-cpu.xml
new file mode 100644
index 0000000..4fa9f41
--- /dev/null
+++ b/gdb/features/tic6x-cpu.xml
@@ -0,0 +1,137 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.tic6x.cpu">
+ <reg name="A0" bitsize="32"/>
+ <reg name="A1" bitsize="32"/>
+ <reg name="A2" bitsize="32"/>
+ <reg name="A3" bitsize="32"/>
+ <reg name="A4" bitsize="32"/>
+ <reg name="A5" bitsize="32"/>
+ <reg name="A6" bitsize="32"/>
+ <reg name="A7" bitsize="32"/>
+ <reg name="A8" bitsize="32"/>
+ <reg name="A9" bitsize="32"/>
+ <reg name="A10" bitsize="32"/>
+ <reg name="A11" bitsize="32"/>
+ <reg name="A12" bitsize="32"/>
+ <reg name="A13" bitsize="32"/>
+ <reg name="A14" bitsize="32"/>
+ <reg name="A15" bitsize="32"/>
+ <reg name="B0" bitsize="32"/>
+ <reg name="B1" bitsize="32"/>
+ <reg name="B2" bitsize="32"/>
+ <reg name="B3" bitsize="32"/>
+ <reg name="B4" bitsize="32"/>
+ <reg name="B5" bitsize="32"/>
+ <reg name="B6" bitsize="32"/>
+ <reg name="B7" bitsize="32"/>
+ <reg name="B8" bitsize="32"/>
+ <reg name="B9" bitsize="32"/>
+ <reg name="B10" bitsize="32"/>
+ <reg name="B11" bitsize="32"/>
+ <reg name="B12" bitsize="32"/>
+ <reg name="B13" bitsize="32"/>
+ <reg name="B14" bitsize="32"/>
+ <reg name="B15" bitsize="32"/>
+ <reg name="None" bitsize="32"/>
+ <reg name="PC" bitsize="32"/>
+ <reg name="IRP" bitsize="32"/>
+ <reg name="IFR" bitsize="32"/>
+ <reg name="NPR" bitsize="32"/>
+ <reg name="A16" bitsize="32"/>
+ <reg name="A17" bitsize="32"/>
+ <reg name="A18" bitsize="32"/>
+ <reg name="A19" bitsize="32"/>
+ <reg name="A20" bitsize="32"/>
+ <reg name="A21" bitsize="32"/>
+ <reg name="A22" bitsize="32"/>
+ <reg name="A23" bitsize="32"/>
+ <reg name="A24" bitsize="32"/>
+ <reg name="A25" bitsize="32"/>
+ <reg name="A26" bitsize="32"/>
+ <reg name="A27" bitsize="32"/>
+ <reg name="A28" bitsize="32"/>
+ <reg name="A29" bitsize="32"/>
+ <reg name="A30" bitsize="32"/>
+ <reg name="A31" bitsize="32"/>
+ <reg name="B16" bitsize="32"/>
+ <reg name="B17" bitsize="32"/>
+ <reg name="B18" bitsize="32"/>
+ <reg name="B19" bitsize="32"/>
+ <reg name="B20" bitsize="32"/>
+ <reg name="B21" bitsize="32"/>
+ <reg name="B22" bitsize="32"/>
+ <reg name="B23" bitsize="32"/>
+ <reg name="B24" bitsize="32"/>
+ <reg name="B25" bitsize="32"/>
+ <reg name="B26" bitsize="32"/>
+ <reg name="B27" bitsize="32"/>
+ <reg name="B28" bitsize="32"/>
+ <reg name="B29" bitsize="32"/>
+ <reg name="B30" bitsize="32"/>
+ <reg name="B31" bitsize="32"/>
+ <reg name="AMR" bitsize="32"/>
+ <reg name="CSR" bitsize="32"/>
+ <reg name="ISR" bitsize="32"/>
+ <reg name="ICR" bitsize="32"/>
+ <reg name="IER" bitsize="32"/>
+ <reg name="ISTP" bitsize="32"/>
+ <reg name="IN" bitsize="32"/>
+ <reg name="OUT" bitsize="32"/>
+ <reg name="ACR" bitsize="32"/>
+ <reg name="ADR" bitsize="32"/>
+ <reg name="FADCR" bitsize="32"/>
+ <reg name="FAUCR" bitsize="32"/>
+ <reg name="FMCR" bitsize="32"/>
+ <reg name="GFPGFR" bitsize="32"/>
+ <reg name="DIER" bitsize="32"/>
+ <reg name="REP" bitsize="32"/>
+ <reg name="TSCL" bitsize="32"/>
+ <reg name="TSCH" bitsize="32"/>
+ <reg name="ARP" bitsize="32"/>
+ <reg name="ILC" bitsize="32"/>
+ <reg name="RILC" bitsize="32"/>
+ <reg name="DNUM" bitsize="32"/>
+ <reg name="SSR" bitsize="32"/>
+ <reg name="GPLYA" bitsize="32"/>
+ <reg name="GPLYB" bitsize="32"/>
+ <reg name="TSR" bitsize="32"/>
+ <reg name="ITSR" bitsize="32"/>
+ <reg name="NTSR" bitsize="32"/>
+ <reg name="EFR" bitsize="32"/>
+ <reg name="IERR" bitsize="32"/>
+ <reg name="DMSG" bitsize="32"/>
+ <reg name="CMSG" bitsize="32"/>
+ <reg name="DT_DMA_ADDR" bitsize="32"/>
+ <reg name="DT_DMA_DATA" bitsize="32"/>
+ <reg name="DT_DMA_CNTL" bitsize="32"/>
+ <reg name="TCU_CNTL" bitsize="32"/>
+ <reg name="RTDX_REC_CNTL" bitsize="32"/>
+ <reg name="RTDX_XMT_CNTL" bitsize="32"/>
+ <reg name="RTDX_CFG" bitsize="32"/>
+ <reg name="RTDX_RDATA" bitsize="32"/>
+ <reg name="RTDX_WDATA" bitsize="32"/>
+ <reg name="RTDX_RADDR" bitsize="32"/>
+ <reg name="RTDX_WADDR" bitsize="32"/>
+ <reg name="MFREG0" bitsize="32"/>
+ <reg name="DBG_STAT" bitsize="32"/>
+ <reg name="BRK_EN" bitsize="32"/>
+ <reg name="HWBP0_CNT" bitsize="32"/>
+ <reg name="HWBP0" bitsize="32"/>
+ <reg name="HWBP1" bitsize="32"/>
+ <reg name="HWBP2" bitsize="32"/>
+ <reg name="HWBP3" bitsize="32"/>
+ <reg name="OVERLAY" bitsize="32"/>
+ <reg name="PC_PROF" bitsize="32"/>
+ <reg name="ATSR" bitsize="32"/>
+ <reg name="TRR" bitsize="32"/>
+ <reg name="TCRR" bitsize="32"/>
+ <reg name="DESR" bitsize="32"/>
+ <reg name="DETR" bitsize="32"/>
+</feature>
diff --git a/gdb/features/tic6x-linux.xml b/gdb/features/tic6x-linux.xml
new file mode 100644
index 0000000..f79ba30
--- /dev/null
+++ b/gdb/features/tic6x-linux.xml
@@ -0,0 +1,12 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>tic6x</architecture>
+ <xi:include href="tic6x-cpu.xml"/>
+</target>
diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
index 095c706..6b905dc 100644
--- a/gdb/gdbserver/Makefile.in
+++ b/gdb/gdbserver/Makefile.in
@@ -276,6 +276,7 @@ clean:
rm -f powerpc-isa205-altivec32l.c powerpc-isa205-vsx32l.c powerpc-isa205-altivec64l.c
rm -f powerpc-isa205-vsx64l.c
rm -f s390-linux32.c s390-linux64.c s390x-linux64.c
+ rm -f tic6x-linux.c
rm -f xml-builtin.c stamp-xml
rm -f i386-avx.c i386-avx-linux.c
rm -f amd64-avx.c amd64-avx-linux.c
@@ -428,6 +429,7 @@ linux-mips-low.o: linux-mips-low.c $(linux_low_h) $(server_h) \
linux-ppc-low.o: linux-ppc-low.c $(linux_low_h) $(server_h)
linux-s390-low.o: linux-s390-low.c $(linux_low_h) $(server_h)
linux-sh-low.o: linux-sh-low.c $(linux_low_h) $(server_h)
+linux-tic6x-low.o: linux-tic6x-low.c $(linux_low_h) $(server_h)
linux-x86-low.o: linux-x86-low.c $(linux_low_h) $(server_h) \
$(gdb_proc_service_h) $(i386_low_h)
linux-xtensa-low.o: linux-xtensa-low.c xtensa-xtregs.c $(linux_low_h) $(server_h)
@@ -563,6 +565,9 @@ s390-linux64.c : $(srcdir)/../regformats/s390-linux64.dat $(regdat_sh)
s390x-linux64.o : s390x-linux64.c $(regdef_h)
s390x-linux64.c : $(srcdir)/../regformats/s390x-linux64.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/s390x-linux64.dat s390x-linux64.c
+tic6x-linux.o : tic6x-linux.c $(regdef_h)
+tic6x-linux.c : $(srcdir)/../regformats/tic6x-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/tic6x-linux.dat tic6x-linux.c
reg-sh.o : reg-sh.c $(regdef_h)
reg-sh.c : $(srcdir)/../regformats/reg-sh.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-sh.dat reg-sh.c
diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
index 55dd4cf..5a245fc 100644
--- a/gdb/gdbserver/configure.srv
+++ b/gdb/gdbserver/configure.srv
@@ -243,6 +243,12 @@ case "${target}" in
spu*-*-*) srv_regobj=reg-spu.o
srv_tgtobj="spu-low.o"
;;
+ tic6x-*-uclinux) srv_regobj=tic6x-linux.o
+ srv_tgtobj="linux-low.o linux-tic6x-low.o"
+ srv_linux_regsets=yes
+ srv_linux_usrregs=yes
+ srv_linux_thread_db=yes
+ ;;
x86_64-*-linux*) srv_regobj="$srv_amd64_linux_regobj $srv_i386_linux_regobj"
srv_tgtobj="linux-low.o linux-x86-low.o i386-low.o i387-fp.o"
srv_xmlfiles="$srv_i386_linux_xmlfiles $srv_amd64_linux_xmlfiles"
diff --git a/gdb/gdbserver/linux-low.c b/gdb/gdbserver/linux-low.c
index 1e9a4fb..fd32735 100644
--- a/gdb/gdbserver/linux-low.c
+++ b/gdb/gdbserver/linux-low.c
@@ -4347,6 +4347,10 @@ linux_stopped_data_address (void)
#define PT_TEXT_ADDR 220
#define PT_TEXT_END_ADDR 224
#define PT_DATA_ADDR 228
+#elif defined(__TMS320C6X__)
+#define PT_TEXT_ADDR 0x10000*4
+#define PT_DATA_ADDR 0x10004*4
+#define PT_TEXT_END_ADDR 0x10008*4
#endif
/* Under uClinux, programs are loaded at non-zero offsets, which we need
diff --git a/gdb/gdbserver/linux-tic6x-low.c b/gdb/gdbserver/linux-tic6x-low.c
new file mode 100644
index 0000000..d8a7a7e
--- /dev/null
+++ b/gdb/gdbserver/linux-tic6x-low.c
@@ -0,0 +1,346 @@
+/* Target dependent code for GDB on TI C6x systems.
+
+ Copyright (C) 2010, 2011
+ Free Software Foundation, Inc.
+ Contributed by Andrew Jenner <andrew@codesourcery.com>
+ Contributed by Yao Qi <yao@codesourcery.com>
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#include "server.h"
+#include "linux-low.h"
+
+#include <sys/ptrace.h>
+#include <endian.h>
+
+#include "gdb_proc_service.h"
+
+#ifndef PTRACE_GET_THREAD_AREA
+#define PTRACE_GET_THREAD_AREA 25
+#endif
+
+#define tic6x_num_regs 127
+
+#include <asm/ptrace.h>
+
+/* Defined in auto-generated file tic6x-linux.c. */
+void init_registers_tic6x_linux (void);
+
+union tic6x_register
+{
+ unsigned char buf[4];
+
+ int reg32;
+};
+
+/* Return the ptrace ``address'' of register REGNO. */
+
+#if __BYTE_ORDER == __BIG_ENDIAN
+static int tic6x_regmap_c64xp[] = {
+ 53, 52, 55, 54, 57, 56, 59, 58,
+ 61, 60, 63, 62, 65, 64, 67, 66,
+ 23, 22, 25, 24, 27, 26, 29, 28,
+ 31, 30, 33, 32, 35, 34, 69, 68,
+ -1, 4, -1, -1, -1, 37, 36, 39,
+ 38, 41, 40, 43, 42, 45, 44, 47,
+ 46, 49, 48, 51, 50, 7, 6, 9,
+ 8, 11, 10, 13, 12, 15, 14, 17,
+ 16, 19, 18, 21, 20, -1, 5, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ 3, 2, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1
+};
+
+static int tic6x_regmap_c64x[] = {
+ 51, 50, 53, 52, 55, 54, 57, 56,
+ 59, 58, 61, 60, 63, 62, 65, 64,
+ 21, 20, 23, 22, 25, 24, 27, 26,
+ 29, 28, 31, 30, 33, 32, 67, 66,
+ -1, 2, -1, -1, -1, 35, 34, 37,
+ 36, 39, 38, 41, 40, 43, 42, 45,
+ 44, 47, 46, 49, 48, 5, 4, 7,
+ 6, 9, 8, 11, 10, 13, 12, 15,
+ 14, 17, 16, 19, 18, -1, 3, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1
+};
+
+static int tic6x_regmap_c62x[] = {
+ 19, 18, 21, 20, 23, 22, 25, 24,
+ 27, 26, 29, 28, 31, 30, 33, 32,
+ 5, 4, 7, 6, 9, 8, 11, 10,
+ 13, 12, 15, 14, 17, 16, 35, 34,
+ -1, 2, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, 3, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1
+};
+
+#else
+static int tic6x_regmap_c64xp[] = {
+ 52, 53, 54, 55, 56, 57, 58, 59,
+ 60, 61, 62, 63, 64, 65, 66, 67,
+ 22, 23, 24, 25, 26, 27, 28, 29,
+ 30, 31, 32, 33, 34, 35, 68, 69,
+ -1, 5, -1, -1, -1, 36, 37, 38,
+ 39, 40, 41, 42, 43, 44, 45, 46,
+ 47, 48, 49, 50, 51, 6, 7, 8,
+ 9, 10, 11, 12, 13, 14, 15, 16,
+ 17, 18, 19, 20, 31, -1, 4, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ 2, 3, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1
+};
+
+static int tic6x_regmap_c64x[] = {
+ 50, 51, 52, 53, 54, 55, 56, 57,
+ 58, 59, 60, 61, 62, 63, 64, 65,
+ 20, 21, 22, 23, 24, 25, 26, 27,
+ 28, 29, 30, 31, 32, 33, 66, 67,
+ -1, 3, -1, -1, -1, 34, 35, 36,
+ 37, 38, 39, 40, 41, 42, 43, 44,
+ 45, 46, 47, 48, 49, 4, 5, 6,
+ 7, 8, 9, 10, 11, 12, 13, 14,
+ 15, 16, 17, 18, 19, -1, 3, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1
+};
+
+static int tic6x_regmap_c62x[] = {
+ 18, 19, 20, 21, 22, 23, 24, 25,
+ 26, 27, 28, 29, 30, 31, 32, 33,
+ 4, 5, 6, 7, 8, 9, 10, 11,
+ 12, 13, 14, 15, 16, 17, 34, 35,
+ -1, 3, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, 2, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1
+};
+
+#endif
+
+int *tic6x_regmap;
+
+extern struct linux_target_ops the_low_target;
+
+unsigned int tic6x_breakpoint;
+
+static void
+tic6x_arch_setup (void)
+{
+ register unsigned int csr asm ("B2");
+ unsigned int cpuid;
+
+ init_registers_tic6x_linux ();
+
+ /* Determine the CPU we're running on to find the register order. */
+ __asm__ ("MVC .S2 CSR,%0" : "=r" (csr) :);
+ cpuid = csr >> 24;
+ switch (cpuid)
+ {
+ case 0x00: /* C62x */
+ case 0x02: /* C67x */
+ tic6x_regmap = tic6x_regmap_c62x;
+ tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
+ break;
+ case 0x03: /* C67x+ */
+ tic6x_regmap = tic6x_regmap_c64x;
+ tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
+ break;
+ case 0x0c: /* C64x */
+ tic6x_regmap = tic6x_regmap_c64x;
+ tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
+ break;
+ case 0x10: /* C64x+ */
+ case 0x14: /* C674x */
+ case 0x15: /* C66x */
+ tic6x_regmap = tic6x_regmap_c64xp;
+ tic6x_breakpoint = 0x56454314; /* illegal opcode */
+ break;
+ default:
+ error("Unknown CPU ID 0x%02x", cpuid);
+ }
+ the_low_target.regmap = tic6x_regmap;
+}
+
+static int
+tic6x_cannot_fetch_register (int regno)
+{
+ return (tic6x_regmap[regno] == -1);
+}
+
+static int
+tic6x_cannot_store_register (int regno)
+{
+ return (tic6x_regmap[regno] == -1);
+}
+
+static CORE_ADDR
+tic6x_get_pc (struct regcache *regcache)
+{
+ union tic6x_register pc;
+ collect_register_by_name (regcache, "PC", pc.buf);
+ return pc.reg32;
+}
+
+static void
+tic6x_set_pc (struct regcache *regcache, CORE_ADDR pc)
+{
+ union tic6x_register newpc;
+ newpc.reg32 = pc;
+ supply_register_by_name (regcache, "PC", newpc.buf);
+}
+
+unsigned int tic6x_breakpoint;
+#define tic6x_breakpoint_len 4
+
+static int
+tic6x_breakpoint_at (CORE_ADDR where)
+{
+ unsigned int insn;
+
+ (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
+ if (insn == tic6x_breakpoint)
+ return 1;
+
+ /* If necessary, recognize more trap instructions here. GDB only uses the
+ one. */
+ return 0;
+}
+
+/* Fetch the thread-local storage pointer for libthread_db. */
+
+ps_err_e
+ps_get_thread_area (const struct ps_prochandle *ph,
+ lwpid_t lwpid, int idx, void **base)
+{
+ if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
+ return PS_ERR;
+
+ /* IDX is the bias from the thread pointer to the beginning of the
+ thread descriptor. It has to be subtracted due to implementation
+ quirks in libthread_db. */
+ *base = (void *) ((char *)*base - idx);
+
+ return PS_OK;
+}
+
+#ifdef HAVE_PTRACE_GETREGS
+
+static void
+tic6x_collect_register (struct regcache *regcache, int regno,
+ union tic6x_register *reg)
+{
+ union tic6x_register tmp_reg;
+
+ collect_register (regcache, regno, &tmp_reg.reg32);
+ reg->reg32 = tmp_reg.reg32;
+}
+
+static void
+tic6x_supply_register (struct regcache *regcache, int regno,
+ const union tic6x_register *reg)
+{
+ int offset = 0;
+
+ supply_register (regcache, regno, reg->buf + offset);
+}
+
+static void
+tic6x_fill_gregset (struct regcache *regcache, void *buf)
+{
+ union tic6x_register *regset = buf;
+ int i;
+
+ for (i = 0; i < tic6x_num_regs; i++)
+ if (tic6x_regmap[i] != -1)
+ tic6x_collect_register (regcache, i, regset + tic6x_regmap[i]);
+}
+
+static void
+tic6x_store_gregset (struct regcache *regcache, const void *buf)
+{
+ const union tic6x_register *regset = buf;
+ int i;
+ char zerobuf[4];
+
+ memset (zerobuf, 0, 4);
+ for (i = 0; i < tic6x_num_regs; i++)
+ {
+ if (tic6x_regmap[i] != -1)
+ tic6x_supply_register (regcache, i, regset + tic6x_regmap[i]);
+ else
+ supply_register (regcache, i, zerobuf);
+ }
+}
+#endif /* HAVE_PTRACE_GETREGS */
+
+struct regset_info target_regsets[] = {
+#ifdef HAVE_PTRACE_GETREGS
+ { PTRACE_GETREGS, PTRACE_SETREGS, 0, 127 * 4, GENERAL_REGS,
+ tic6x_fill_gregset, tic6x_store_gregset },
+#endif /* HAVE_PTRACE_GETREGS */
+ { 0, 0, 0, -1, -1, NULL, NULL }
+};
+
+struct linux_target_ops the_low_target = {
+ tic6x_arch_setup,
+ tic6x_num_regs,
+ 0,
+ tic6x_cannot_fetch_register,
+ tic6x_cannot_store_register,
+ tic6x_get_pc,
+ tic6x_set_pc,
+ (const unsigned char *) &tic6x_breakpoint,
+ tic6x_breakpoint_len,
+ NULL,
+ 0,
+ tic6x_breakpoint_at,
+};
diff --git a/gdb/regformats/tic6x-linux.dat b/gdb/regformats/tic6x-linux.dat
new file mode 100644
index 0000000..990846d
--- /dev/null
+++ b/gdb/regformats/tic6x-linux.dat
@@ -0,0 +1,131 @@
+# DO NOT EDIT: generated from tic6x-linux.xml
+name:tic6x_linux
+xmltarget:tic6x-linux.xml
+expedite:A15,PC
+32:A0
+32:A1
+32:A2
+32:A3
+32:A4
+32:A5
+32:A6
+32:A7
+32:A8
+32:A9
+32:A10
+32:A11
+32:A12
+32:A13
+32:A14
+32:A15
+32:B0
+32:B1
+32:B2
+32:B3
+32:B4
+32:B5
+32:B6
+32:B7
+32:B8
+32:B9
+32:B10
+32:B11
+32:B12
+32:B13
+32:B14
+32:B15
+32:None
+32:PC
+32:IRP
+32:IFR
+32:NPR
+32:A16
+32:A17
+32:A18
+32:A19
+32:A20
+32:A21
+32:A22
+32:A23
+32:A24
+32:A25
+32:A26
+32:A27
+32:A28
+32:A29
+32:A30
+32:A31
+32:B16
+32:B17
+32:B18
+32:B19
+32:B20
+32:B21
+32:B22
+32:B23
+32:B24
+32:B25
+32:B26
+32:B27
+32:B28
+32:B29
+32:B30
+32:B31
+32:AMR
+32:CSR
+32:ISR
+32:ICR
+32:IER
+32:ISTP
+32:IN
+32:OUT
+32:ACR
+32:ADR
+32:FADCR
+32:FAUCR
+32:FMCR
+32:GFPGFR
+32:DIER
+32:REP
+32:TSCL
+32:TSCH
+32:ARP
+32:ILC
+32:RILC
+32:DNUM
+32:SSR
+32:GPLYA
+32:GPLYB
+32:TSR
+32:ITSR
+32:NTSR
+32:EFR
+32:IERR
+32:DMSG
+32:CMSG
+32:DT_DMA_ADDR
+32:DT_DMA_DATA
+32:DT_DMA_CNTL
+32:TCU_CNTL
+32:RTDX_REC_CNTL
+32:RTDX_XMT_CNTL
+32:RTDX_CFG
+32:RTDX_RDATA
+32:RTDX_WDATA
+32:RTDX_RADDR
+32:RTDX_WADDR
+32:MFREG0
+32:DBG_STAT
+32:BRK_EN
+32:HWBP0_CNT
+32:HWBP0
+32:HWBP1
+32:HWBP2
+32:HWBP3
+32:OVERLAY
+32:PC_PROF
+32:ATSR
+32:TRR
+32:TCRR
+32:DESR
+32:DETR
--
1.7.0.4
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFA 6/8] New port: TI C6x: gdbserver
2011-07-20 2:12 [RFA 6/8] New port: TI C6x: gdbserver Yao Qi
@ 2011-07-20 18:22 ` Pedro Alves
2011-07-21 9:52 ` Yao Qi
2011-07-21 14:04 ` Joseph S. Myers
1 sibling, 1 reply; 15+ messages in thread
From: Pedro Alves @ 2011-07-20 18:22 UTC (permalink / raw)
To: gdb-patches; +Cc: Yao Qi
On Wednesday 20 July 2011 03:09:18, Yao Qi wrote:
> +static CORE_ADDR
> +tic6x_get_pc (struct regcache *regcache)
> +{
> + union tic6x_register pc;
> + collect_register_by_name (regcache, "PC", pc.buf);
Empty line missing after declaration. At least one more instance.
> +int *tic6x_regmap;
> +
...
> +unsigned int tic6x_breakpoint;
Could be static?
> s390-linux32-expedite = r14,r15,pswa
> s390-linux64-expedite = r14l,r15l,pswa
> s390x-linux64-expedite = r14,r15,pswa
> +tic6x-linux-expedite = A15,PC
Stupid question: is there a reason all register
names are all caps in C6x?
> +++ b/gdb/features/tic6x-linux.xml
> @@ -0,0 +1,12 @@
> +<?xml version="1.0"?>
> +<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
> +
> + Copying and distribution of this file, with or without modification,
> + are permitted in any medium without royalty provided the copyright
> + notice and this notice are preserved. -->
> +
> +<!DOCTYPE target SYSTEM "gdb-target.dtd">
> +<target>
> + <architecture>tic6x</architecture>
Since this is for linux only, add:
<osabi>GNU/Linux</osabi>
> + <xi:include href="tic6x-cpu.xml"/>
> +</target>
> +#elif defined(__TMS320C6X__)
> +#define PT_TEXT_ADDR 0x10000*4
> +#define PT_DATA_ADDR 0x10004*4
> +#define PT_TEXT_END_ADDR 0x10008*4
Surround with parens as principle to avoid precedence
surprises:
#define PT_TEXT_ADDR (0x10000*4)
> +<!DOCTYPE feature SYSTEM "gdb-target.dtd">
> +<feature name="org.gnu.gdb.tic6x.cpu">
> + <reg name="A0" bitsize="32"/>
> + <reg name="A1" bitsize="32"/>
> + <reg name="A2" bitsize="32"/>
...
These are all general purpose, core registers, right?
Otherwise looks fine to me.
--
Pedro Alves
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFA 6/8] New port: TI C6x: gdbserver
2011-07-20 18:22 ` Pedro Alves
@ 2011-07-21 9:52 ` Yao Qi
2011-07-21 12:21 ` Pedro Alves
0 siblings, 1 reply; 15+ messages in thread
From: Yao Qi @ 2011-07-21 9:52 UTC (permalink / raw)
To: Pedro Alves; +Cc: gdb-patches
[-- Attachment #1: Type: text/plain, Size: 2400 bytes --]
On 07/21/2011 01:55 AM, Pedro Alves wrote:
> On Wednesday 20 July 2011 03:09:18, Yao Qi wrote:
>
>> +static CORE_ADDR
>> +tic6x_get_pc (struct regcache *regcache)
>> +{
>> + union tic6x_register pc;
>> + collect_register_by_name (regcache, "PC", pc.buf);
>
> Empty line missing after declaration. At least one more instance.
>
Fixed it here and other places.
>> +int *tic6x_regmap;
>> +
> ...
>> +unsigned int tic6x_breakpoint;
>
> Could be static?
>
Yes, they can be static. Fixed.
>> s390-linux32-expedite = r14,r15,pswa
>> s390-linux64-expedite = r14l,r15l,pswa
>> s390x-linux64-expedite = r14,r15,pswa
>> +tic6x-linux-expedite = A15,PC
>
> Stupid question: is there a reason all register
> names are all caps in C6x?
>
Because all register names are capitalized in TI's reference guide and
"TMS320C6000 Assembly Language Tools User's Guide".
>> +++ b/gdb/features/tic6x-linux.xml
>> @@ -0,0 +1,12 @@
>> +<?xml version="1.0"?>
>> +<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
>> +
>> + Copying and distribution of this file, with or without modification,
>> + are permitted in any medium without royalty provided the copyright
>> + notice and this notice are preserved. -->
>> +
>> +<!DOCTYPE target SYSTEM "gdb-target.dtd">
>> +<target>
>> + <architecture>tic6x</architecture>
>
> Since this is for linux only, add:
>
> <osabi>GNU/Linux</osabi>
>
>> + <xi:include href="tic6x-cpu.xml"/>
>> +</target>
>
Done.
>> +#elif defined(__TMS320C6X__)
>> +#define PT_TEXT_ADDR 0x10000*4
>> +#define PT_DATA_ADDR 0x10004*4
>> +#define PT_TEXT_END_ADDR 0x10008*4
>
> Surround with parens as principle to avoid precedence
> surprises:
>
> #define PT_TEXT_ADDR (0x10000*4)
>
Done.
>> +<!DOCTYPE feature SYSTEM "gdb-target.dtd">
>> +<feature name="org.gnu.gdb.tic6x.cpu">
>> + <reg name="A0" bitsize="32"/>
>> + <reg name="A1" bitsize="32"/>
>> + <reg name="A2" bitsize="32"/>
>
> ...
>
> These are all general purpose, core registers, right?
>
Not really. A0-31 and B0-31 are general purpose registers, even there
are some difference among different C6x cores (such as C62x, C67x, and
C64x). The rest of them can be regarded as control registers and status
registers. The target description should be refined for the different
C6x cores, and I'd like to do it in follow-up patches later. Is it OK?
--
Yao (é½å°§)
[-- Attachment #2: 0006-gdbserver-tic6x-and-target-description-xml.patch --]
[-- Type: text/x-patch, Size: 21677 bytes --]
2011-07-19 Andrew Jenner <andrew@codesourcery.com>
Yao Qi <yao@codesourcery.com>
gdb/
* features/Makefile (WHICH): Add tic6x-linux.
* features/tic6x-cpu.xml: New.
* features/tic6x-linux.xml: New.
* regformats/tic6x-linux.dat: New.
gdb/gdbserver/
* Makefile.in (clean): Remove tic6x-linux.c.
(linux-tic6x-low.o, tic6x-linux.o, tic6x-linux.c): New rules.
* configure.srv: Add support for tic6x-*-uclinux.
* linux-tic6x-low.c: New.
* linux-low.c (PT_TEXT_ADDR, PT_DATA_ADDR, PT_TEXT_END_ADDR):
Define.
---
gdb/features/Makefile | 3 +-
gdb/features/tic6x-cpu.xml | 137 +++++++++++++++
gdb/features/tic6x-linux.xml | 13 ++
gdb/gdbserver/Makefile.in | 5 +
gdb/gdbserver/configure.srv | 6 +
gdb/gdbserver/linux-low.c | 4 +
gdb/gdbserver/linux-tic6x-low.c | 346 +++++++++++++++++++++++++++++++++++++++
gdb/regformats/tic6x-linux.dat | 131 +++++++++++++++
8 files changed, 644 insertions(+), 1 deletions(-)
create mode 100644 gdb/features/tic6x-cpu.xml
create mode 100644 gdb/features/tic6x-linux.xml
create mode 100644 gdb/gdbserver/linux-tic6x-low.c
create mode 100644 gdb/regformats/tic6x-linux.dat
diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index 4e8e7ee..396ce8a 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -41,7 +41,7 @@ WHICH = arm-with-iwmmxt arm-with-vfpv2 arm-with-vfpv3 arm-with-neon \
rs6000/powerpc-32l rs6000/powerpc-altivec32l rs6000/powerpc-e500l \
rs6000/powerpc-64l rs6000/powerpc-altivec64l rs6000/powerpc-vsx32l \
rs6000/powerpc-vsx64l rs6000/powerpc-cell32l rs6000/powerpc-cell64l \
- s390-linux32 s390-linux64 s390x-linux64
+ s390-linux32 s390-linux64 s390x-linux64 tic6x-linux
# Record which registers should be sent to GDB by default after stop.
arm-expedite = r11,sp,pc
@@ -63,6 +63,7 @@ rs6000/powerpc-cell64l-expedite = r1,pc,r0,orig_r3,r4
s390-linux32-expedite = r14,r15,pswa
s390-linux64-expedite = r14l,r15l,pswa
s390x-linux64-expedite = r14,r15,pswa
+tic6x-linux-expedite = A15,PC
XSLTPROC = xsltproc
diff --git a/gdb/features/tic6x-cpu.xml b/gdb/features/tic6x-cpu.xml
new file mode 100644
index 0000000..4fa9f41
--- /dev/null
+++ b/gdb/features/tic6x-cpu.xml
@@ -0,0 +1,137 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.tic6x.cpu">
+ <reg name="A0" bitsize="32"/>
+ <reg name="A1" bitsize="32"/>
+ <reg name="A2" bitsize="32"/>
+ <reg name="A3" bitsize="32"/>
+ <reg name="A4" bitsize="32"/>
+ <reg name="A5" bitsize="32"/>
+ <reg name="A6" bitsize="32"/>
+ <reg name="A7" bitsize="32"/>
+ <reg name="A8" bitsize="32"/>
+ <reg name="A9" bitsize="32"/>
+ <reg name="A10" bitsize="32"/>
+ <reg name="A11" bitsize="32"/>
+ <reg name="A12" bitsize="32"/>
+ <reg name="A13" bitsize="32"/>
+ <reg name="A14" bitsize="32"/>
+ <reg name="A15" bitsize="32"/>
+ <reg name="B0" bitsize="32"/>
+ <reg name="B1" bitsize="32"/>
+ <reg name="B2" bitsize="32"/>
+ <reg name="B3" bitsize="32"/>
+ <reg name="B4" bitsize="32"/>
+ <reg name="B5" bitsize="32"/>
+ <reg name="B6" bitsize="32"/>
+ <reg name="B7" bitsize="32"/>
+ <reg name="B8" bitsize="32"/>
+ <reg name="B9" bitsize="32"/>
+ <reg name="B10" bitsize="32"/>
+ <reg name="B11" bitsize="32"/>
+ <reg name="B12" bitsize="32"/>
+ <reg name="B13" bitsize="32"/>
+ <reg name="B14" bitsize="32"/>
+ <reg name="B15" bitsize="32"/>
+ <reg name="None" bitsize="32"/>
+ <reg name="PC" bitsize="32"/>
+ <reg name="IRP" bitsize="32"/>
+ <reg name="IFR" bitsize="32"/>
+ <reg name="NPR" bitsize="32"/>
+ <reg name="A16" bitsize="32"/>
+ <reg name="A17" bitsize="32"/>
+ <reg name="A18" bitsize="32"/>
+ <reg name="A19" bitsize="32"/>
+ <reg name="A20" bitsize="32"/>
+ <reg name="A21" bitsize="32"/>
+ <reg name="A22" bitsize="32"/>
+ <reg name="A23" bitsize="32"/>
+ <reg name="A24" bitsize="32"/>
+ <reg name="A25" bitsize="32"/>
+ <reg name="A26" bitsize="32"/>
+ <reg name="A27" bitsize="32"/>
+ <reg name="A28" bitsize="32"/>
+ <reg name="A29" bitsize="32"/>
+ <reg name="A30" bitsize="32"/>
+ <reg name="A31" bitsize="32"/>
+ <reg name="B16" bitsize="32"/>
+ <reg name="B17" bitsize="32"/>
+ <reg name="B18" bitsize="32"/>
+ <reg name="B19" bitsize="32"/>
+ <reg name="B20" bitsize="32"/>
+ <reg name="B21" bitsize="32"/>
+ <reg name="B22" bitsize="32"/>
+ <reg name="B23" bitsize="32"/>
+ <reg name="B24" bitsize="32"/>
+ <reg name="B25" bitsize="32"/>
+ <reg name="B26" bitsize="32"/>
+ <reg name="B27" bitsize="32"/>
+ <reg name="B28" bitsize="32"/>
+ <reg name="B29" bitsize="32"/>
+ <reg name="B30" bitsize="32"/>
+ <reg name="B31" bitsize="32"/>
+ <reg name="AMR" bitsize="32"/>
+ <reg name="CSR" bitsize="32"/>
+ <reg name="ISR" bitsize="32"/>
+ <reg name="ICR" bitsize="32"/>
+ <reg name="IER" bitsize="32"/>
+ <reg name="ISTP" bitsize="32"/>
+ <reg name="IN" bitsize="32"/>
+ <reg name="OUT" bitsize="32"/>
+ <reg name="ACR" bitsize="32"/>
+ <reg name="ADR" bitsize="32"/>
+ <reg name="FADCR" bitsize="32"/>
+ <reg name="FAUCR" bitsize="32"/>
+ <reg name="FMCR" bitsize="32"/>
+ <reg name="GFPGFR" bitsize="32"/>
+ <reg name="DIER" bitsize="32"/>
+ <reg name="REP" bitsize="32"/>
+ <reg name="TSCL" bitsize="32"/>
+ <reg name="TSCH" bitsize="32"/>
+ <reg name="ARP" bitsize="32"/>
+ <reg name="ILC" bitsize="32"/>
+ <reg name="RILC" bitsize="32"/>
+ <reg name="DNUM" bitsize="32"/>
+ <reg name="SSR" bitsize="32"/>
+ <reg name="GPLYA" bitsize="32"/>
+ <reg name="GPLYB" bitsize="32"/>
+ <reg name="TSR" bitsize="32"/>
+ <reg name="ITSR" bitsize="32"/>
+ <reg name="NTSR" bitsize="32"/>
+ <reg name="EFR" bitsize="32"/>
+ <reg name="IERR" bitsize="32"/>
+ <reg name="DMSG" bitsize="32"/>
+ <reg name="CMSG" bitsize="32"/>
+ <reg name="DT_DMA_ADDR" bitsize="32"/>
+ <reg name="DT_DMA_DATA" bitsize="32"/>
+ <reg name="DT_DMA_CNTL" bitsize="32"/>
+ <reg name="TCU_CNTL" bitsize="32"/>
+ <reg name="RTDX_REC_CNTL" bitsize="32"/>
+ <reg name="RTDX_XMT_CNTL" bitsize="32"/>
+ <reg name="RTDX_CFG" bitsize="32"/>
+ <reg name="RTDX_RDATA" bitsize="32"/>
+ <reg name="RTDX_WDATA" bitsize="32"/>
+ <reg name="RTDX_RADDR" bitsize="32"/>
+ <reg name="RTDX_WADDR" bitsize="32"/>
+ <reg name="MFREG0" bitsize="32"/>
+ <reg name="DBG_STAT" bitsize="32"/>
+ <reg name="BRK_EN" bitsize="32"/>
+ <reg name="HWBP0_CNT" bitsize="32"/>
+ <reg name="HWBP0" bitsize="32"/>
+ <reg name="HWBP1" bitsize="32"/>
+ <reg name="HWBP2" bitsize="32"/>
+ <reg name="HWBP3" bitsize="32"/>
+ <reg name="OVERLAY" bitsize="32"/>
+ <reg name="PC_PROF" bitsize="32"/>
+ <reg name="ATSR" bitsize="32"/>
+ <reg name="TRR" bitsize="32"/>
+ <reg name="TCRR" bitsize="32"/>
+ <reg name="DESR" bitsize="32"/>
+ <reg name="DETR" bitsize="32"/>
+</feature>
diff --git a/gdb/features/tic6x-linux.xml b/gdb/features/tic6x-linux.xml
new file mode 100644
index 0000000..3c83ebf
--- /dev/null
+++ b/gdb/features/tic6x-linux.xml
@@ -0,0 +1,13 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>tic6x</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="tic6x-cpu.xml"/>
+</target>
diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
index 095c706..6b905dc 100644
--- a/gdb/gdbserver/Makefile.in
+++ b/gdb/gdbserver/Makefile.in
@@ -276,6 +276,7 @@ clean:
rm -f powerpc-isa205-altivec32l.c powerpc-isa205-vsx32l.c powerpc-isa205-altivec64l.c
rm -f powerpc-isa205-vsx64l.c
rm -f s390-linux32.c s390-linux64.c s390x-linux64.c
+ rm -f tic6x-linux.c
rm -f xml-builtin.c stamp-xml
rm -f i386-avx.c i386-avx-linux.c
rm -f amd64-avx.c amd64-avx-linux.c
@@ -428,6 +429,7 @@ linux-mips-low.o: linux-mips-low.c $(linux_low_h) $(server_h) \
linux-ppc-low.o: linux-ppc-low.c $(linux_low_h) $(server_h)
linux-s390-low.o: linux-s390-low.c $(linux_low_h) $(server_h)
linux-sh-low.o: linux-sh-low.c $(linux_low_h) $(server_h)
+linux-tic6x-low.o: linux-tic6x-low.c $(linux_low_h) $(server_h)
linux-x86-low.o: linux-x86-low.c $(linux_low_h) $(server_h) \
$(gdb_proc_service_h) $(i386_low_h)
linux-xtensa-low.o: linux-xtensa-low.c xtensa-xtregs.c $(linux_low_h) $(server_h)
@@ -563,6 +565,9 @@ s390-linux64.c : $(srcdir)/../regformats/s390-linux64.dat $(regdat_sh)
s390x-linux64.o : s390x-linux64.c $(regdef_h)
s390x-linux64.c : $(srcdir)/../regformats/s390x-linux64.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/s390x-linux64.dat s390x-linux64.c
+tic6x-linux.o : tic6x-linux.c $(regdef_h)
+tic6x-linux.c : $(srcdir)/../regformats/tic6x-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/tic6x-linux.dat tic6x-linux.c
reg-sh.o : reg-sh.c $(regdef_h)
reg-sh.c : $(srcdir)/../regformats/reg-sh.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-sh.dat reg-sh.c
diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
index 55dd4cf..5a245fc 100644
--- a/gdb/gdbserver/configure.srv
+++ b/gdb/gdbserver/configure.srv
@@ -243,6 +243,12 @@ case "${target}" in
spu*-*-*) srv_regobj=reg-spu.o
srv_tgtobj="spu-low.o"
;;
+ tic6x-*-uclinux) srv_regobj=tic6x-linux.o
+ srv_tgtobj="linux-low.o linux-tic6x-low.o"
+ srv_linux_regsets=yes
+ srv_linux_usrregs=yes
+ srv_linux_thread_db=yes
+ ;;
x86_64-*-linux*) srv_regobj="$srv_amd64_linux_regobj $srv_i386_linux_regobj"
srv_tgtobj="linux-low.o linux-x86-low.o i386-low.o i387-fp.o"
srv_xmlfiles="$srv_i386_linux_xmlfiles $srv_amd64_linux_xmlfiles"
diff --git a/gdb/gdbserver/linux-low.c b/gdb/gdbserver/linux-low.c
index 1e9a4fb..0f2f5de 100644
--- a/gdb/gdbserver/linux-low.c
+++ b/gdb/gdbserver/linux-low.c
@@ -4347,6 +4347,10 @@ linux_stopped_data_address (void)
#define PT_TEXT_ADDR 220
#define PT_TEXT_END_ADDR 224
#define PT_DATA_ADDR 228
+#elif defined(__TMS320C6X__)
+#define PT_TEXT_ADDR (0x10000 * 4)
+#define PT_DATA_ADDR (0x10004 * 4)
+#define PT_TEXT_END_ADDR (0x10008 * 4)
#endif
/* Under uClinux, programs are loaded at non-zero offsets, which we need
diff --git a/gdb/gdbserver/linux-tic6x-low.c b/gdb/gdbserver/linux-tic6x-low.c
new file mode 100644
index 0000000..04be46d
--- /dev/null
+++ b/gdb/gdbserver/linux-tic6x-low.c
@@ -0,0 +1,346 @@
+/* Target dependent code for GDB on TI C6x systems.
+
+ Copyright (C) 2010, 2011
+ Free Software Foundation, Inc.
+ Contributed by Andrew Jenner <andrew@codesourcery.com>
+ Contributed by Yao Qi <yao@codesourcery.com>
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#include "server.h"
+#include "linux-low.h"
+
+#include <sys/ptrace.h>
+#include <endian.h>
+
+#include "gdb_proc_service.h"
+
+#ifndef PTRACE_GET_THREAD_AREA
+#define PTRACE_GET_THREAD_AREA 25
+#endif
+
+#define tic6x_num_regs 127
+
+#include <asm/ptrace.h>
+
+/* Defined in auto-generated file tic6x-linux.c. */
+void init_registers_tic6x_linux (void);
+
+union tic6x_register
+{
+ unsigned char buf[4];
+
+ int reg32;
+};
+
+/* Return the ptrace ``address'' of register REGNO. */
+
+#if __BYTE_ORDER == __BIG_ENDIAN
+static int tic6x_regmap_c64xp[] = {
+ 53, 52, 55, 54, 57, 56, 59, 58,
+ 61, 60, 63, 62, 65, 64, 67, 66,
+ 23, 22, 25, 24, 27, 26, 29, 28,
+ 31, 30, 33, 32, 35, 34, 69, 68,
+ -1, 4, -1, -1, -1, 37, 36, 39,
+ 38, 41, 40, 43, 42, 45, 44, 47,
+ 46, 49, 48, 51, 50, 7, 6, 9,
+ 8, 11, 10, 13, 12, 15, 14, 17,
+ 16, 19, 18, 21, 20, -1, 5, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ 3, 2, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1
+};
+
+static int tic6x_regmap_c64x[] = {
+ 51, 50, 53, 52, 55, 54, 57, 56,
+ 59, 58, 61, 60, 63, 62, 65, 64,
+ 21, 20, 23, 22, 25, 24, 27, 26,
+ 29, 28, 31, 30, 33, 32, 67, 66,
+ -1, 2, -1, -1, -1, 35, 34, 37,
+ 36, 39, 38, 41, 40, 43, 42, 45,
+ 44, 47, 46, 49, 48, 5, 4, 7,
+ 6, 9, 8, 11, 10, 13, 12, 15,
+ 14, 17, 16, 19, 18, -1, 3, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1
+};
+
+static int tic6x_regmap_c62x[] = {
+ 19, 18, 21, 20, 23, 22, 25, 24,
+ 27, 26, 29, 28, 31, 30, 33, 32,
+ 5, 4, 7, 6, 9, 8, 11, 10,
+ 13, 12, 15, 14, 17, 16, 35, 34,
+ -1, 2, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, 3, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1
+};
+
+#else
+static int tic6x_regmap_c64xp[] = {
+ 52, 53, 54, 55, 56, 57, 58, 59,
+ 60, 61, 62, 63, 64, 65, 66, 67,
+ 22, 23, 24, 25, 26, 27, 28, 29,
+ 30, 31, 32, 33, 34, 35, 68, 69,
+ -1, 5, -1, -1, -1, 36, 37, 38,
+ 39, 40, 41, 42, 43, 44, 45, 46,
+ 47, 48, 49, 50, 51, 6, 7, 8,
+ 9, 10, 11, 12, 13, 14, 15, 16,
+ 17, 18, 19, 20, 31, -1, 4, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ 2, 3, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1
+};
+
+static int tic6x_regmap_c64x[] = {
+ 50, 51, 52, 53, 54, 55, 56, 57,
+ 58, 59, 60, 61, 62, 63, 64, 65,
+ 20, 21, 22, 23, 24, 25, 26, 27,
+ 28, 29, 30, 31, 32, 33, 66, 67,
+ -1, 3, -1, -1, -1, 34, 35, 36,
+ 37, 38, 39, 40, 41, 42, 43, 44,
+ 45, 46, 47, 48, 49, 4, 5, 6,
+ 7, 8, 9, 10, 11, 12, 13, 14,
+ 15, 16, 17, 18, 19, -1, 3, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1
+};
+
+static int tic6x_regmap_c62x[] = {
+ 18, 19, 20, 21, 22, 23, 24, 25,
+ 26, 27, 28, 29, 30, 31, 32, 33,
+ 4, 5, 6, 7, 8, 9, 10, 11,
+ 12, 13, 14, 15, 16, 17, 34, 35,
+ -1, 3, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, 2, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1
+};
+
+#endif
+
+extern struct linux_target_ops the_low_target;
+
+static int *tic6x_regmap;
+static unsigned int tic6x_breakpoint;
+
+static void
+tic6x_arch_setup (void)
+{
+ register unsigned int csr asm ("B2");
+ unsigned int cpuid;
+
+ init_registers_tic6x_linux ();
+
+ /* Determine the CPU we're running on to find the register order. */
+ __asm__ ("MVC .S2 CSR,%0" : "=r" (csr) :);
+ cpuid = csr >> 24;
+ switch (cpuid)
+ {
+ case 0x00: /* C62x */
+ case 0x02: /* C67x */
+ tic6x_regmap = tic6x_regmap_c62x;
+ tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
+ break;
+ case 0x03: /* C67x+ */
+ tic6x_regmap = tic6x_regmap_c64x;
+ tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
+ break;
+ case 0x0c: /* C64x */
+ tic6x_regmap = tic6x_regmap_c64x;
+ tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
+ break;
+ case 0x10: /* C64x+ */
+ case 0x14: /* C674x */
+ case 0x15: /* C66x */
+ tic6x_regmap = tic6x_regmap_c64xp;
+ tic6x_breakpoint = 0x56454314; /* illegal opcode */
+ break;
+ default:
+ error("Unknown CPU ID 0x%02x", cpuid);
+ }
+ the_low_target.regmap = tic6x_regmap;
+}
+
+static int
+tic6x_cannot_fetch_register (int regno)
+{
+ return (tic6x_regmap[regno] == -1);
+}
+
+static int
+tic6x_cannot_store_register (int regno)
+{
+ return (tic6x_regmap[regno] == -1);
+}
+
+static CORE_ADDR
+tic6x_get_pc (struct regcache *regcache)
+{
+ union tic6x_register pc;
+
+ collect_register_by_name (regcache, "PC", pc.buf);
+ return pc.reg32;
+}
+
+static void
+tic6x_set_pc (struct regcache *regcache, CORE_ADDR pc)
+{
+ union tic6x_register newpc;
+
+ newpc.reg32 = pc;
+ supply_register_by_name (regcache, "PC", newpc.buf);
+}
+
+#define tic6x_breakpoint_len 4
+
+static int
+tic6x_breakpoint_at (CORE_ADDR where)
+{
+ unsigned int insn;
+
+ (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
+ if (insn == tic6x_breakpoint)
+ return 1;
+
+ /* If necessary, recognize more trap instructions here. GDB only uses the
+ one. */
+ return 0;
+}
+
+/* Fetch the thread-local storage pointer for libthread_db. */
+
+ps_err_e
+ps_get_thread_area (const struct ps_prochandle *ph,
+ lwpid_t lwpid, int idx, void **base)
+{
+ if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
+ return PS_ERR;
+
+ /* IDX is the bias from the thread pointer to the beginning of the
+ thread descriptor. It has to be subtracted due to implementation
+ quirks in libthread_db. */
+ *base = (void *) ((char *)*base - idx);
+
+ return PS_OK;
+}
+
+#ifdef HAVE_PTRACE_GETREGS
+
+static void
+tic6x_collect_register (struct regcache *regcache, int regno,
+ union tic6x_register *reg)
+{
+ union tic6x_register tmp_reg;
+
+ collect_register (regcache, regno, &tmp_reg.reg32);
+ reg->reg32 = tmp_reg.reg32;
+}
+
+static void
+tic6x_supply_register (struct regcache *regcache, int regno,
+ const union tic6x_register *reg)
+{
+ int offset = 0;
+
+ supply_register (regcache, regno, reg->buf + offset);
+}
+
+static void
+tic6x_fill_gregset (struct regcache *regcache, void *buf)
+{
+ union tic6x_register *regset = buf;
+ int i;
+
+ for (i = 0; i < tic6x_num_regs; i++)
+ if (tic6x_regmap[i] != -1)
+ tic6x_collect_register (regcache, i, regset + tic6x_regmap[i]);
+}
+
+static void
+tic6x_store_gregset (struct regcache *regcache, const void *buf)
+{
+ const union tic6x_register *regset = buf;
+ int i;
+ char zerobuf[4];
+
+ memset (zerobuf, 0, 4);
+ for (i = 0; i < tic6x_num_regs; i++)
+ {
+ if (tic6x_regmap[i] != -1)
+ tic6x_supply_register (regcache, i, regset + tic6x_regmap[i]);
+ else
+ supply_register (regcache, i, zerobuf);
+ }
+}
+#endif /* HAVE_PTRACE_GETREGS */
+
+struct regset_info target_regsets[] = {
+#ifdef HAVE_PTRACE_GETREGS
+ { PTRACE_GETREGS, PTRACE_SETREGS, 0, 127 * 4, GENERAL_REGS,
+ tic6x_fill_gregset, tic6x_store_gregset },
+#endif /* HAVE_PTRACE_GETREGS */
+ { 0, 0, 0, -1, -1, NULL, NULL }
+};
+
+struct linux_target_ops the_low_target = {
+ tic6x_arch_setup,
+ tic6x_num_regs,
+ 0,
+ tic6x_cannot_fetch_register,
+ tic6x_cannot_store_register,
+ tic6x_get_pc,
+ tic6x_set_pc,
+ (const unsigned char *) &tic6x_breakpoint,
+ tic6x_breakpoint_len,
+ NULL,
+ 0,
+ tic6x_breakpoint_at,
+};
diff --git a/gdb/regformats/tic6x-linux.dat b/gdb/regformats/tic6x-linux.dat
new file mode 100644
index 0000000..990846d
--- /dev/null
+++ b/gdb/regformats/tic6x-linux.dat
@@ -0,0 +1,131 @@
+# DO NOT EDIT: generated from tic6x-linux.xml
+name:tic6x_linux
+xmltarget:tic6x-linux.xml
+expedite:A15,PC
+32:A0
+32:A1
+32:A2
+32:A3
+32:A4
+32:A5
+32:A6
+32:A7
+32:A8
+32:A9
+32:A10
+32:A11
+32:A12
+32:A13
+32:A14
+32:A15
+32:B0
+32:B1
+32:B2
+32:B3
+32:B4
+32:B5
+32:B6
+32:B7
+32:B8
+32:B9
+32:B10
+32:B11
+32:B12
+32:B13
+32:B14
+32:B15
+32:None
+32:PC
+32:IRP
+32:IFR
+32:NPR
+32:A16
+32:A17
+32:A18
+32:A19
+32:A20
+32:A21
+32:A22
+32:A23
+32:A24
+32:A25
+32:A26
+32:A27
+32:A28
+32:A29
+32:A30
+32:A31
+32:B16
+32:B17
+32:B18
+32:B19
+32:B20
+32:B21
+32:B22
+32:B23
+32:B24
+32:B25
+32:B26
+32:B27
+32:B28
+32:B29
+32:B30
+32:B31
+32:AMR
+32:CSR
+32:ISR
+32:ICR
+32:IER
+32:ISTP
+32:IN
+32:OUT
+32:ACR
+32:ADR
+32:FADCR
+32:FAUCR
+32:FMCR
+32:GFPGFR
+32:DIER
+32:REP
+32:TSCL
+32:TSCH
+32:ARP
+32:ILC
+32:RILC
+32:DNUM
+32:SSR
+32:GPLYA
+32:GPLYB
+32:TSR
+32:ITSR
+32:NTSR
+32:EFR
+32:IERR
+32:DMSG
+32:CMSG
+32:DT_DMA_ADDR
+32:DT_DMA_DATA
+32:DT_DMA_CNTL
+32:TCU_CNTL
+32:RTDX_REC_CNTL
+32:RTDX_XMT_CNTL
+32:RTDX_CFG
+32:RTDX_RDATA
+32:RTDX_WDATA
+32:RTDX_RADDR
+32:RTDX_WADDR
+32:MFREG0
+32:DBG_STAT
+32:BRK_EN
+32:HWBP0_CNT
+32:HWBP0
+32:HWBP1
+32:HWBP2
+32:HWBP3
+32:OVERLAY
+32:PC_PROF
+32:ATSR
+32:TRR
+32:TCRR
+32:DESR
+32:DETR
--
1.7.0.4
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFA 6/8] New port: TI C6x: gdbserver
2011-07-21 9:52 ` Yao Qi
@ 2011-07-21 12:21 ` Pedro Alves
2011-07-25 7:27 ` Yao Qi
0 siblings, 1 reply; 15+ messages in thread
From: Pedro Alves @ 2011-07-21 12:21 UTC (permalink / raw)
To: gdb-patches; +Cc: Yao Qi
On Thursday 21 July 2011 08:31:19, Yao Qi wrote:
> >> +<!DOCTYPE feature SYSTEM "gdb-target.dtd">
> >> +<feature name="org.gnu.gdb.tic6x.cpu">
> >> + <reg name="A0" bitsize="32"/>
> >> + <reg name="A1" bitsize="32"/>
> >> + <reg name="A2" bitsize="32"/>
> >
> > ...
> >
> > These are all general purpose, core registers, right?
> >
>
> Not really. A0-31 and B0-31 are general purpose registers, even there
> are some difference among different C6x cores (such as C62x, C67x, and
> C64x). The rest of them can be regarded as control registers and status
> registers. The target description should be refined for the different
> C6x cores, and I'd like to do it in follow-up patches later. Is it OK?
I'd rather start with things clean than change the target's register
set after the fact, but I won't insist. At least you should document in
the manual which registers the new standard feature org.gnu.gdb.tic6x.cpu
requires (under Standard Target Features) though.
--
Pedro Alves
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFA 6/8] New port: TI C6x: gdbserver
2011-07-20 2:12 [RFA 6/8] New port: TI C6x: gdbserver Yao Qi
2011-07-20 18:22 ` Pedro Alves
@ 2011-07-21 14:04 ` Joseph S. Myers
2011-07-22 10:01 ` Yao Qi
1 sibling, 1 reply; 15+ messages in thread
From: Joseph S. Myers @ 2011-07-21 14:04 UTC (permalink / raw)
To: Yao Qi; +Cc: gdb-patches
In this patch, and also in the main GDB port, I think you've used the
wrong set of register names. Specifically, it appears you used a list
provided by TI on 22 September 2010 as an early draft of the list of DWARF
register numbers for the ABI, which had a typo I pointed out the next day
(NPR should be NRP) and was missing ECR (later inserted in the middle of
the list) and various undocumented control registers (later added at the
end). You should check the list carefully against ABI version 0.9. In
addition, the XML files should reflect the different sets of registers on
each processor variant (for details of what processors have what
undocumented control registers, see the details TI provided on 29 October
2010 - again, with a subsequent correction; the documented registers are
covered in the ISA manuals or in
include/opcode/tic6x-control-registers.h).
--
Joseph S. Myers
joseph@codesourcery.com
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFA 6/8] New port: TI C6x: gdbserver
2011-07-21 14:04 ` Joseph S. Myers
@ 2011-07-22 10:01 ` Yao Qi
0 siblings, 0 replies; 15+ messages in thread
From: Yao Qi @ 2011-07-22 10:01 UTC (permalink / raw)
To: Joseph S. Myers; +Cc: gdb-patches
On 07/21/2011 09:59 PM, Joseph S. Myers wrote:
> In this patch, and also in the main GDB port, I think you've used the
> wrong set of register names. Specifically, it appears you used a list
> provided by TI on 22 September 2010 as an early draft of the list of DWARF
> register numbers for the ABI, which had a typo I pointed out the next day
> (NPR should be NRP) and was missing ECR (later inserted in the middle of
> the list) and various undocumented control registers (later added at the
> end). You should check the list carefully against ABI version 0.9. In
In gdb side, yes, a typo should be fixed and four new control registers
should be added.
> addition, the XML files should reflect the different sets of registers on
> each processor variant (for details of what processors have what
> undocumented control registers, see the details TI provided on 29 October
> 2010 - again, with a subsequent correction; the documented registers are
> covered in the ISA manuals or in
> include/opcode/tic6x-control-registers.h).
>
In gdbserver side, we don't have to reflect the different control
registers on each C6x variant, because they are not accessible from
current ptrace (ptrace only access TSR, RILC, ILC, PC, and CSR). XML
files should be revised to reflect the different set ptrace-accessible
registers on C6x variant. I'll take care of this.
--
Yao (é½å°§)
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFA 6/8] New port: TI C6x: gdbserver
2011-07-21 12:21 ` Pedro Alves
@ 2011-07-25 7:27 ` Yao Qi
2011-07-26 18:18 ` Pedro Alves
0 siblings, 1 reply; 15+ messages in thread
From: Yao Qi @ 2011-07-25 7:27 UTC (permalink / raw)
To: Pedro Alves; +Cc: gdb-patches
[-- Attachment #1: Type: text/plain, Size: 1671 bytes --]
On 07/21/2011 07:13 PM, Pedro Alves wrote:
> On Thursday 21 July 2011 08:31:19, Yao Qi wrote:
>>>> +<!DOCTYPE feature SYSTEM "gdb-target.dtd">
>>>> +<feature name="org.gnu.gdb.tic6x.cpu">
>>>> + <reg name="A0" bitsize="32"/>
>>>> + <reg name="A1" bitsize="32"/>
>>>> + <reg name="A2" bitsize="32"/>
>>>
>>> ...
>>>
>>> These are all general purpose, core registers, right?
>>>
>>
>> Not really. A0-31 and B0-31 are general purpose registers, even there
>> are some difference among different C6x cores (such as C62x, C67x, and
>> C64x). The rest of them can be regarded as control registers and status
>> registers. The target description should be refined for the different
>> C6x cores, and I'd like to do it in follow-up patches later. Is it OK?
>
> I'd rather start with things clean than change the target's register
> set after the fact, but I won't insist. At least you should document in
> the manual which registers the new standard feature org.gnu.gdb.tic6x.cpu
> requires (under Standard Target Features) though.
>
Agree. The target description part is rewritten in the new patch, and
it should be clean now. The original xml description is split into
three xml files, and these features are documented in gdb.texinfo.
- tic6x-core.xml: core registers, exist on all C6x variants.
- tic6x-gp.xml: general purpose reigster A16-A31, B16-B31.
- tic6x-c6xp.xml: some control registers.
These three xml files compose another three xml files,
tic6x-{c64xp,c64x,c62x}-linux.xml.
gdbserver part is slightly changed for calling
init_registers_tic6x_{c63x,c64x,c64xp}_linux in tic6x_arch_setup,
according to computed CPU ID.
--
Yao (é½å°§)
[-- Attachment #2: 0005-target-description.patch --]
[-- Type: text/x-patch, Size: 27446 bytes --]
2011-07-25 Yao Qi <yao@codesourcery.com>
gdb/doc/
* gdb.texinfo: Document C6x features.
gdb/
* features/Makefile (WHICH): Add tic6x-c64xp-linux tic6x-c64x-linux
and tic6x-c62x-linux.
* features/tic6x-c6xp.xml: New.
* features/tic6x-core.xml: New.
* features/tic6x-gp.xml: New.
* features/tic6x-c62x-linux.xml: New.
* features/tic6x-c64x-linux.xml: New.
* features/tic6x-c64xp-linux.xml: New.
* features/tic6x-c64xp-linux.c: Generated.
* features/tic6x-c64x-linux.c: Generated.
* features/tic6x-c62x-linux.c: Generated.
* regformats/tic6x-c62x-linux.dat: Generated.
* regformats/tic6x-c64x-linux.dat: Generated.
* regformats/tic6x-c64xp-linux.dat: Generated.
---
gdb/doc/gdb.texinfo | 15 +++++
gdb/features/Makefile | 7 ++-
gdb/features/tic6x-c62x-linux.c | 56 ++++++++++++++++++++
gdb/features/tic6x-c62x-linux.xml | 13 +++++
gdb/features/tic6x-c64x-linux.c | 90 ++++++++++++++++++++++++++++++++
gdb/features/tic6x-c64x-linux.xml | 14 +++++
gdb/features/tic6x-c64xp-linux.c | 95 ++++++++++++++++++++++++++++++++++
gdb/features/tic6x-c64xp-linux.xml | 15 +++++
gdb/features/tic6x-c6xp.xml | 13 +++++
gdb/features/tic6x-core.xml | 44 ++++++++++++++++
gdb/features/tic6x-gp.xml | 42 +++++++++++++++
gdb/regformats/tic6x-c62x-linux.dat | 38 +++++++++++++
gdb/regformats/tic6x-c64x-linux.dat | 70 +++++++++++++++++++++++++
gdb/regformats/tic6x-c64xp-linux.dat | 73 ++++++++++++++++++++++++++
14 files changed, 583 insertions(+), 2 deletions(-)
create mode 100644 gdb/features/tic6x-c62x-linux.c
create mode 100644 gdb/features/tic6x-c62x-linux.xml
create mode 100644 gdb/features/tic6x-c64x-linux.c
create mode 100644 gdb/features/tic6x-c64x-linux.xml
create mode 100644 gdb/features/tic6x-c64xp-linux.c
create mode 100644 gdb/features/tic6x-c64xp-linux.xml
create mode 100644 gdb/features/tic6x-c6xp.xml
create mode 100644 gdb/features/tic6x-core.xml
create mode 100644 gdb/features/tic6x-gp.xml
create mode 100644 gdb/regformats/tic6x-c62x-linux.dat
create mode 100644 gdb/regformats/tic6x-c64x-linux.dat
create mode 100644 gdb/regformats/tic6x-c64xp-linux.dat
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index 37c81b8..f5f1f53 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -36854,6 +36854,7 @@ registers using the capitalization used in the description.
* MIPS Features::
* M68K Features::
* PowerPC Features::
+* C6x Features::
@end menu
@@ -37015,6 +37016,20 @@ contain registers @samp{ev0h} through @samp{ev31h}, @samp{acc}, and
these to present registers @samp{ev0} through @samp{ev31} to the
user.
+@node C6x Features
+@subsection C6x Features
+@cindex target descriptions, C6x features
+The @samp{org.gnu.gdb.tic6x.core} feature is required for C6x
+targets. It should contain registers @samp{A0} through @samp{A15},
+registers @samp{B0} through @samp{B15}, @samp{CSR} and @samp{PC}.
+
+The @samp{org.gnu.gdb.tic6x.gp} feature is optional. It should
+contain registers @samp{A16} through @samp{A31} and @samp{B16}
+through @samp{B31}.
+
+The @samp{org.gnu.gdb.tic6x.c6xp} feature is optional. It should
+contain registers @samp{TSR}, @samp{ILC} and @samp{RILC}.
+
@node Operating System Information
@appendix Operating System Information
@cindex operating system information
diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index 4e8e7ee..e7e72d1 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -41,7 +41,8 @@ WHICH = arm-with-iwmmxt arm-with-vfpv2 arm-with-vfpv3 arm-with-neon \
rs6000/powerpc-32l rs6000/powerpc-altivec32l rs6000/powerpc-e500l \
rs6000/powerpc-64l rs6000/powerpc-altivec64l rs6000/powerpc-vsx32l \
rs6000/powerpc-vsx64l rs6000/powerpc-cell32l rs6000/powerpc-cell64l \
- s390-linux32 s390-linux64 s390x-linux64
+ s390-linux32 s390-linux64 s390x-linux64 \
+ tic6x-c64xp-linux tic6x-c64x-linux tic6x-c62x-linux
# Record which registers should be sent to GDB by default after stop.
arm-expedite = r11,sp,pc
@@ -63,7 +64,9 @@ rs6000/powerpc-cell64l-expedite = r1,pc,r0,orig_r3,r4
s390-linux32-expedite = r14,r15,pswa
s390-linux64-expedite = r14l,r15l,pswa
s390x-linux64-expedite = r14,r15,pswa
-
+tic6x-c64xp-linux-expedite = A15,PC
+tic6x-c64x-linux-expedite = A15,PC
+tic6x-c62x-linux-expedite = A15,PC
XSLTPROC = xsltproc
outdir = ../regformats
diff --git a/gdb/features/tic6x-c62x-linux.c b/gdb/features/tic6x-c62x-linux.c
new file mode 100644
index 0000000..df82fc2
--- /dev/null
+++ b/gdb/features/tic6x-c62x-linux.c
@@ -0,0 +1,56 @@
+/* THIS FILE IS GENERATED. Original: tic6x-c62x-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_tic6x_c62x_linux;
+static void
+initialize_tdesc_tic6x_c62x_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type, *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("tic6x"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.core");
+ tdesc_create_reg (feature, "A0", 0, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A1", 1, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A2", 2, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A3", 3, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A4", 4, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A5", 5, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A6", 6, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A7", 7, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A8", 8, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A9", 9, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A10", 10, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A11", 11, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A12", 12, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A13", 13, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A14", 14, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A15", 15, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B0", 16, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B1", 17, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B2", 18, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B3", 19, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B4", 20, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B5", 21, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B6", 22, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B7", 23, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B8", 24, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B9", 25, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B10", 26, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B11", 27, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B12", 28, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B13", 29, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B14", 30, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B15", 31, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "CSR", 32, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "PC", 33, 1, NULL, 32, "code_ptr");
+
+ tdesc_tic6x_c62x_linux = result;
+}
diff --git a/gdb/features/tic6x-c62x-linux.xml b/gdb/features/tic6x-c62x-linux.xml
new file mode 100644
index 0000000..0319438
--- /dev/null
+++ b/gdb/features/tic6x-c62x-linux.xml
@@ -0,0 +1,13 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>tic6x</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="tic6x-core.xml"/>
+</target>
diff --git a/gdb/features/tic6x-c64x-linux.c b/gdb/features/tic6x-c64x-linux.c
new file mode 100644
index 0000000..39f9e95
--- /dev/null
+++ b/gdb/features/tic6x-c64x-linux.c
@@ -0,0 +1,90 @@
+/* THIS FILE IS GENERATED. Original: tic6x-c64x-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_tic6x_c64x_linux;
+static void
+initialize_tdesc_tic6x_c64x_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type, *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("tic6x"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.core");
+ tdesc_create_reg (feature, "A0", 0, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A1", 1, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A2", 2, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A3", 3, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A4", 4, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A5", 5, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A6", 6, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A7", 7, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A8", 8, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A9", 9, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A10", 10, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A11", 11, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A12", 12, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A13", 13, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A14", 14, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A15", 15, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B0", 16, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B1", 17, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B2", 18, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B3", 19, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B4", 20, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B5", 21, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B6", 22, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B7", 23, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B8", 24, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B9", 25, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B10", 26, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B11", 27, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B12", 28, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B13", 29, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B14", 30, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B15", 31, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "CSR", 32, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "PC", 33, 1, NULL, 32, "code_ptr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.gp");
+ tdesc_create_reg (feature, "A16", 34, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A17", 35, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A18", 36, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A19", 37, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A20", 38, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A21", 39, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A22", 40, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A23", 41, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A24", 42, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A25", 43, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A26", 44, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A27", 45, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A28", 46, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A29", 47, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A30", 48, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A31", 49, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B16", 50, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B17", 51, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B18", 52, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B19", 53, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B20", 54, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B21", 55, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B22", 56, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B23", 57, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B24", 58, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B25", 59, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B26", 60, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B27", 61, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B28", 62, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B29", 63, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B30", 64, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B31", 65, 1, NULL, 32, "uint32");
+
+ tdesc_tic6x_c64x_linux = result;
+}
diff --git a/gdb/features/tic6x-c64x-linux.xml b/gdb/features/tic6x-c64x-linux.xml
new file mode 100644
index 0000000..2d11bd0
--- /dev/null
+++ b/gdb/features/tic6x-c64x-linux.xml
@@ -0,0 +1,14 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>tic6x</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="tic6x-core.xml"/>
+ <xi:include href="tic6x-gp.xml"/>
+</target>
diff --git a/gdb/features/tic6x-c64xp-linux.c b/gdb/features/tic6x-c64xp-linux.c
new file mode 100644
index 0000000..a959ec6
--- /dev/null
+++ b/gdb/features/tic6x-c64xp-linux.c
@@ -0,0 +1,95 @@
+/* THIS FILE IS GENERATED. Original: tic6x-c64xp-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_tic6x_c64xp_linux;
+static void
+initialize_tdesc_tic6x_c64xp_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type, *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("tic6x"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.core");
+ tdesc_create_reg (feature, "A0", 0, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A1", 1, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A2", 2, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A3", 3, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A4", 4, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A5", 5, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A6", 6, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A7", 7, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A8", 8, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A9", 9, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A10", 10, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A11", 11, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A12", 12, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A13", 13, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A14", 14, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A15", 15, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B0", 16, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B1", 17, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B2", 18, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B3", 19, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B4", 20, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B5", 21, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B6", 22, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B7", 23, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B8", 24, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B9", 25, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B10", 26, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B11", 27, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B12", 28, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B13", 29, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B14", 30, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B15", 31, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "CSR", 32, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "PC", 33, 1, NULL, 32, "code_ptr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.gp");
+ tdesc_create_reg (feature, "A16", 34, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A17", 35, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A18", 36, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A19", 37, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A20", 38, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A21", 39, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A22", 40, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A23", 41, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A24", 42, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A25", 43, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A26", 44, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A27", 45, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A28", 46, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A29", 47, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A30", 48, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A31", 49, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B16", 50, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B17", 51, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B18", 52, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B19", 53, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B20", 54, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B21", 55, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B22", 56, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B23", 57, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B24", 58, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B25", 59, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B26", 60, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B27", 61, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B28", 62, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B29", 63, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B30", 64, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B31", 65, 1, NULL, 32, "uint32");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.c6xp");
+ tdesc_create_reg (feature, "TSR", 66, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "ILC", 67, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "RILC", 68, 1, NULL, 32, "uint32");
+
+ tdesc_tic6x_c64xp_linux = result;
+}
diff --git a/gdb/features/tic6x-c64xp-linux.xml b/gdb/features/tic6x-c64xp-linux.xml
new file mode 100644
index 0000000..6ff8407
--- /dev/null
+++ b/gdb/features/tic6x-c64xp-linux.xml
@@ -0,0 +1,15 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>tic6x</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="tic6x-core.xml"/>
+ <xi:include href="tic6x-gp.xml"/>
+ <xi:include href="tic6x-c6xp.xml"/>
+</target>
diff --git a/gdb/features/tic6x-c6xp.xml b/gdb/features/tic6x-c6xp.xml
new file mode 100644
index 0000000..0923b1b
--- /dev/null
+++ b/gdb/features/tic6x-c6xp.xml
@@ -0,0 +1,13 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.tic6x.c6xp">
+ <reg name="TSR" bitsize="32" type="uint32"/>
+ <reg name="ILC" bitsize="32" type="uint32"/>
+ <reg name="RILC" bitsize="32" type="uint32"/>
+</feature>
diff --git a/gdb/features/tic6x-core.xml b/gdb/features/tic6x-core.xml
new file mode 100644
index 0000000..63074eb
--- /dev/null
+++ b/gdb/features/tic6x-core.xml
@@ -0,0 +1,44 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.tic6x.core">
+ <reg name="A0" bitsize="32" type="uint32"/>
+ <reg name="A1" bitsize="32" type="uint32"/>
+ <reg name="A2" bitsize="32" type="uint32"/>
+ <reg name="A3" bitsize="32" type="uint32"/>
+ <reg name="A4" bitsize="32" type="uint32"/>
+ <reg name="A5" bitsize="32" type="uint32"/>
+ <reg name="A6" bitsize="32" type="uint32"/>
+ <reg name="A7" bitsize="32" type="uint32"/>
+ <reg name="A8" bitsize="32" type="uint32"/>
+ <reg name="A9" bitsize="32" type="uint32"/>
+ <reg name="A10" bitsize="32" type="uint32"/>
+ <reg name="A11" bitsize="32" type="uint32"/>
+ <reg name="A12" bitsize="32" type="uint32"/>
+ <reg name="A13" bitsize="32" type="uint32"/>
+ <reg name="A14" bitsize="32" type="uint32"/>
+ <reg name="A15" bitsize="32" type="uint32"/>
+ <reg name="B0" bitsize="32" type="uint32"/>
+ <reg name="B1" bitsize="32" type="uint32"/>
+ <reg name="B2" bitsize="32" type="uint32"/>
+ <reg name="B3" bitsize="32" type="uint32"/>
+ <reg name="B4" bitsize="32" type="uint32"/>
+ <reg name="B5" bitsize="32" type="uint32"/>
+ <reg name="B6" bitsize="32" type="uint32"/>
+ <reg name="B7" bitsize="32" type="uint32"/>
+ <reg name="B8" bitsize="32" type="uint32"/>
+ <reg name="B9" bitsize="32" type="uint32"/>
+ <reg name="B10" bitsize="32" type="uint32"/>
+ <reg name="B11" bitsize="32" type="uint32"/>
+ <reg name="B12" bitsize="32" type="uint32"/>
+ <reg name="B13" bitsize="32" type="uint32"/>
+ <reg name="B14" bitsize="32" type="uint32"/>
+ <reg name="B15" bitsize="32" type="uint32"/>
+ <reg name="CSR" bitsize="32" type="uint32"/>
+ <reg name="PC" bitsize="32" type="code_ptr"/>
+</feature>
diff --git a/gdb/features/tic6x-gp.xml b/gdb/features/tic6x-gp.xml
new file mode 100644
index 0000000..d1249f3
--- /dev/null
+++ b/gdb/features/tic6x-gp.xml
@@ -0,0 +1,42 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.tic6x.gp">
+ <reg name="A16" bitsize="32" type="uint32"/>
+ <reg name="A17" bitsize="32" type="uint32"/>
+ <reg name="A18" bitsize="32" type="uint32"/>
+ <reg name="A19" bitsize="32" type="uint32"/>
+ <reg name="A20" bitsize="32" type="uint32"/>
+ <reg name="A21" bitsize="32" type="uint32"/>
+ <reg name="A22" bitsize="32" type="uint32"/>
+ <reg name="A23" bitsize="32" type="uint32"/>
+ <reg name="A24" bitsize="32" type="uint32"/>
+ <reg name="A25" bitsize="32" type="uint32"/>
+ <reg name="A26" bitsize="32" type="uint32"/>
+ <reg name="A27" bitsize="32" type="uint32"/>
+ <reg name="A28" bitsize="32" type="uint32"/>
+ <reg name="A29" bitsize="32" type="uint32"/>
+ <reg name="A30" bitsize="32" type="uint32"/>
+ <reg name="A31" bitsize="32" type="uint32"/>
+ <reg name="B16" bitsize="32" type="uint32"/>
+ <reg name="B17" bitsize="32" type="uint32"/>
+ <reg name="B18" bitsize="32" type="uint32"/>
+ <reg name="B19" bitsize="32" type="uint32"/>
+ <reg name="B20" bitsize="32" type="uint32"/>
+ <reg name="B21" bitsize="32" type="uint32"/>
+ <reg name="B22" bitsize="32" type="uint32"/>
+ <reg name="B23" bitsize="32" type="uint32"/>
+ <reg name="B24" bitsize="32" type="uint32"/>
+ <reg name="B25" bitsize="32" type="uint32"/>
+ <reg name="B26" bitsize="32" type="uint32"/>
+ <reg name="B27" bitsize="32" type="uint32"/>
+ <reg name="B28" bitsize="32" type="uint32"/>
+ <reg name="B29" bitsize="32" type="uint32"/>
+ <reg name="B30" bitsize="32" type="uint32"/>
+ <reg name="B31" bitsize="32" type="uint32"/>
+</feature>
diff --git a/gdb/regformats/tic6x-c62x-linux.dat b/gdb/regformats/tic6x-c62x-linux.dat
new file mode 100644
index 0000000..3758d84
--- /dev/null
+++ b/gdb/regformats/tic6x-c62x-linux.dat
@@ -0,0 +1,38 @@
+# DO NOT EDIT: generated from tic6x-c62x-linux.xml
+name:tic6x_c62x_linux
+xmltarget:tic6x-c62x-linux.xml
+expedite:A15,PC
+32:A0
+32:A1
+32:A2
+32:A3
+32:A4
+32:A5
+32:A6
+32:A7
+32:A8
+32:A9
+32:A10
+32:A11
+32:A12
+32:A13
+32:A14
+32:A15
+32:B0
+32:B1
+32:B2
+32:B3
+32:B4
+32:B5
+32:B6
+32:B7
+32:B8
+32:B9
+32:B10
+32:B11
+32:B12
+32:B13
+32:B14
+32:B15
+32:CSR
+32:PC
diff --git a/gdb/regformats/tic6x-c64x-linux.dat b/gdb/regformats/tic6x-c64x-linux.dat
new file mode 100644
index 0000000..8b1724c
--- /dev/null
+++ b/gdb/regformats/tic6x-c64x-linux.dat
@@ -0,0 +1,70 @@
+# DO NOT EDIT: generated from tic6x-c64x-linux.xml
+name:tic6x_c64x_linux
+xmltarget:tic6x-c64x-linux.xml
+expedite:A15,PC
+32:A0
+32:A1
+32:A2
+32:A3
+32:A4
+32:A5
+32:A6
+32:A7
+32:A8
+32:A9
+32:A10
+32:A11
+32:A12
+32:A13
+32:A14
+32:A15
+32:B0
+32:B1
+32:B2
+32:B3
+32:B4
+32:B5
+32:B6
+32:B7
+32:B8
+32:B9
+32:B10
+32:B11
+32:B12
+32:B13
+32:B14
+32:B15
+32:CSR
+32:PC
+32:A16
+32:A17
+32:A18
+32:A19
+32:A20
+32:A21
+32:A22
+32:A23
+32:A24
+32:A25
+32:A26
+32:A27
+32:A28
+32:A29
+32:A30
+32:A31
+32:B16
+32:B17
+32:B18
+32:B19
+32:B20
+32:B21
+32:B22
+32:B23
+32:B24
+32:B25
+32:B26
+32:B27
+32:B28
+32:B29
+32:B30
+32:B31
diff --git a/gdb/regformats/tic6x-c64xp-linux.dat b/gdb/regformats/tic6x-c64xp-linux.dat
new file mode 100644
index 0000000..4d12148
--- /dev/null
+++ b/gdb/regformats/tic6x-c64xp-linux.dat
@@ -0,0 +1,73 @@
+# DO NOT EDIT: generated from tic6x-c64xp-linux.xml
+name:tic6x_c64xp_linux
+xmltarget:tic6x-c64xp-linux.xml
+expedite:A15,PC
+32:A0
+32:A1
+32:A2
+32:A3
+32:A4
+32:A5
+32:A6
+32:A7
+32:A8
+32:A9
+32:A10
+32:A11
+32:A12
+32:A13
+32:A14
+32:A15
+32:B0
+32:B1
+32:B2
+32:B3
+32:B4
+32:B5
+32:B6
+32:B7
+32:B8
+32:B9
+32:B10
+32:B11
+32:B12
+32:B13
+32:B14
+32:B15
+32:CSR
+32:PC
+32:A16
+32:A17
+32:A18
+32:A19
+32:A20
+32:A21
+32:A22
+32:A23
+32:A24
+32:A25
+32:A26
+32:A27
+32:A28
+32:A29
+32:A30
+32:A31
+32:B16
+32:B17
+32:B18
+32:B19
+32:B20
+32:B21
+32:B22
+32:B23
+32:B24
+32:B25
+32:B26
+32:B27
+32:B28
+32:B29
+32:B30
+32:B31
+32:TSR
+32:ILC
+32:RILC
--
1.7.0.4
[-- Attachment #3: 0007-gdbserver-tic6x.patch --]
[-- Type: text/x-patch, Size: 13605 bytes --]
2011-07-19 Andrew Jenner <andrew@codesourcery.com>
Yao Qi <yao@codesourcery.com>
gdb/gdbserver/
* Makefile.in (clean): Remove tic6x-c64xp-linux.c, tic6x-c64x-linux.c
and tic6x-c62x-linux.c.
(linux-tic6x-low.o, tic6x-c62x-linux.o, tic6x-c64x-linux.o): New rules.
(tic6x-c64xp-linux.o, tic6x-c62x-linux.c, tic6x-c64x-linux.c): Likewise.
(tic6x-c64xp-linux.c): Likewise.
* configure.srv: Add support for tic6x-*-uclinux.
* linux-tic6x-low.c: New.
* linux-low.c (PT_TEXT_ADDR, PT_DATA_ADDR, PT_TEXT_END_ADDR):
Define.
---
gdb/gdbserver/Makefile.in | 11 ++
gdb/gdbserver/configure.srv | 14 ++
gdb/gdbserver/linux-low.c | 4 +
gdb/gdbserver/linux-tic6x-low.c | 339 +++++++++++++++++++++++++++++++++++++++
4 files changed, 368 insertions(+), 0 deletions(-)
create mode 100644 gdb/gdbserver/linux-tic6x-low.c
diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
index 095c706..a1e0c43 100644
--- a/gdb/gdbserver/Makefile.in
+++ b/gdb/gdbserver/Makefile.in
@@ -276,6 +276,7 @@ clean:
rm -f powerpc-isa205-altivec32l.c powerpc-isa205-vsx32l.c powerpc-isa205-altivec64l.c
rm -f powerpc-isa205-vsx64l.c
rm -f s390-linux32.c s390-linux64.c s390x-linux64.c
+ rm -f tic6x-c64xp-linux.c tic6x-c64x-linux.c tic6x-c62x-linux.c
rm -f xml-builtin.c stamp-xml
rm -f i386-avx.c i386-avx-linux.c
rm -f amd64-avx.c amd64-avx-linux.c
@@ -428,6 +429,7 @@ linux-mips-low.o: linux-mips-low.c $(linux_low_h) $(server_h) \
linux-ppc-low.o: linux-ppc-low.c $(linux_low_h) $(server_h)
linux-s390-low.o: linux-s390-low.c $(linux_low_h) $(server_h)
linux-sh-low.o: linux-sh-low.c $(linux_low_h) $(server_h)
+linux-tic6x-low.o: linux-tic6x-low.c $(linux_low_h) $(server_h)
linux-x86-low.o: linux-x86-low.c $(linux_low_h) $(server_h) \
$(gdb_proc_service_h) $(i386_low_h)
linux-xtensa-low.o: linux-xtensa-low.c xtensa-xtregs.c $(linux_low_h) $(server_h)
@@ -563,6 +565,15 @@ s390-linux64.c : $(srcdir)/../regformats/s390-linux64.dat $(regdat_sh)
s390x-linux64.o : s390x-linux64.c $(regdef_h)
s390x-linux64.c : $(srcdir)/../regformats/s390x-linux64.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/s390x-linux64.dat s390x-linux64.c
+tic6x-c64xp-linux.o : tic6x-c64xp-linux.c $(regdef_h)
+tic6x-c64xp-linux.c : $(srcdir)/../regformats/tic6x-c64xp-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/tic6x-c64xp-linux.dat tic6x-c64xp-linux.c
+tic6x-c64x-linux.o : tic6x-c64x-linux.c $(regdef_h)
+tic6x-c64x-linux.c : $(srcdir)/../regformats/tic6x-c64x-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/tic6x-c64x-linux.dat tic6x-c64x-linux.c
+tic6x-c62x-linux.o : tic6x-c62x-linux.c $(regdef_h)
+tic6x-c62x-linux.c : $(srcdir)/../regformats/tic6x-c62x-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/tic6x-c62x-linux.dat tic6x-c62x-linux.c
reg-sh.o : reg-sh.c $(regdef_h)
reg-sh.c : $(srcdir)/../regformats/reg-sh.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-sh.dat reg-sh.c
diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
index 55dd4cf..9c657e7 100644
--- a/gdb/gdbserver/configure.srv
+++ b/gdb/gdbserver/configure.srv
@@ -243,6 +243,20 @@ case "${target}" in
spu*-*-*) srv_regobj=reg-spu.o
srv_tgtobj="spu-low.o"
;;
+ tic6x-*-uclinux) srv_regobj="tic6x-c64xp-linux.o"
+ srv_regobj="${srv_regobj} tic6x-c64x-linux.o"
+ srv_regobj="${srv_regobj} tic6x-c62x-linux.o"
+ srv_xmlfiles="tic6x-c64xp-linux.xml"
+ srv_xmlfiles="${srv_xmlfiles} tic6x-c64x-linux.xml"
+ srv_xmlfiles="${srv_xmlfiles} tic6x-c62x-linux.xml"
+ srv_xmlfiles="${srv_xmlfiles} tic6x-core.xml"
+ srv_xmlfiles="${srv_xmlfiles} tic6x-gp.xml"
+ srv_xmlfiles="${srv_xmlfiles} tic6x-c6xp.xml"
+ srv_tgtobj="linux-low.o linux-tic6x-low.o"
+ srv_linux_regsets=yes
+ srv_linux_usrregs=yes
+ srv_linux_thread_db=yes
+ ;;
x86_64-*-linux*) srv_regobj="$srv_amd64_linux_regobj $srv_i386_linux_regobj"
srv_tgtobj="linux-low.o linux-x86-low.o i386-low.o i387-fp.o"
srv_xmlfiles="$srv_i386_linux_xmlfiles $srv_amd64_linux_xmlfiles"
diff --git a/gdb/gdbserver/linux-low.c b/gdb/gdbserver/linux-low.c
index f3641d0..91d3af4 100644
--- a/gdb/gdbserver/linux-low.c
+++ b/gdb/gdbserver/linux-low.c
@@ -4347,6 +4347,10 @@ linux_stopped_data_address (void)
#define PT_TEXT_ADDR 220
#define PT_TEXT_END_ADDR 224
#define PT_DATA_ADDR 228
+#elif defined(__TMS320C6X__)
+#define PT_TEXT_ADDR (0x10000*4)
+#define PT_DATA_ADDR (0x10004*4)
+#define PT_TEXT_END_ADDR (0x10008*4)
#endif
/* Under uClinux, programs are loaded at non-zero offsets, which we need
diff --git a/gdb/gdbserver/linux-tic6x-low.c b/gdb/gdbserver/linux-tic6x-low.c
new file mode 100644
index 0000000..254a899
--- /dev/null
+++ b/gdb/gdbserver/linux-tic6x-low.c
@@ -0,0 +1,339 @@
+/* Target dependent code for GDB on TI C6x systems.
+
+ Copyright (C) 2010, 2011
+ Free Software Foundation, Inc.
+ Contributed by Andrew Jenner <andrew@codesourcery.com>
+ Contributed by Yao Qi <yao@codesourcery.com>
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#include "server.h"
+#include "linux-low.h"
+
+#include <sys/ptrace.h>
+#include <endian.h>
+
+#include "gdb_proc_service.h"
+
+#ifndef PTRACE_GET_THREAD_AREA
+#define PTRACE_GET_THREAD_AREA 25
+#endif
+
+/* There are at most 69 registers accessible in ptrace. */
+#define TIC6X_NUM_REGS 69
+
+#include <asm/ptrace.h>
+
+/* Defined in auto-generated file tic6x-c64xp-linux.c. */
+void init_registers_tic6x_c64xp_linux (void);
+/* Defined in auto-generated file tic6x-c64x-linux.c. */
+void init_registers_tic6x_c64x_linux (void);
+/* Defined in auto-generated file tic62x-c6xp-linux.c. */
+void init_registers_tic6x_c62x_linux (void);
+
+union tic6x_register
+{
+ unsigned char buf[4];
+
+ int reg32;
+};
+
+/* Return the ptrace ``address'' of register REGNO. */
+
+#if __BYTE_ORDER == __BIG_ENDIAN
+static int tic6x_regmap_c64xp[] = {
+ /* A0 - A15 */
+ 53, 52, 55, 54, 57, 56, 59, 58,
+ 61, 60, 63, 62, 65, 64, 67, 66,
+ /* B0 - B15 */
+ 23, 22, 25, 24, 27, 26, 29, 28,
+ 31, 30, 33, 32, 35, 34, 69, 68,
+ /* CSR PC*/
+ 5, 4,
+ /* A16 -A31 */
+ 37, 36, 39, 38, 41, 40, 43, 42,
+ 45, 44, 47, 46, 49, 48, 51, 50,
+ /* B16 - B31 */
+ 7, 6, 9, 8, 11, 10, 13, 12,
+ 15, 14, 17, 16, 19, 18, 21, 20,
+ /* TSR, ILC, RILC */
+ 1, 2, 3
+};
+
+static int tic6x_regmap_c64x[] = {
+ /* A0 - A15 */
+ 51, 50, 53, 52, 55, 54, 57, 56,
+ 59, 58, 61, 60, 63, 62, 65, 64,
+ /* B0 - B15 */
+ 21, 20, 23, 22, 25, 24, 27, 26,
+ 29, 28, 31, 30, 33, 32, 67, 66,
+ /* CSR PC */
+ 3, 2,
+ /* A16 - A31 */
+ 35, 34, 37, 36, 39, 38, 41, 40,
+ 43, 42, 45, 44, 47, 46, 49, 48,
+ /* B16 - B32 */
+ 5, 4, 7, 6, 9, 8, 11, 10,
+ 13, 12, 15, 14, 17, 16, 19, 18,
+ -1, -1, -1
+};
+
+static int tic6x_regmap_c62x[] = {
+ /* A0 - A15 */
+ 19, 18, 21, 20, 23, 22, 25, 24,
+ 27, 26, 29, 28, 31, 30, 33, 32,
+ /* B0 - B15 */
+ 5, 4, 7, 6, 9, 8, 11, 10,
+ 13, 12, 15, 14, 17, 16, 35, 34,
+ /* CSR, PC */
+ 3, 2,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1
+};
+
+#else
+static int tic6x_regmap_c64xp[] = {
+ /* A0 - A15 */
+ 52, 53, 54, 55, 56, 57, 58, 59,
+ 60, 61, 62, 63, 64, 65, 66, 67,
+ /* B0 - B15 */
+ 22, 23, 24, 25, 26, 27, 28, 29,
+ 30, 31, 32, 33, 34, 35, 68, 69,
+ /* CSR PC*/
+ 4, 5,
+ /* A16 - A31 */
+ 36, 37, 38, 39, 40, 41, 42, 43,
+ 44, 45, 46, 47, 48, 49, 50, 51,
+ /* B16 -B31 */
+ 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17, 18, 19, 20, 31,
+ /* TSR, ILC, RILC */
+ 0, 3, 2
+};
+
+static int tic6x_regmap_c64x[] = {
+ /* A0 - A15 */
+ 50, 51, 52, 53, 54, 55, 56, 57,
+ 58, 59, 60, 61, 62, 63, 64, 65,
+ /* B0 - B15 */
+ 20, 21, 22, 23, 24, 25, 26, 27,
+ 28, 29, 30, 31, 32, 33, 66, 67,
+ /* CSR PC*/
+ 2, 3,
+ /* A16 - A31 */
+ 34, 35, 36, 37, 38, 39, 40, 41,
+ 42, 43, 44, 45, 46, 47, 48, 49,
+ /* B16 - B31 */
+ 4, 5, 6, 7, 8, 9, 10, 11,
+ 12, 13, 14, 15, 16, 17, 18, 19,
+ -1, -1, -1
+};
+
+static int tic6x_regmap_c62x[] = {
+ /* A0 - A15 */
+ 18, 19, 20, 21, 22, 23, 24, 25,
+ 26, 27, 28, 29, 30, 31, 32, 33,
+ /* B0 - B15 */
+ 4, 5, 6, 7, 8, 9, 10, 11,
+ 12, 13, 14, 15, 16, 17, 34, 35,
+ /* CSR PC*/
+ 2, 3,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1
+};
+
+#endif
+
+extern struct linux_target_ops the_low_target;
+
+static int *tic6x_regmap;
+static unsigned int tic6x_breakpoint;
+
+static void
+tic6x_arch_setup (void)
+{
+ register unsigned int csr asm ("B2");
+ unsigned int cpuid;
+
+ /* Determine the CPU we're running on to find the register order. */
+ __asm__ ("MVC .S2 CSR,%0" : "=r" (csr) :);
+ cpuid = csr >> 24;
+ switch (cpuid)
+ {
+ case 0x00: /* C62x */
+ case 0x02: /* C67x */
+ tic6x_regmap = tic6x_regmap_c62x;
+ tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
+ init_registers_tic6x_c62x_linux ();
+ break;
+ case 0x03: /* C67x+ */
+ tic6x_regmap = tic6x_regmap_c64x;
+ tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
+ init_registers_tic6x_c64x_linux ();
+ break;
+ case 0x0c: /* C64x */
+ tic6x_regmap = tic6x_regmap_c64x;
+ tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
+ init_registers_tic6x_c64x_linux ();
+ break;
+ case 0x10: /* C64x+ */
+ case 0x14: /* C674x */
+ case 0x15: /* C66x */
+ tic6x_regmap = tic6x_regmap_c64xp;
+ tic6x_breakpoint = 0x56454314; /* illegal opcode */
+ init_registers_tic6x_c64xp_linux ();
+ break;
+ default:
+ error("Unknown CPU ID 0x%02x", cpuid);
+ }
+ the_low_target.regmap = tic6x_regmap;
+}
+
+static int
+tic6x_cannot_fetch_register (int regno)
+{
+ return (tic6x_regmap[regno] == -1);
+}
+
+static int
+tic6x_cannot_store_register (int regno)
+{
+ return (tic6x_regmap[regno] == -1);
+}
+
+static CORE_ADDR
+tic6x_get_pc (struct regcache *regcache)
+{
+ union tic6x_register pc;
+
+ collect_register_by_name (regcache, "PC", pc.buf);
+ return pc.reg32;
+}
+
+static void
+tic6x_set_pc (struct regcache *regcache, CORE_ADDR pc)
+{
+ union tic6x_register newpc;
+
+ newpc.reg32 = pc;
+ supply_register_by_name (regcache, "PC", newpc.buf);
+}
+
+#define tic6x_breakpoint_len 4
+
+static int
+tic6x_breakpoint_at (CORE_ADDR where)
+{
+ unsigned int insn;
+
+ (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
+ if (insn == tic6x_breakpoint)
+ return 1;
+
+ /* If necessary, recognize more trap instructions here. GDB only uses the
+ one. */
+ return 0;
+}
+
+/* Fetch the thread-local storage pointer for libthread_db. */
+
+ps_err_e
+ps_get_thread_area (const struct ps_prochandle *ph,
+ lwpid_t lwpid, int idx, void **base)
+{
+ if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
+ return PS_ERR;
+
+ /* IDX is the bias from the thread pointer to the beginning of the
+ thread descriptor. It has to be subtracted due to implementation
+ quirks in libthread_db. */
+ *base = (void *) ((char *)*base - idx);
+
+ return PS_OK;
+}
+
+#ifdef HAVE_PTRACE_GETREGS
+
+static void
+tic6x_collect_register (struct regcache *regcache, int regno,
+ union tic6x_register *reg)
+{
+ union tic6x_register tmp_reg;
+
+ collect_register (regcache, regno, &tmp_reg.reg32);
+ reg->reg32 = tmp_reg.reg32;
+}
+
+static void
+tic6x_supply_register (struct regcache *regcache, int regno,
+ const union tic6x_register *reg)
+{
+ int offset = 0;
+
+ supply_register (regcache, regno, reg->buf + offset);
+}
+
+static void
+tic6x_fill_gregset (struct regcache *regcache, void *buf)
+{
+ union tic6x_register *regset = buf;
+ int i;
+
+ for (i = 0; i < TIC6X_NUM_REGS; i++)
+ if (tic6x_regmap[i] != -1)
+ tic6x_collect_register (regcache, i, regset + tic6x_regmap[i]);
+}
+
+static void
+tic6x_store_gregset (struct regcache *regcache, const void *buf)
+{
+ const union tic6x_register *regset = buf;
+ int i;
+
+ for (i = 0; i < TIC6X_NUM_REGS; i++)
+ if (tic6x_regmap[i] != -1)
+ tic6x_supply_register (regcache, i, regset + tic6x_regmap[i]);
+}
+#endif /* HAVE_PTRACE_GETREGS */
+
+struct regset_info target_regsets[] = {
+#ifdef HAVE_PTRACE_GETREGS
+ { PTRACE_GETREGS, PTRACE_SETREGS, 0, TIC6X_NUM_REGS * 4, GENERAL_REGS,
+ tic6x_fill_gregset, tic6x_store_gregset },
+#endif /* HAVE_PTRACE_GETREGS */
+ { 0, 0, 0, -1, -1, NULL, NULL }
+};
+
+struct linux_target_ops the_low_target = {
+ tic6x_arch_setup,
+ TIC6X_NUM_REGS,
+ 0,
+ tic6x_cannot_fetch_register,
+ tic6x_cannot_store_register,
+ tic6x_get_pc,
+ tic6x_set_pc,
+ (const unsigned char *) &tic6x_breakpoint,
+ tic6x_breakpoint_len,
+ NULL,
+ 0,
+ tic6x_breakpoint_at,
+};
--
1.7.0.4
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFA 6/8] New port: TI C6x: gdbserver
2011-07-25 7:27 ` Yao Qi
@ 2011-07-26 18:18 ` Pedro Alves
2011-07-27 5:17 ` Yao Qi
2011-07-27 6:19 ` Yao Qi
0 siblings, 2 replies; 15+ messages in thread
From: Pedro Alves @ 2011-07-26 18:18 UTC (permalink / raw)
To: gdb-patches; +Cc: Yao Qi
Thanks. This code in this version looked good to me,
with a few nits pointed out below that I noticed this time
around.
The new docs bits will need to be reviewed by Eli. I
have one comment to them:
> @@ -36854,6 +36854,7 @@ registers using the capitalization used in the description.
> * MIPS Features::
> * M68K Features::
> * PowerPC Features::
> +* C6x Features::
> @end menu
The list looked alpha sorted to me.
> +static int tic6x_regmap_c64x[] = {
> + /* A0 - A15 */
> + 51, 50, 53, 52, 55, 54, 57, 56,
> + 59, 58, 61, 60, 63, 62, 65, 64,
> + /* B0 - B15 */
> + 21, 20, 23, 22, 25, 24, 27, 26,
> + 29, 28, 31, 30, 33, 32, 67, 66,
> + /* CSR PC */
> + 3, 2,
> + /* A16 - A31 */
> + 35, 34, 37, 36, 39, 38, 41, 40,
> + 43, 42, 45, 44, 47, 46, 49, 48,
> + /* B16 - B32 */
B31, I think?
> + 5, 4, 7, 6, 9, 8, 11, 10,
> + 13, 12, 15, 14, 17, 16, 19, 18,
> + -1, -1, -1
> + /* CSR PC*/
Missing space. (several places)
> + *base = (void *) ((char *)*base - idx);
Missing space after (char *)
> +#ifdef HAVE_PTRACE_GETREGS
> +
I wonder if there ever was a c6x kernel that
didn't have this.
--
Pedro Alves
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFA 6/8] New port: TI C6x: gdbserver
2011-07-26 18:18 ` Pedro Alves
@ 2011-07-27 5:17 ` Yao Qi
2011-07-27 7:01 ` Eli Zaretskii
2011-07-27 6:19 ` Yao Qi
1 sibling, 1 reply; 15+ messages in thread
From: Yao Qi @ 2011-07-27 5:17 UTC (permalink / raw)
To: Pedro Alves, eliz; +Cc: gdb-patches
[-- Attachment #1: Type: text/plain, Size: 518 bytes --]
On 07/27/2011 01:44 AM, Pedro Alves wrote:
> The new docs bits will need to be reviewed by Eli. I
> have one comment to them:
>
>> > @@ -36854,6 +36854,7 @@ registers using the capitalization used in the description.
>> > * MIPS Features::
>> > * M68K Features::
>> > * PowerPC Features::
>> > +* C6x Features::
>> > @end menu
> The list looked alpha sorted to me.
>
I've sorted this into alpha-beta order in new patch. Eli, could you
have a review on new document part in this patch?
--
Yao (é½å°§)
[-- Attachment #2: 0005-target-description.patch --]
[-- Type: text/x-patch, Size: 27667 bytes --]
From 51e29606ff0c3d3459858cd48dee01fa52d22631 Mon Sep 17 00:00:00 2001
From: Yao Qi <yao@codesourcery.com>
Date: Fri, 22 Jul 2011 16:09:59 +0800
Subject: [PATCH 05/15] target description
2011-07-25 Yao Qi <yao@codesourcery.com>
gdb/doc/
* gdb.texinfo: Document C6x features.
gdb/
* features/Makefile (WHICH): Add tic6x-c64xp-linux tic6x-c64x-linux
and tic6x-c62x-linux.
* features/tic6x-c6xp.xml: New.
* features/tic6x-core.xml: New.
* features/tic6x-gp.xml: New.
* features/tic6x-c62x-linux.xml: New.
* features/tic6x-c64x-linux.xml: New.
* features/tic6x-c64xp-linux.xml: New.
* features/tic6x-c64xp-linux.c: Generated.
* features/tic6x-c64x-linux.c: Generated.
* features/tic6x-c62x-linux.c: Generated.
* regformats/tic6x-c62x-linux.dat: Generated.
* regformats/tic6x-c64x-linux.dat: Generated.
* regformats/tic6x-c64xp-linux.dat: Generated.
---
gdb/doc/gdb.texinfo | 15 +++++
gdb/features/Makefile | 7 ++-
gdb/features/tic6x-c62x-linux.c | 56 ++++++++++++++++++++
gdb/features/tic6x-c62x-linux.xml | 13 +++++
gdb/features/tic6x-c64x-linux.c | 90 ++++++++++++++++++++++++++++++++
gdb/features/tic6x-c64x-linux.xml | 14 +++++
gdb/features/tic6x-c64xp-linux.c | 95 ++++++++++++++++++++++++++++++++++
gdb/features/tic6x-c64xp-linux.xml | 15 +++++
gdb/features/tic6x-c6xp.xml | 13 +++++
gdb/features/tic6x-core.xml | 44 ++++++++++++++++
gdb/features/tic6x-gp.xml | 42 +++++++++++++++
gdb/regformats/tic6x-c62x-linux.dat | 38 +++++++++++++
gdb/regformats/tic6x-c64x-linux.dat | 70 +++++++++++++++++++++++++
gdb/regformats/tic6x-c64xp-linux.dat | 73 ++++++++++++++++++++++++++
14 files changed, 583 insertions(+), 2 deletions(-)
create mode 100644 gdb/features/tic6x-c62x-linux.c
create mode 100644 gdb/features/tic6x-c62x-linux.xml
create mode 100644 gdb/features/tic6x-c64x-linux.c
create mode 100644 gdb/features/tic6x-c64x-linux.xml
create mode 100644 gdb/features/tic6x-c64xp-linux.c
create mode 100644 gdb/features/tic6x-c64xp-linux.xml
create mode 100644 gdb/features/tic6x-c6xp.xml
create mode 100644 gdb/features/tic6x-core.xml
create mode 100644 gdb/features/tic6x-gp.xml
create mode 100644 gdb/regformats/tic6x-c62x-linux.dat
create mode 100644 gdb/regformats/tic6x-c64x-linux.dat
create mode 100644 gdb/regformats/tic6x-c64xp-linux.dat
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index 37c81b8..7669179 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -36850,6 +36850,7 @@ registers using the capitalization used in the description.
@menu
* ARM Features::
+* C6x Features::
* i386 Features::
* MIPS Features::
* M68K Features::
@@ -36892,6 +36893,20 @@ quad-precision registers from pairs of double-precision registers.
If this feature is present, @samp{org.gnu.gdb.arm.vfp} must also
be present and include 32 double-precision registers.
+@node C6x Features
+@subsection C6x Features
+@cindex target descriptions, C6x features
+The @samp{org.gnu.gdb.tic6x.core} feature is required for C6x
+targets. It should contain registers @samp{A0} through @samp{A15},
+registers @samp{B0} through @samp{B15}, @samp{CSR} and @samp{PC}.
+
+The @samp{org.gnu.gdb.tic6x.gp} feature is optional. It should
+contain registers @samp{A16} through @samp{A31} and @samp{B16}
+through @samp{B31}.
+
+The @samp{org.gnu.gdb.tic6x.c6xp} feature is optional. It should
+contain registers @samp{TSR}, @samp{ILC} and @samp{RILC}.
+
@node i386 Features
@subsection i386 Features
@cindex target descriptions, i386 features
diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index 4e8e7ee..e7e72d1 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -41,7 +41,8 @@ WHICH = arm-with-iwmmxt arm-with-vfpv2 arm-with-vfpv3 arm-with-neon \
rs6000/powerpc-32l rs6000/powerpc-altivec32l rs6000/powerpc-e500l \
rs6000/powerpc-64l rs6000/powerpc-altivec64l rs6000/powerpc-vsx32l \
rs6000/powerpc-vsx64l rs6000/powerpc-cell32l rs6000/powerpc-cell64l \
- s390-linux32 s390-linux64 s390x-linux64
+ s390-linux32 s390-linux64 s390x-linux64 \
+ tic6x-c64xp-linux tic6x-c64x-linux tic6x-c62x-linux
# Record which registers should be sent to GDB by default after stop.
arm-expedite = r11,sp,pc
@@ -63,7 +64,9 @@ rs6000/powerpc-cell64l-expedite = r1,pc,r0,orig_r3,r4
s390-linux32-expedite = r14,r15,pswa
s390-linux64-expedite = r14l,r15l,pswa
s390x-linux64-expedite = r14,r15,pswa
-
+tic6x-c64xp-linux-expedite = A15,PC
+tic6x-c64x-linux-expedite = A15,PC
+tic6x-c62x-linux-expedite = A15,PC
XSLTPROC = xsltproc
outdir = ../regformats
diff --git a/gdb/features/tic6x-c62x-linux.c b/gdb/features/tic6x-c62x-linux.c
new file mode 100644
index 0000000..df82fc2
--- /dev/null
+++ b/gdb/features/tic6x-c62x-linux.c
@@ -0,0 +1,56 @@
+/* THIS FILE IS GENERATED. Original: tic6x-c62x-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_tic6x_c62x_linux;
+static void
+initialize_tdesc_tic6x_c62x_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type, *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("tic6x"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.core");
+ tdesc_create_reg (feature, "A0", 0, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A1", 1, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A2", 2, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A3", 3, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A4", 4, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A5", 5, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A6", 6, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A7", 7, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A8", 8, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A9", 9, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A10", 10, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A11", 11, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A12", 12, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A13", 13, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A14", 14, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A15", 15, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B0", 16, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B1", 17, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B2", 18, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B3", 19, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B4", 20, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B5", 21, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B6", 22, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B7", 23, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B8", 24, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B9", 25, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B10", 26, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B11", 27, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B12", 28, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B13", 29, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B14", 30, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B15", 31, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "CSR", 32, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "PC", 33, 1, NULL, 32, "code_ptr");
+
+ tdesc_tic6x_c62x_linux = result;
+}
diff --git a/gdb/features/tic6x-c62x-linux.xml b/gdb/features/tic6x-c62x-linux.xml
new file mode 100644
index 0000000..0319438
--- /dev/null
+++ b/gdb/features/tic6x-c62x-linux.xml
@@ -0,0 +1,13 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>tic6x</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="tic6x-core.xml"/>
+</target>
diff --git a/gdb/features/tic6x-c64x-linux.c b/gdb/features/tic6x-c64x-linux.c
new file mode 100644
index 0000000..39f9e95
--- /dev/null
+++ b/gdb/features/tic6x-c64x-linux.c
@@ -0,0 +1,90 @@
+/* THIS FILE IS GENERATED. Original: tic6x-c64x-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_tic6x_c64x_linux;
+static void
+initialize_tdesc_tic6x_c64x_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type, *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("tic6x"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.core");
+ tdesc_create_reg (feature, "A0", 0, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A1", 1, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A2", 2, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A3", 3, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A4", 4, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A5", 5, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A6", 6, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A7", 7, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A8", 8, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A9", 9, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A10", 10, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A11", 11, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A12", 12, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A13", 13, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A14", 14, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A15", 15, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B0", 16, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B1", 17, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B2", 18, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B3", 19, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B4", 20, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B5", 21, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B6", 22, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B7", 23, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B8", 24, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B9", 25, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B10", 26, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B11", 27, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B12", 28, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B13", 29, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B14", 30, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B15", 31, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "CSR", 32, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "PC", 33, 1, NULL, 32, "code_ptr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.gp");
+ tdesc_create_reg (feature, "A16", 34, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A17", 35, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A18", 36, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A19", 37, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A20", 38, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A21", 39, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A22", 40, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A23", 41, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A24", 42, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A25", 43, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A26", 44, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A27", 45, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A28", 46, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A29", 47, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A30", 48, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A31", 49, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B16", 50, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B17", 51, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B18", 52, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B19", 53, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B20", 54, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B21", 55, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B22", 56, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B23", 57, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B24", 58, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B25", 59, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B26", 60, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B27", 61, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B28", 62, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B29", 63, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B30", 64, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B31", 65, 1, NULL, 32, "uint32");
+
+ tdesc_tic6x_c64x_linux = result;
+}
diff --git a/gdb/features/tic6x-c64x-linux.xml b/gdb/features/tic6x-c64x-linux.xml
new file mode 100644
index 0000000..2d11bd0
--- /dev/null
+++ b/gdb/features/tic6x-c64x-linux.xml
@@ -0,0 +1,14 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>tic6x</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="tic6x-core.xml"/>
+ <xi:include href="tic6x-gp.xml"/>
+</target>
diff --git a/gdb/features/tic6x-c64xp-linux.c b/gdb/features/tic6x-c64xp-linux.c
new file mode 100644
index 0000000..a959ec6
--- /dev/null
+++ b/gdb/features/tic6x-c64xp-linux.c
@@ -0,0 +1,95 @@
+/* THIS FILE IS GENERATED. Original: tic6x-c64xp-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_tic6x_c64xp_linux;
+static void
+initialize_tdesc_tic6x_c64xp_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type, *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("tic6x"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.core");
+ tdesc_create_reg (feature, "A0", 0, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A1", 1, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A2", 2, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A3", 3, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A4", 4, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A5", 5, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A6", 6, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A7", 7, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A8", 8, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A9", 9, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A10", 10, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A11", 11, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A12", 12, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A13", 13, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A14", 14, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A15", 15, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B0", 16, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B1", 17, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B2", 18, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B3", 19, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B4", 20, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B5", 21, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B6", 22, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B7", 23, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B8", 24, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B9", 25, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B10", 26, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B11", 27, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B12", 28, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B13", 29, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B14", 30, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B15", 31, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "CSR", 32, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "PC", 33, 1, NULL, 32, "code_ptr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.gp");
+ tdesc_create_reg (feature, "A16", 34, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A17", 35, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A18", 36, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A19", 37, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A20", 38, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A21", 39, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A22", 40, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A23", 41, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A24", 42, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A25", 43, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A26", 44, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A27", 45, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A28", 46, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A29", 47, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A30", 48, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A31", 49, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B16", 50, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B17", 51, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B18", 52, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B19", 53, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B20", 54, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B21", 55, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B22", 56, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B23", 57, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B24", 58, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B25", 59, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B26", 60, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B27", 61, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B28", 62, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B29", 63, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B30", 64, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B31", 65, 1, NULL, 32, "uint32");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.c6xp");
+ tdesc_create_reg (feature, "TSR", 66, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "ILC", 67, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "RILC", 68, 1, NULL, 32, "uint32");
+
+ tdesc_tic6x_c64xp_linux = result;
+}
diff --git a/gdb/features/tic6x-c64xp-linux.xml b/gdb/features/tic6x-c64xp-linux.xml
new file mode 100644
index 0000000..6ff8407
--- /dev/null
+++ b/gdb/features/tic6x-c64xp-linux.xml
@@ -0,0 +1,15 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>tic6x</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="tic6x-core.xml"/>
+ <xi:include href="tic6x-gp.xml"/>
+ <xi:include href="tic6x-c6xp.xml"/>
+</target>
diff --git a/gdb/features/tic6x-c6xp.xml b/gdb/features/tic6x-c6xp.xml
new file mode 100644
index 0000000..0923b1b
--- /dev/null
+++ b/gdb/features/tic6x-c6xp.xml
@@ -0,0 +1,13 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.tic6x.c6xp">
+ <reg name="TSR" bitsize="32" type="uint32"/>
+ <reg name="ILC" bitsize="32" type="uint32"/>
+ <reg name="RILC" bitsize="32" type="uint32"/>
+</feature>
diff --git a/gdb/features/tic6x-core.xml b/gdb/features/tic6x-core.xml
new file mode 100644
index 0000000..63074eb
--- /dev/null
+++ b/gdb/features/tic6x-core.xml
@@ -0,0 +1,44 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.tic6x.core">
+ <reg name="A0" bitsize="32" type="uint32"/>
+ <reg name="A1" bitsize="32" type="uint32"/>
+ <reg name="A2" bitsize="32" type="uint32"/>
+ <reg name="A3" bitsize="32" type="uint32"/>
+ <reg name="A4" bitsize="32" type="uint32"/>
+ <reg name="A5" bitsize="32" type="uint32"/>
+ <reg name="A6" bitsize="32" type="uint32"/>
+ <reg name="A7" bitsize="32" type="uint32"/>
+ <reg name="A8" bitsize="32" type="uint32"/>
+ <reg name="A9" bitsize="32" type="uint32"/>
+ <reg name="A10" bitsize="32" type="uint32"/>
+ <reg name="A11" bitsize="32" type="uint32"/>
+ <reg name="A12" bitsize="32" type="uint32"/>
+ <reg name="A13" bitsize="32" type="uint32"/>
+ <reg name="A14" bitsize="32" type="uint32"/>
+ <reg name="A15" bitsize="32" type="uint32"/>
+ <reg name="B0" bitsize="32" type="uint32"/>
+ <reg name="B1" bitsize="32" type="uint32"/>
+ <reg name="B2" bitsize="32" type="uint32"/>
+ <reg name="B3" bitsize="32" type="uint32"/>
+ <reg name="B4" bitsize="32" type="uint32"/>
+ <reg name="B5" bitsize="32" type="uint32"/>
+ <reg name="B6" bitsize="32" type="uint32"/>
+ <reg name="B7" bitsize="32" type="uint32"/>
+ <reg name="B8" bitsize="32" type="uint32"/>
+ <reg name="B9" bitsize="32" type="uint32"/>
+ <reg name="B10" bitsize="32" type="uint32"/>
+ <reg name="B11" bitsize="32" type="uint32"/>
+ <reg name="B12" bitsize="32" type="uint32"/>
+ <reg name="B13" bitsize="32" type="uint32"/>
+ <reg name="B14" bitsize="32" type="uint32"/>
+ <reg name="B15" bitsize="32" type="uint32"/>
+ <reg name="CSR" bitsize="32" type="uint32"/>
+ <reg name="PC" bitsize="32" type="code_ptr"/>
+</feature>
diff --git a/gdb/features/tic6x-gp.xml b/gdb/features/tic6x-gp.xml
new file mode 100644
index 0000000..d1249f3
--- /dev/null
+++ b/gdb/features/tic6x-gp.xml
@@ -0,0 +1,42 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.tic6x.gp">
+ <reg name="A16" bitsize="32" type="uint32"/>
+ <reg name="A17" bitsize="32" type="uint32"/>
+ <reg name="A18" bitsize="32" type="uint32"/>
+ <reg name="A19" bitsize="32" type="uint32"/>
+ <reg name="A20" bitsize="32" type="uint32"/>
+ <reg name="A21" bitsize="32" type="uint32"/>
+ <reg name="A22" bitsize="32" type="uint32"/>
+ <reg name="A23" bitsize="32" type="uint32"/>
+ <reg name="A24" bitsize="32" type="uint32"/>
+ <reg name="A25" bitsize="32" type="uint32"/>
+ <reg name="A26" bitsize="32" type="uint32"/>
+ <reg name="A27" bitsize="32" type="uint32"/>
+ <reg name="A28" bitsize="32" type="uint32"/>
+ <reg name="A29" bitsize="32" type="uint32"/>
+ <reg name="A30" bitsize="32" type="uint32"/>
+ <reg name="A31" bitsize="32" type="uint32"/>
+ <reg name="B16" bitsize="32" type="uint32"/>
+ <reg name="B17" bitsize="32" type="uint32"/>
+ <reg name="B18" bitsize="32" type="uint32"/>
+ <reg name="B19" bitsize="32" type="uint32"/>
+ <reg name="B20" bitsize="32" type="uint32"/>
+ <reg name="B21" bitsize="32" type="uint32"/>
+ <reg name="B22" bitsize="32" type="uint32"/>
+ <reg name="B23" bitsize="32" type="uint32"/>
+ <reg name="B24" bitsize="32" type="uint32"/>
+ <reg name="B25" bitsize="32" type="uint32"/>
+ <reg name="B26" bitsize="32" type="uint32"/>
+ <reg name="B27" bitsize="32" type="uint32"/>
+ <reg name="B28" bitsize="32" type="uint32"/>
+ <reg name="B29" bitsize="32" type="uint32"/>
+ <reg name="B30" bitsize="32" type="uint32"/>
+ <reg name="B31" bitsize="32" type="uint32"/>
+</feature>
diff --git a/gdb/regformats/tic6x-c62x-linux.dat b/gdb/regformats/tic6x-c62x-linux.dat
new file mode 100644
index 0000000..3758d84
--- /dev/null
+++ b/gdb/regformats/tic6x-c62x-linux.dat
@@ -0,0 +1,38 @@
+# DO NOT EDIT: generated from tic6x-c62x-linux.xml
+name:tic6x_c62x_linux
+xmltarget:tic6x-c62x-linux.xml
+expedite:A15,PC
+32:A0
+32:A1
+32:A2
+32:A3
+32:A4
+32:A5
+32:A6
+32:A7
+32:A8
+32:A9
+32:A10
+32:A11
+32:A12
+32:A13
+32:A14
+32:A15
+32:B0
+32:B1
+32:B2
+32:B3
+32:B4
+32:B5
+32:B6
+32:B7
+32:B8
+32:B9
+32:B10
+32:B11
+32:B12
+32:B13
+32:B14
+32:B15
+32:CSR
+32:PC
diff --git a/gdb/regformats/tic6x-c64x-linux.dat b/gdb/regformats/tic6x-c64x-linux.dat
new file mode 100644
index 0000000..8b1724c
--- /dev/null
+++ b/gdb/regformats/tic6x-c64x-linux.dat
@@ -0,0 +1,70 @@
+# DO NOT EDIT: generated from tic6x-c64x-linux.xml
+name:tic6x_c64x_linux
+xmltarget:tic6x-c64x-linux.xml
+expedite:A15,PC
+32:A0
+32:A1
+32:A2
+32:A3
+32:A4
+32:A5
+32:A6
+32:A7
+32:A8
+32:A9
+32:A10
+32:A11
+32:A12
+32:A13
+32:A14
+32:A15
+32:B0
+32:B1
+32:B2
+32:B3
+32:B4
+32:B5
+32:B6
+32:B7
+32:B8
+32:B9
+32:B10
+32:B11
+32:B12
+32:B13
+32:B14
+32:B15
+32:CSR
+32:PC
+32:A16
+32:A17
+32:A18
+32:A19
+32:A20
+32:A21
+32:A22
+32:A23
+32:A24
+32:A25
+32:A26
+32:A27
+32:A28
+32:A29
+32:A30
+32:A31
+32:B16
+32:B17
+32:B18
+32:B19
+32:B20
+32:B21
+32:B22
+32:B23
+32:B24
+32:B25
+32:B26
+32:B27
+32:B28
+32:B29
+32:B30
+32:B31
diff --git a/gdb/regformats/tic6x-c64xp-linux.dat b/gdb/regformats/tic6x-c64xp-linux.dat
new file mode 100644
index 0000000..4d12148
--- /dev/null
+++ b/gdb/regformats/tic6x-c64xp-linux.dat
@@ -0,0 +1,73 @@
+# DO NOT EDIT: generated from tic6x-c64xp-linux.xml
+name:tic6x_c64xp_linux
+xmltarget:tic6x-c64xp-linux.xml
+expedite:A15,PC
+32:A0
+32:A1
+32:A2
+32:A3
+32:A4
+32:A5
+32:A6
+32:A7
+32:A8
+32:A9
+32:A10
+32:A11
+32:A12
+32:A13
+32:A14
+32:A15
+32:B0
+32:B1
+32:B2
+32:B3
+32:B4
+32:B5
+32:B6
+32:B7
+32:B8
+32:B9
+32:B10
+32:B11
+32:B12
+32:B13
+32:B14
+32:B15
+32:CSR
+32:PC
+32:A16
+32:A17
+32:A18
+32:A19
+32:A20
+32:A21
+32:A22
+32:A23
+32:A24
+32:A25
+32:A26
+32:A27
+32:A28
+32:A29
+32:A30
+32:A31
+32:B16
+32:B17
+32:B18
+32:B19
+32:B20
+32:B21
+32:B22
+32:B23
+32:B24
+32:B25
+32:B26
+32:B27
+32:B28
+32:B29
+32:B30
+32:B31
+32:TSR
+32:ILC
+32:RILC
--
1.7.0.4
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFA 6/8] New port: TI C6x: gdbserver
2011-07-26 18:18 ` Pedro Alves
2011-07-27 5:17 ` Yao Qi
@ 2011-07-27 6:19 ` Yao Qi
1 sibling, 0 replies; 15+ messages in thread
From: Yao Qi @ 2011-07-27 6:19 UTC (permalink / raw)
To: Pedro Alves; +Cc: gdb-patches
[-- Attachment #1: Type: text/plain, Size: 968 bytes --]
On 07/27/2011 01:44 AM, Pedro Alves wrote:
>> > +static int tic6x_regmap_c64x[] = {
>> > + /* A0 - A15 */
>> > + 51, 50, 53, 52, 55, 54, 57, 56,
>> > + 59, 58, 61, 60, 63, 62, 65, 64,
>> > + /* B0 - B15 */
>> > + 21, 20, 23, 22, 25, 24, 27, 26,
>> > + 29, 28, 31, 30, 33, 32, 67, 66,
>> > + /* CSR PC */
>> > + 3, 2,
>> > + /* A16 - A31 */
>> > + 35, 34, 37, 36, 39, 38, 41, 40,
>> > + 43, 42, 45, 44, 47, 46, 49, 48,
>> > + /* B16 - B32 */
> B31, I think?
>
Oh, yes, fixed.
>> > + 5, 4, 7, 6, 9, 8, 11, 10,
>> > + 13, 12, 15, 14, 17, 16, 19, 18,
>> > + -1, -1, -1
>> > + /* CSR PC*/
> Missing space. (several places)
>
Fixed.
>> > + *base = (void *) ((char *)*base - idx);
> Missing space after (char *)
>
Fixed.
>> > +#ifdef HAVE_PTRACE_GETREGS
>> > +
> I wonder if there ever was a c6x kernel that
> didn't have this.
It is a copy-paste problem :). Yeah, there is no such kernel. Removed
this macro check.
--
Yao (é½å°§)
[-- Attachment #2: 0007-gdbserver-tic6x.patch --]
[-- Type: text/x-patch, Size: 13487 bytes --]
2011-07-19 Andrew Jenner <andrew@codesourcery.com>
Yao Qi <yao@codesourcery.com>
gdb/gdbserver/
* Makefile.in (clean): Remove tic6x-c64xp-linux.c, tic6x-c64x-linux.c
and tic6x-c62x-linux.c.
(linux-tic6x-low.o, tic6x-c62x-linux.o, tic6x-c64x-linux.o): New rules.
(tic6x-c64xp-linux.o, tic6x-c62x-linux.c, tic6x-c64x-linux.c): Likewise.
(tic6x-c64xp-linux.c): Likewise.
* configure.srv: Add support for tic6x-*-uclinux.
* linux-tic6x-low.c: New.
* linux-low.c (PT_TEXT_ADDR, PT_DATA_ADDR, PT_TEXT_END_ADDR):
Define.
---
gdb/gdbserver/Makefile.in | 11 ++
gdb/gdbserver/configure.srv | 14 ++
gdb/gdbserver/linux-low.c | 4 +
gdb/gdbserver/linux-tic6x-low.c | 334 +++++++++++++++++++++++++++++++++++++++
4 files changed, 363 insertions(+), 0 deletions(-)
create mode 100644 gdb/gdbserver/linux-tic6x-low.c
diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
index 095c706..a1e0c43 100644
--- a/gdb/gdbserver/Makefile.in
+++ b/gdb/gdbserver/Makefile.in
@@ -276,6 +276,7 @@ clean:
rm -f powerpc-isa205-altivec32l.c powerpc-isa205-vsx32l.c powerpc-isa205-altivec64l.c
rm -f powerpc-isa205-vsx64l.c
rm -f s390-linux32.c s390-linux64.c s390x-linux64.c
+ rm -f tic6x-c64xp-linux.c tic6x-c64x-linux.c tic6x-c62x-linux.c
rm -f xml-builtin.c stamp-xml
rm -f i386-avx.c i386-avx-linux.c
rm -f amd64-avx.c amd64-avx-linux.c
@@ -428,6 +429,7 @@ linux-mips-low.o: linux-mips-low.c $(linux_low_h) $(server_h) \
linux-ppc-low.o: linux-ppc-low.c $(linux_low_h) $(server_h)
linux-s390-low.o: linux-s390-low.c $(linux_low_h) $(server_h)
linux-sh-low.o: linux-sh-low.c $(linux_low_h) $(server_h)
+linux-tic6x-low.o: linux-tic6x-low.c $(linux_low_h) $(server_h)
linux-x86-low.o: linux-x86-low.c $(linux_low_h) $(server_h) \
$(gdb_proc_service_h) $(i386_low_h)
linux-xtensa-low.o: linux-xtensa-low.c xtensa-xtregs.c $(linux_low_h) $(server_h)
@@ -563,6 +565,15 @@ s390-linux64.c : $(srcdir)/../regformats/s390-linux64.dat $(regdat_sh)
s390x-linux64.o : s390x-linux64.c $(regdef_h)
s390x-linux64.c : $(srcdir)/../regformats/s390x-linux64.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/s390x-linux64.dat s390x-linux64.c
+tic6x-c64xp-linux.o : tic6x-c64xp-linux.c $(regdef_h)
+tic6x-c64xp-linux.c : $(srcdir)/../regformats/tic6x-c64xp-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/tic6x-c64xp-linux.dat tic6x-c64xp-linux.c
+tic6x-c64x-linux.o : tic6x-c64x-linux.c $(regdef_h)
+tic6x-c64x-linux.c : $(srcdir)/../regformats/tic6x-c64x-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/tic6x-c64x-linux.dat tic6x-c64x-linux.c
+tic6x-c62x-linux.o : tic6x-c62x-linux.c $(regdef_h)
+tic6x-c62x-linux.c : $(srcdir)/../regformats/tic6x-c62x-linux.dat $(regdat_sh)
+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/tic6x-c62x-linux.dat tic6x-c62x-linux.c
reg-sh.o : reg-sh.c $(regdef_h)
reg-sh.c : $(srcdir)/../regformats/reg-sh.dat $(regdat_sh)
$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-sh.dat reg-sh.c
diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
index 55dd4cf..9c657e7 100644
--- a/gdb/gdbserver/configure.srv
+++ b/gdb/gdbserver/configure.srv
@@ -243,6 +243,20 @@ case "${target}" in
spu*-*-*) srv_regobj=reg-spu.o
srv_tgtobj="spu-low.o"
;;
+ tic6x-*-uclinux) srv_regobj="tic6x-c64xp-linux.o"
+ srv_regobj="${srv_regobj} tic6x-c64x-linux.o"
+ srv_regobj="${srv_regobj} tic6x-c62x-linux.o"
+ srv_xmlfiles="tic6x-c64xp-linux.xml"
+ srv_xmlfiles="${srv_xmlfiles} tic6x-c64x-linux.xml"
+ srv_xmlfiles="${srv_xmlfiles} tic6x-c62x-linux.xml"
+ srv_xmlfiles="${srv_xmlfiles} tic6x-core.xml"
+ srv_xmlfiles="${srv_xmlfiles} tic6x-gp.xml"
+ srv_xmlfiles="${srv_xmlfiles} tic6x-c6xp.xml"
+ srv_tgtobj="linux-low.o linux-tic6x-low.o"
+ srv_linux_regsets=yes
+ srv_linux_usrregs=yes
+ srv_linux_thread_db=yes
+ ;;
x86_64-*-linux*) srv_regobj="$srv_amd64_linux_regobj $srv_i386_linux_regobj"
srv_tgtobj="linux-low.o linux-x86-low.o i386-low.o i387-fp.o"
srv_xmlfiles="$srv_i386_linux_xmlfiles $srv_amd64_linux_xmlfiles"
diff --git a/gdb/gdbserver/linux-low.c b/gdb/gdbserver/linux-low.c
index 0195bf9..b4a2e2c 100644
--- a/gdb/gdbserver/linux-low.c
+++ b/gdb/gdbserver/linux-low.c
@@ -4347,6 +4347,10 @@ linux_stopped_data_address (void)
#define PT_TEXT_ADDR 220
#define PT_TEXT_END_ADDR 224
#define PT_DATA_ADDR 228
+#elif defined(__TMS320C6X__)
+#define PT_TEXT_ADDR (0x10000*4)
+#define PT_DATA_ADDR (0x10004*4)
+#define PT_TEXT_END_ADDR (0x10008*4)
#endif
/* Under uClinux, programs are loaded at non-zero offsets, which we need
diff --git a/gdb/gdbserver/linux-tic6x-low.c b/gdb/gdbserver/linux-tic6x-low.c
new file mode 100644
index 0000000..44daa4d
--- /dev/null
+++ b/gdb/gdbserver/linux-tic6x-low.c
@@ -0,0 +1,334 @@
+/* Target dependent code for GDB on TI C6x systems.
+
+ Copyright (C) 2010, 2011
+ Free Software Foundation, Inc.
+ Contributed by Andrew Jenner <andrew@codesourcery.com>
+ Contributed by Yao Qi <yao@codesourcery.com>
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#include "server.h"
+#include "linux-low.h"
+
+#include <sys/ptrace.h>
+#include <endian.h>
+
+#include "gdb_proc_service.h"
+
+#ifndef PTRACE_GET_THREAD_AREA
+#define PTRACE_GET_THREAD_AREA 25
+#endif
+
+/* There are at most 69 registers accessible in ptrace. */
+#define TIC6X_NUM_REGS 69
+
+#include <asm/ptrace.h>
+
+/* Defined in auto-generated file tic6x-c64xp-linux.c. */
+void init_registers_tic6x_c64xp_linux (void);
+/* Defined in auto-generated file tic6x-c64x-linux.c. */
+void init_registers_tic6x_c64x_linux (void);
+/* Defined in auto-generated file tic62x-c6xp-linux.c. */
+void init_registers_tic6x_c62x_linux (void);
+
+union tic6x_register
+{
+ unsigned char buf[4];
+
+ int reg32;
+};
+
+/* Return the ptrace ``address'' of register REGNO. */
+
+#if __BYTE_ORDER == __BIG_ENDIAN
+static int tic6x_regmap_c64xp[] = {
+ /* A0 - A15 */
+ 53, 52, 55, 54, 57, 56, 59, 58,
+ 61, 60, 63, 62, 65, 64, 67, 66,
+ /* B0 - B15 */
+ 23, 22, 25, 24, 27, 26, 29, 28,
+ 31, 30, 33, 32, 35, 34, 69, 68,
+ /* CSR PC */
+ 5, 4,
+ /* A16 - A31 */
+ 37, 36, 39, 38, 41, 40, 43, 42,
+ 45, 44, 47, 46, 49, 48, 51, 50,
+ /* B16 - B31 */
+ 7, 6, 9, 8, 11, 10, 13, 12,
+ 15, 14, 17, 16, 19, 18, 21, 20,
+ /* TSR, ILC, RILC */
+ 1, 2, 3
+};
+
+static int tic6x_regmap_c64x[] = {
+ /* A0 - A15 */
+ 51, 50, 53, 52, 55, 54, 57, 56,
+ 59, 58, 61, 60, 63, 62, 65, 64,
+ /* B0 - B15 */
+ 21, 20, 23, 22, 25, 24, 27, 26,
+ 29, 28, 31, 30, 33, 32, 67, 66,
+ /* CSR PC */
+ 3, 2,
+ /* A16 - A31 */
+ 35, 34, 37, 36, 39, 38, 41, 40,
+ 43, 42, 45, 44, 47, 46, 49, 48,
+ /* B16 - B31 */
+ 5, 4, 7, 6, 9, 8, 11, 10,
+ 13, 12, 15, 14, 17, 16, 19, 18,
+ -1, -1, -1
+};
+
+static int tic6x_regmap_c62x[] = {
+ /* A0 - A15 */
+ 19, 18, 21, 20, 23, 22, 25, 24,
+ 27, 26, 29, 28, 31, 30, 33, 32,
+ /* B0 - B15 */
+ 5, 4, 7, 6, 9, 8, 11, 10,
+ 13, 12, 15, 14, 17, 16, 35, 34,
+ /* CSR, PC */
+ 3, 2,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1
+};
+
+#else
+static int tic6x_regmap_c64xp[] = {
+ /* A0 - A15 */
+ 52, 53, 54, 55, 56, 57, 58, 59,
+ 60, 61, 62, 63, 64, 65, 66, 67,
+ /* B0 - B15 */
+ 22, 23, 24, 25, 26, 27, 28, 29,
+ 30, 31, 32, 33, 34, 35, 68, 69,
+ /* CSR PC */
+ 4, 5,
+ /* A16 - A31 */
+ 36, 37, 38, 39, 40, 41, 42, 43,
+ 44, 45, 46, 47, 48, 49, 50, 51,
+ /* B16 -B31 */
+ 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17, 18, 19, 20, 31,
+ /* TSR, ILC, RILC */
+ 0, 3, 2
+};
+
+static int tic6x_regmap_c64x[] = {
+ /* A0 - A15 */
+ 50, 51, 52, 53, 54, 55, 56, 57,
+ 58, 59, 60, 61, 62, 63, 64, 65,
+ /* B0 - B15 */
+ 20, 21, 22, 23, 24, 25, 26, 27,
+ 28, 29, 30, 31, 32, 33, 66, 67,
+ /* CSR PC */
+ 2, 3,
+ /* A16 - A31 */
+ 34, 35, 36, 37, 38, 39, 40, 41,
+ 42, 43, 44, 45, 46, 47, 48, 49,
+ /* B16 - B31 */
+ 4, 5, 6, 7, 8, 9, 10, 11,
+ 12, 13, 14, 15, 16, 17, 18, 19,
+ -1, -1, -1
+};
+
+static int tic6x_regmap_c62x[] = {
+ /* A0 - A15 */
+ 18, 19, 20, 21, 22, 23, 24, 25,
+ 26, 27, 28, 29, 30, 31, 32, 33,
+ /* B0 - B15 */
+ 4, 5, 6, 7, 8, 9, 10, 11,
+ 12, 13, 14, 15, 16, 17, 34, 35,
+ /* CSR PC */
+ 2, 3,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1
+};
+
+#endif
+
+extern struct linux_target_ops the_low_target;
+
+static int *tic6x_regmap;
+static unsigned int tic6x_breakpoint;
+
+static void
+tic6x_arch_setup (void)
+{
+ register unsigned int csr asm ("B2");
+ unsigned int cpuid;
+
+ /* Determine the CPU we're running on to find the register order. */
+ __asm__ ("MVC .S2 CSR,%0" : "=r" (csr) :);
+ cpuid = csr >> 24;
+ switch (cpuid)
+ {
+ case 0x00: /* C62x */
+ case 0x02: /* C67x */
+ tic6x_regmap = tic6x_regmap_c62x;
+ tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
+ init_registers_tic6x_c62x_linux ();
+ break;
+ case 0x03: /* C67x+ */
+ tic6x_regmap = tic6x_regmap_c64x;
+ tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
+ init_registers_tic6x_c64x_linux ();
+ break;
+ case 0x0c: /* C64x */
+ tic6x_regmap = tic6x_regmap_c64x;
+ tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
+ init_registers_tic6x_c64x_linux ();
+ break;
+ case 0x10: /* C64x+ */
+ case 0x14: /* C674x */
+ case 0x15: /* C66x */
+ tic6x_regmap = tic6x_regmap_c64xp;
+ tic6x_breakpoint = 0x56454314; /* illegal opcode */
+ init_registers_tic6x_c64xp_linux ();
+ break;
+ default:
+ error ("Unknown CPU ID 0x%02x", cpuid);
+ }
+ the_low_target.regmap = tic6x_regmap;
+}
+
+static int
+tic6x_cannot_fetch_register (int regno)
+{
+ return (tic6x_regmap[regno] == -1);
+}
+
+static int
+tic6x_cannot_store_register (int regno)
+{
+ return (tic6x_regmap[regno] == -1);
+}
+
+static CORE_ADDR
+tic6x_get_pc (struct regcache *regcache)
+{
+ union tic6x_register pc;
+
+ collect_register_by_name (regcache, "PC", pc.buf);
+ return pc.reg32;
+}
+
+static void
+tic6x_set_pc (struct regcache *regcache, CORE_ADDR pc)
+{
+ union tic6x_register newpc;
+
+ newpc.reg32 = pc;
+ supply_register_by_name (regcache, "PC", newpc.buf);
+}
+
+#define tic6x_breakpoint_len 4
+
+static int
+tic6x_breakpoint_at (CORE_ADDR where)
+{
+ unsigned int insn;
+
+ (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
+ if (insn == tic6x_breakpoint)
+ return 1;
+
+ /* If necessary, recognize more trap instructions here. GDB only uses the
+ one. */
+ return 0;
+}
+
+/* Fetch the thread-local storage pointer for libthread_db. */
+
+ps_err_e
+ps_get_thread_area (const struct ps_prochandle *ph,
+ lwpid_t lwpid, int idx, void **base)
+{
+ if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
+ return PS_ERR;
+
+ /* IDX is the bias from the thread pointer to the beginning of the
+ thread descriptor. It has to be subtracted due to implementation
+ quirks in libthread_db. */
+ *base = (void *) ((char *) *base - idx);
+
+ return PS_OK;
+}
+
+static void
+tic6x_collect_register (struct regcache *regcache, int regno,
+ union tic6x_register *reg)
+{
+ union tic6x_register tmp_reg;
+
+ collect_register (regcache, regno, &tmp_reg.reg32);
+ reg->reg32 = tmp_reg.reg32;
+}
+
+static void
+tic6x_supply_register (struct regcache *regcache, int regno,
+ const union tic6x_register *reg)
+{
+ int offset = 0;
+
+ supply_register (regcache, regno, reg->buf + offset);
+}
+
+static void
+tic6x_fill_gregset (struct regcache *regcache, void *buf)
+{
+ union tic6x_register *regset = buf;
+ int i;
+
+ for (i = 0; i < TIC6X_NUM_REGS; i++)
+ if (tic6x_regmap[i] != -1)
+ tic6x_collect_register (regcache, i, regset + tic6x_regmap[i]);
+}
+
+static void
+tic6x_store_gregset (struct regcache *regcache, const void *buf)
+{
+ const union tic6x_register *regset = buf;
+ int i;
+
+ for (i = 0; i < TIC6X_NUM_REGS; i++)
+ if (tic6x_regmap[i] != -1)
+ tic6x_supply_register (regcache, i, regset + tic6x_regmap[i]);
+}
+
+struct regset_info target_regsets[] = {
+ { PTRACE_GETREGS, PTRACE_SETREGS, 0, TIC6X_NUM_REGS * 4, GENERAL_REGS,
+ tic6x_fill_gregset, tic6x_store_gregset },
+ { 0, 0, 0, -1, -1, NULL, NULL }
+};
+
+struct linux_target_ops the_low_target = {
+ tic6x_arch_setup,
+ TIC6X_NUM_REGS,
+ 0,
+ tic6x_cannot_fetch_register,
+ tic6x_cannot_store_register,
+ tic6x_get_pc,
+ tic6x_set_pc,
+ (const unsigned char *) &tic6x_breakpoint,
+ tic6x_breakpoint_len,
+ NULL,
+ 0,
+ tic6x_breakpoint_at,
+};
--
1.7.0.4
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFA 6/8] New port: TI C6x: gdbserver
2011-07-27 5:17 ` Yao Qi
@ 2011-07-27 7:01 ` Eli Zaretskii
2011-07-27 8:08 ` Yao Qi
0 siblings, 1 reply; 15+ messages in thread
From: Eli Zaretskii @ 2011-07-27 7:01 UTC (permalink / raw)
To: Yao Qi; +Cc: pedro, gdb-patches
> Date: Wed, 27 Jul 2011 11:45:24 +0800
> From: Yao Qi <yao@codesourcery.com>
> CC: gdb-patches@sourceware.org
>
> I've sorted this into alpha-beta order in new patch. Eli, could you
> have a review on new document part in this patch?
Here goes:
> gdb/doc/
> * gdb.texinfo: Document C6x features.
You need to state the name of the node here, see the other log
entries.
> +@node C6x Features
> +@subsection C6x Features
How about using a more full/explicit name of the target in the
subsection name? After all, C6x is just an abbreviation/acronym. I
would assume that users of these targets will at least expect to see
something like TMS320C6x, if not "Texas Instruments".
> +@cindex target descriptions, C6x features
Same here: I would suggest an additional @cindex entry with the full
name.
> +The @samp{org.gnu.gdb.tic6x.core} feature is required for C6x
> +targets.
Same here: mention the full name in the text once.
What about NEWS? do we want this addition mentioned there?
> gdb/
> * features/Makefile (WHICH): Add tic6x-c64xp-linux tic6x-c64x-linux
> and tic6x-c62x-linux.
> * features/tic6x-c6xp.xml: New.
> * features/tic6x-core.xml: New.
> * features/tic6x-gp.xml: New.
> * features/tic6x-c62x-linux.xml: New.
> * features/tic6x-c64x-linux.xml: New.
> * features/tic6x-c64xp-linux.xml: New.
> * features/tic6x-c64xp-linux.c: Generated.
> * features/tic6x-c64x-linux.c: Generated.
> * features/tic6x-c62x-linux.c: Generated.
> * regformats/tic6x-c62x-linux.dat: Generated.
> * regformats/tic6x-c64x-linux.dat: Generated.
> * regformats/tic6x-c64xp-linux.dat: Generated.
Quite a few of these files will trigger ARI alerts about file-name
collisions on 8+3 filesystems. Please consider updating fnchange.lst.
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFA 6/8] New port: TI C6x: gdbserver
2011-07-27 7:01 ` Eli Zaretskii
@ 2011-07-27 8:08 ` Yao Qi
2011-07-27 10:43 ` Eli Zaretskii
0 siblings, 1 reply; 15+ messages in thread
From: Yao Qi @ 2011-07-27 8:08 UTC (permalink / raw)
To: Eli Zaretskii; +Cc: pedro, gdb-patches
[-- Attachment #1: Type: text/plain, Size: 2474 bytes --]
On 07/27/2011 01:17 PM, Eli Zaretskii wrote:
>> Date: Wed, 27 Jul 2011 11:45:24 +0800
>> From: Yao Qi <yao@codesourcery.com>
>> CC: gdb-patches@sourceware.org
>>
>> I've sorted this into alpha-beta order in new patch. Eli, could you
>> have a review on new document part in this patch?
>
> Here goes:
>
>> gdb/doc/
>> * gdb.texinfo: Document C6x features.
>
> You need to state the name of the node here, see the other log
> entries.
>
OK, fixed.
>> +@node C6x Features
>> +@subsection C6x Features
>
> How about using a more full/explicit name of the target in the
> subsection name? After all, C6x is just an abbreviation/acronym. I
> would assume that users of these targets will at least expect to see
> something like TMS320C6x, if not "Texas Instruments".
>
Agreed. Full name "TMS320C6x" is used.
>> +@cindex target descriptions, C6x features
>
> Same here: I would suggest an additional @cindex entry with the full
> name.
>
Added.
>> +The @samp{org.gnu.gdb.tic6x.core} feature is required for C6x
>> +targets.
>
> Same here: mention the full name in the text once.
>
Fixed.
> What about NEWS? do we want this addition mentioned there?
>
Yes, I've sent an updated NEWS and copied you.
New port: TI C6x: NEWS
http://sourceware.org/ml/gdb-patches/2011-07/msg00750.html
Beside NEWS, we also have a documentation patch on a new packet in
remote protocol. Please review.
New port: TI C6x: Document on qXfer:fdpic:read packet
http://sourceware.org/ml/gdb-patches/2011-07/msg00568.html
>> gdb/
>> * features/Makefile (WHICH): Add tic6x-c64xp-linux tic6x-c64x-linux
>> and tic6x-c62x-linux.
>> * features/tic6x-c6xp.xml: New.
>> * features/tic6x-core.xml: New.
>> * features/tic6x-gp.xml: New.
>> * features/tic6x-c62x-linux.xml: New.
>> * features/tic6x-c64x-linux.xml: New.
>> * features/tic6x-c64xp-linux.xml: New.
>> * features/tic6x-c64xp-linux.c: Generated.
>> * features/tic6x-c64x-linux.c: Generated.
>> * features/tic6x-c62x-linux.c: Generated.
>> * regformats/tic6x-c62x-linux.dat: Generated.
>> * regformats/tic6x-c64x-linux.dat: Generated.
>> * regformats/tic6x-c64xp-linux.dat: Generated.
>
> Quite a few of these files will trigger ARI alerts about file-name
> collisions on 8+3 filesystems. Please consider updating fnchange.lst.
Added these new file names in fnchange.lst.
--
Yao (é½å°§)
[-- Attachment #2: 0005-target-description.patch --]
[-- Type: text/x-patch, Size: 29607 bytes --]
gdb/doc/
* gdb.texinfo (Standard Target Features): Document C6x features.
gdb/
* features/Makefile (WHICH): Add tic6x-c64xp-linux tic6x-c64x-linux
and tic6x-c62x-linux.
* features/tic6x-c6xp.xml: New.
* features/tic6x-core.xml: New.
* features/tic6x-gp.xml: New.
* features/tic6x-c62x-linux.xml: New.
* features/tic6x-c64x-linux.xml: New.
* features/tic6x-c64xp-linux.xml: New.
* features/tic6x-c64xp-linux.c: Generated.
* features/tic6x-c64x-linux.c: Generated.
* features/tic6x-c62x-linux.c: Generated.
* regformats/tic6x-c62x-linux.dat: Generated.
* regformats/tic6x-c64x-linux.dat: Generated.
* regformats/tic6x-c64xp-linux.dat: Generated.
* config/djgpp/fnchange.lst: Add features/tic6x-*.xml and
features/tic6x-*.c files.
Add regformats/tic6x-*-linux.dat files.
Add tic6x-tdep.c, tic6x-tdep.h and tic6x-linux-tdep.c.
---
gdb/config/djgpp/fnchange.lst | 9 +++
gdb/doc/gdb.texinfo | 16 ++++++
gdb/features/Makefile | 7 ++-
gdb/features/tic6x-c62x-linux.c | 56 ++++++++++++++++++++
gdb/features/tic6x-c62x-linux.xml | 13 +++++
gdb/features/tic6x-c64x-linux.c | 90 ++++++++++++++++++++++++++++++++
gdb/features/tic6x-c64x-linux.xml | 14 +++++
gdb/features/tic6x-c64xp-linux.c | 95 ++++++++++++++++++++++++++++++++++
gdb/features/tic6x-c64xp-linux.xml | 15 +++++
gdb/features/tic6x-c6xp.xml | 13 +++++
gdb/features/tic6x-core.xml | 44 ++++++++++++++++
gdb/features/tic6x-gp.xml | 42 +++++++++++++++
gdb/regformats/tic6x-c62x-linux.dat | 38 +++++++++++++
gdb/regformats/tic6x-c64x-linux.dat | 70 +++++++++++++++++++++++++
gdb/regformats/tic6x-c64xp-linux.dat | 73 ++++++++++++++++++++++++++
15 files changed, 593 insertions(+), 2 deletions(-)
create mode 100644 gdb/features/tic6x-c62x-linux.c
create mode 100644 gdb/features/tic6x-c62x-linux.xml
create mode 100644 gdb/features/tic6x-c64x-linux.c
create mode 100644 gdb/features/tic6x-c64x-linux.xml
create mode 100644 gdb/features/tic6x-c64xp-linux.c
create mode 100644 gdb/features/tic6x-c64xp-linux.xml
create mode 100644 gdb/features/tic6x-c6xp.xml
create mode 100644 gdb/features/tic6x-core.xml
create mode 100644 gdb/features/tic6x-gp.xml
create mode 100644 gdb/regformats/tic6x-c62x-linux.dat
create mode 100644 gdb/regformats/tic6x-c64x-linux.dat
create mode 100644 gdb/regformats/tic6x-c64xp-linux.dat
diff --git a/gdb/config/djgpp/fnchange.lst b/gdb/config/djgpp/fnchange.lst
index 4b86c31..71b79b3 100644
--- a/gdb/config/djgpp/fnchange.lst
+++ b/gdb/config/djgpp/fnchange.lst
@@ -240,6 +240,11 @@
@V@/gdb/features/i386/i386-mmx.c @V@/gdb/features/i386/i32-m.c
@V@/gdb/features/i386/i386-mmx-linux.xml @V@/gdb/features/i386/i32-ml.xml
@V@/gdb/features/i386/i386-mmx.xml @V@/gdb/features/i386/i32-m.xml
+@V@/gdb/features/tic6x-core.xml @V@/gdb/features/tic6x-gp.xml
+@V@/gdb/features/tic6x-c6xp.xml @V@/gdb/features/tic6x-c62x-linux.xml
+@V@/gdb/features/tic6x-c64x-linux.xml @V@/gdb/features/tic6x-c64xp-linux.xml
+@V@/gdb/features/tic6x-c64xp-linux.c @V@/gdb/features/tic6x-c64x-linux.c
+@V@/gdb/features/tic6x-c62x-linux.c
@V@/gdb/f-exp.tab.c @V@/gdb/f-exp_tab.c
@V@/gdb/gdbserver/linux-cris-low.c @V@/gdb/gdbserver/lx-cris.c
@V@/gdb/gdbserver/linux-crisv32-low.c @V@/gdb/gdbserver/lx-cris32.c
@@ -341,6 +346,8 @@
@V@/gdb/regformats/rs6000/powerpc-vsx64l.dat @V@/gdb/regformats/rs6000/ppc-v64l.dat
@V@/gdb/regformats/rs6000/powerpc-cell32l.dat @V@/gdb/regformats/rs6000/ppc-c32l.dat
@V@/gdb/regformats/rs6000/powerpc-cell64l.dat @V@/gdb/regformats/rs6000/ppc-c64l.dat
+@V@/gdb/regformats/tic6x-c62x-linux.dat @V@/gdb/regformats/tic6x-c64x-linux.dat
+@V@/gdb/regformats/tic6x-c64xp-linux.dat
@V@/gdb/remote-e7000.c @V@/gdb/rmt-e7000.c
@V@/gdb/remote-est.c @V@/gdb/rmt-est.c
@V@/gdb/remote-mips.c @V@/gdb/rmt-mips.c
@@ -368,6 +375,8 @@
@V@/gdb/sparc-linux-tdep.c @V@/gdb/splx-tdep.c
@V@/gdb/sparc-sol2-nat.c @V@/gdb/spsol2-nat.c
@V@/gdb/sparc-sol2-tdep.c @V@/gdb/spsol2-tdep.c
+@V@/gdb/tic6x-tdep.c @V@/gdb/tic6x-tdep.h
+@V@/gdb/tic6x-linux-tdep.c
@V@/gdb/testsuite/.gdbinit @V@/gdb/testsuite/gdb.ini
@V@/gdb/testsuite/gdb.arch/altivec-abi.c @V@/gdb/testsuite/gdb.arch/av-abi.c
@V@/gdb/testsuite/gdb.arch/altivec-abi.exp @V@/gdb/testsuite/gdb.arch/av-abi.exp
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index 37c81b8..b5b6c74 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -36854,6 +36854,7 @@ registers using the capitalization used in the description.
* MIPS Features::
* M68K Features::
* PowerPC Features::
+* TIC6x Features::
@end menu
@@ -37015,6 +37016,21 @@ contain registers @samp{ev0h} through @samp{ev31h}, @samp{acc}, and
these to present registers @samp{ev0} through @samp{ev31} to the
user.
+@node TIC6x Features
+@subsection TMS320C6x Features
+@cindex target descriptions, TIC6x features
+@cindex target descriptions, TMS320C6x features
+The @samp{org.gnu.gdb.tic6x.core} feature is required for TMS320C6x
+targets. It should contain registers @samp{A0} through @samp{A15},
+registers @samp{B0} through @samp{B15}, @samp{CSR} and @samp{PC}.
+
+The @samp{org.gnu.gdb.tic6x.gp} feature is optional. It should
+contain registers @samp{A16} through @samp{A31} and @samp{B16}
+through @samp{B31}.
+
+The @samp{org.gnu.gdb.tic6x.c6xp} feature is optional. It should
+contain registers @samp{TSR}, @samp{ILC} and @samp{RILC}.
+
@node Operating System Information
@appendix Operating System Information
@cindex operating system information
diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index 4e8e7ee..e7e72d1 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -41,7 +41,8 @@ WHICH = arm-with-iwmmxt arm-with-vfpv2 arm-with-vfpv3 arm-with-neon \
rs6000/powerpc-32l rs6000/powerpc-altivec32l rs6000/powerpc-e500l \
rs6000/powerpc-64l rs6000/powerpc-altivec64l rs6000/powerpc-vsx32l \
rs6000/powerpc-vsx64l rs6000/powerpc-cell32l rs6000/powerpc-cell64l \
- s390-linux32 s390-linux64 s390x-linux64
+ s390-linux32 s390-linux64 s390x-linux64 \
+ tic6x-c64xp-linux tic6x-c64x-linux tic6x-c62x-linux
# Record which registers should be sent to GDB by default after stop.
arm-expedite = r11,sp,pc
@@ -63,7 +64,9 @@ rs6000/powerpc-cell64l-expedite = r1,pc,r0,orig_r3,r4
s390-linux32-expedite = r14,r15,pswa
s390-linux64-expedite = r14l,r15l,pswa
s390x-linux64-expedite = r14,r15,pswa
-
+tic6x-c64xp-linux-expedite = A15,PC
+tic6x-c64x-linux-expedite = A15,PC
+tic6x-c62x-linux-expedite = A15,PC
XSLTPROC = xsltproc
outdir = ../regformats
diff --git a/gdb/features/tic6x-c62x-linux.c b/gdb/features/tic6x-c62x-linux.c
new file mode 100644
index 0000000..df82fc2
--- /dev/null
+++ b/gdb/features/tic6x-c62x-linux.c
@@ -0,0 +1,56 @@
+/* THIS FILE IS GENERATED. Original: tic6x-c62x-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_tic6x_c62x_linux;
+static void
+initialize_tdesc_tic6x_c62x_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type, *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("tic6x"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.core");
+ tdesc_create_reg (feature, "A0", 0, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A1", 1, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A2", 2, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A3", 3, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A4", 4, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A5", 5, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A6", 6, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A7", 7, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A8", 8, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A9", 9, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A10", 10, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A11", 11, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A12", 12, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A13", 13, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A14", 14, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A15", 15, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B0", 16, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B1", 17, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B2", 18, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B3", 19, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B4", 20, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B5", 21, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B6", 22, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B7", 23, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B8", 24, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B9", 25, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B10", 26, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B11", 27, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B12", 28, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B13", 29, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B14", 30, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B15", 31, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "CSR", 32, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "PC", 33, 1, NULL, 32, "code_ptr");
+
+ tdesc_tic6x_c62x_linux = result;
+}
diff --git a/gdb/features/tic6x-c62x-linux.xml b/gdb/features/tic6x-c62x-linux.xml
new file mode 100644
index 0000000..0319438
--- /dev/null
+++ b/gdb/features/tic6x-c62x-linux.xml
@@ -0,0 +1,13 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>tic6x</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="tic6x-core.xml"/>
+</target>
diff --git a/gdb/features/tic6x-c64x-linux.c b/gdb/features/tic6x-c64x-linux.c
new file mode 100644
index 0000000..39f9e95
--- /dev/null
+++ b/gdb/features/tic6x-c64x-linux.c
@@ -0,0 +1,90 @@
+/* THIS FILE IS GENERATED. Original: tic6x-c64x-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_tic6x_c64x_linux;
+static void
+initialize_tdesc_tic6x_c64x_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type, *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("tic6x"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.core");
+ tdesc_create_reg (feature, "A0", 0, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A1", 1, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A2", 2, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A3", 3, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A4", 4, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A5", 5, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A6", 6, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A7", 7, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A8", 8, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A9", 9, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A10", 10, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A11", 11, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A12", 12, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A13", 13, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A14", 14, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A15", 15, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B0", 16, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B1", 17, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B2", 18, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B3", 19, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B4", 20, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B5", 21, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B6", 22, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B7", 23, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B8", 24, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B9", 25, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B10", 26, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B11", 27, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B12", 28, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B13", 29, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B14", 30, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B15", 31, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "CSR", 32, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "PC", 33, 1, NULL, 32, "code_ptr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.gp");
+ tdesc_create_reg (feature, "A16", 34, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A17", 35, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A18", 36, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A19", 37, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A20", 38, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A21", 39, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A22", 40, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A23", 41, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A24", 42, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A25", 43, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A26", 44, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A27", 45, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A28", 46, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A29", 47, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A30", 48, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A31", 49, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B16", 50, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B17", 51, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B18", 52, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B19", 53, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B20", 54, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B21", 55, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B22", 56, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B23", 57, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B24", 58, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B25", 59, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B26", 60, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B27", 61, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B28", 62, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B29", 63, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B30", 64, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B31", 65, 1, NULL, 32, "uint32");
+
+ tdesc_tic6x_c64x_linux = result;
+}
diff --git a/gdb/features/tic6x-c64x-linux.xml b/gdb/features/tic6x-c64x-linux.xml
new file mode 100644
index 0000000..2d11bd0
--- /dev/null
+++ b/gdb/features/tic6x-c64x-linux.xml
@@ -0,0 +1,14 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>tic6x</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="tic6x-core.xml"/>
+ <xi:include href="tic6x-gp.xml"/>
+</target>
diff --git a/gdb/features/tic6x-c64xp-linux.c b/gdb/features/tic6x-c64xp-linux.c
new file mode 100644
index 0000000..a959ec6
--- /dev/null
+++ b/gdb/features/tic6x-c64xp-linux.c
@@ -0,0 +1,95 @@
+/* THIS FILE IS GENERATED. Original: tic6x-c64xp-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_tic6x_c64xp_linux;
+static void
+initialize_tdesc_tic6x_c64xp_linux (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct tdesc_type *field_type, *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("tic6x"));
+
+ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.core");
+ tdesc_create_reg (feature, "A0", 0, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A1", 1, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A2", 2, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A3", 3, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A4", 4, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A5", 5, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A6", 6, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A7", 7, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A8", 8, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A9", 9, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A10", 10, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A11", 11, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A12", 12, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A13", 13, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A14", 14, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A15", 15, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B0", 16, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B1", 17, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B2", 18, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B3", 19, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B4", 20, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B5", 21, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B6", 22, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B7", 23, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B8", 24, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B9", 25, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B10", 26, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B11", 27, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B12", 28, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B13", 29, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B14", 30, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B15", 31, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "CSR", 32, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "PC", 33, 1, NULL, 32, "code_ptr");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.gp");
+ tdesc_create_reg (feature, "A16", 34, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A17", 35, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A18", 36, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A19", 37, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A20", 38, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A21", 39, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A22", 40, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A23", 41, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A24", 42, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A25", 43, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A26", 44, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A27", 45, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A28", 46, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A29", 47, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A30", 48, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "A31", 49, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B16", 50, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B17", 51, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B18", 52, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B19", 53, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B20", 54, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B21", 55, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B22", 56, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B23", 57, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B24", 58, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B25", 59, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B26", 60, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B27", 61, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B28", 62, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B29", 63, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B30", 64, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "B31", 65, 1, NULL, 32, "uint32");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.c6xp");
+ tdesc_create_reg (feature, "TSR", 66, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "ILC", 67, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "RILC", 68, 1, NULL, 32, "uint32");
+
+ tdesc_tic6x_c64xp_linux = result;
+}
diff --git a/gdb/features/tic6x-c64xp-linux.xml b/gdb/features/tic6x-c64xp-linux.xml
new file mode 100644
index 0000000..6ff8407
--- /dev/null
+++ b/gdb/features/tic6x-c64xp-linux.xml
@@ -0,0 +1,15 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>tic6x</architecture>
+ <osabi>GNU/Linux</osabi>
+ <xi:include href="tic6x-core.xml"/>
+ <xi:include href="tic6x-gp.xml"/>
+ <xi:include href="tic6x-c6xp.xml"/>
+</target>
diff --git a/gdb/features/tic6x-c6xp.xml b/gdb/features/tic6x-c6xp.xml
new file mode 100644
index 0000000..0923b1b
--- /dev/null
+++ b/gdb/features/tic6x-c6xp.xml
@@ -0,0 +1,13 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.tic6x.c6xp">
+ <reg name="TSR" bitsize="32" type="uint32"/>
+ <reg name="ILC" bitsize="32" type="uint32"/>
+ <reg name="RILC" bitsize="32" type="uint32"/>
+</feature>
diff --git a/gdb/features/tic6x-core.xml b/gdb/features/tic6x-core.xml
new file mode 100644
index 0000000..63074eb
--- /dev/null
+++ b/gdb/features/tic6x-core.xml
@@ -0,0 +1,44 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.tic6x.core">
+ <reg name="A0" bitsize="32" type="uint32"/>
+ <reg name="A1" bitsize="32" type="uint32"/>
+ <reg name="A2" bitsize="32" type="uint32"/>
+ <reg name="A3" bitsize="32" type="uint32"/>
+ <reg name="A4" bitsize="32" type="uint32"/>
+ <reg name="A5" bitsize="32" type="uint32"/>
+ <reg name="A6" bitsize="32" type="uint32"/>
+ <reg name="A7" bitsize="32" type="uint32"/>
+ <reg name="A8" bitsize="32" type="uint32"/>
+ <reg name="A9" bitsize="32" type="uint32"/>
+ <reg name="A10" bitsize="32" type="uint32"/>
+ <reg name="A11" bitsize="32" type="uint32"/>
+ <reg name="A12" bitsize="32" type="uint32"/>
+ <reg name="A13" bitsize="32" type="uint32"/>
+ <reg name="A14" bitsize="32" type="uint32"/>
+ <reg name="A15" bitsize="32" type="uint32"/>
+ <reg name="B0" bitsize="32" type="uint32"/>
+ <reg name="B1" bitsize="32" type="uint32"/>
+ <reg name="B2" bitsize="32" type="uint32"/>
+ <reg name="B3" bitsize="32" type="uint32"/>
+ <reg name="B4" bitsize="32" type="uint32"/>
+ <reg name="B5" bitsize="32" type="uint32"/>
+ <reg name="B6" bitsize="32" type="uint32"/>
+ <reg name="B7" bitsize="32" type="uint32"/>
+ <reg name="B8" bitsize="32" type="uint32"/>
+ <reg name="B9" bitsize="32" type="uint32"/>
+ <reg name="B10" bitsize="32" type="uint32"/>
+ <reg name="B11" bitsize="32" type="uint32"/>
+ <reg name="B12" bitsize="32" type="uint32"/>
+ <reg name="B13" bitsize="32" type="uint32"/>
+ <reg name="B14" bitsize="32" type="uint32"/>
+ <reg name="B15" bitsize="32" type="uint32"/>
+ <reg name="CSR" bitsize="32" type="uint32"/>
+ <reg name="PC" bitsize="32" type="code_ptr"/>
+</feature>
diff --git a/gdb/features/tic6x-gp.xml b/gdb/features/tic6x-gp.xml
new file mode 100644
index 0000000..d1249f3
--- /dev/null
+++ b/gdb/features/tic6x-gp.xml
@@ -0,0 +1,42 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.tic6x.gp">
+ <reg name="A16" bitsize="32" type="uint32"/>
+ <reg name="A17" bitsize="32" type="uint32"/>
+ <reg name="A18" bitsize="32" type="uint32"/>
+ <reg name="A19" bitsize="32" type="uint32"/>
+ <reg name="A20" bitsize="32" type="uint32"/>
+ <reg name="A21" bitsize="32" type="uint32"/>
+ <reg name="A22" bitsize="32" type="uint32"/>
+ <reg name="A23" bitsize="32" type="uint32"/>
+ <reg name="A24" bitsize="32" type="uint32"/>
+ <reg name="A25" bitsize="32" type="uint32"/>
+ <reg name="A26" bitsize="32" type="uint32"/>
+ <reg name="A27" bitsize="32" type="uint32"/>
+ <reg name="A28" bitsize="32" type="uint32"/>
+ <reg name="A29" bitsize="32" type="uint32"/>
+ <reg name="A30" bitsize="32" type="uint32"/>
+ <reg name="A31" bitsize="32" type="uint32"/>
+ <reg name="B16" bitsize="32" type="uint32"/>
+ <reg name="B17" bitsize="32" type="uint32"/>
+ <reg name="B18" bitsize="32" type="uint32"/>
+ <reg name="B19" bitsize="32" type="uint32"/>
+ <reg name="B20" bitsize="32" type="uint32"/>
+ <reg name="B21" bitsize="32" type="uint32"/>
+ <reg name="B22" bitsize="32" type="uint32"/>
+ <reg name="B23" bitsize="32" type="uint32"/>
+ <reg name="B24" bitsize="32" type="uint32"/>
+ <reg name="B25" bitsize="32" type="uint32"/>
+ <reg name="B26" bitsize="32" type="uint32"/>
+ <reg name="B27" bitsize="32" type="uint32"/>
+ <reg name="B28" bitsize="32" type="uint32"/>
+ <reg name="B29" bitsize="32" type="uint32"/>
+ <reg name="B30" bitsize="32" type="uint32"/>
+ <reg name="B31" bitsize="32" type="uint32"/>
+</feature>
diff --git a/gdb/regformats/tic6x-c62x-linux.dat b/gdb/regformats/tic6x-c62x-linux.dat
new file mode 100644
index 0000000..3758d84
--- /dev/null
+++ b/gdb/regformats/tic6x-c62x-linux.dat
@@ -0,0 +1,38 @@
+# DO NOT EDIT: generated from tic6x-c62x-linux.xml
+name:tic6x_c62x_linux
+xmltarget:tic6x-c62x-linux.xml
+expedite:A15,PC
+32:A0
+32:A1
+32:A2
+32:A3
+32:A4
+32:A5
+32:A6
+32:A7
+32:A8
+32:A9
+32:A10
+32:A11
+32:A12
+32:A13
+32:A14
+32:A15
+32:B0
+32:B1
+32:B2
+32:B3
+32:B4
+32:B5
+32:B6
+32:B7
+32:B8
+32:B9
+32:B10
+32:B11
+32:B12
+32:B13
+32:B14
+32:B15
+32:CSR
+32:PC
diff --git a/gdb/regformats/tic6x-c64x-linux.dat b/gdb/regformats/tic6x-c64x-linux.dat
new file mode 100644
index 0000000..8b1724c
--- /dev/null
+++ b/gdb/regformats/tic6x-c64x-linux.dat
@@ -0,0 +1,70 @@
+# DO NOT EDIT: generated from tic6x-c64x-linux.xml
+name:tic6x_c64x_linux
+xmltarget:tic6x-c64x-linux.xml
+expedite:A15,PC
+32:A0
+32:A1
+32:A2
+32:A3
+32:A4
+32:A5
+32:A6
+32:A7
+32:A8
+32:A9
+32:A10
+32:A11
+32:A12
+32:A13
+32:A14
+32:A15
+32:B0
+32:B1
+32:B2
+32:B3
+32:B4
+32:B5
+32:B6
+32:B7
+32:B8
+32:B9
+32:B10
+32:B11
+32:B12
+32:B13
+32:B14
+32:B15
+32:CSR
+32:PC
+32:A16
+32:A17
+32:A18
+32:A19
+32:A20
+32:A21
+32:A22
+32:A23
+32:A24
+32:A25
+32:A26
+32:A27
+32:A28
+32:A29
+32:A30
+32:A31
+32:B16
+32:B17
+32:B18
+32:B19
+32:B20
+32:B21
+32:B22
+32:B23
+32:B24
+32:B25
+32:B26
+32:B27
+32:B28
+32:B29
+32:B30
+32:B31
diff --git a/gdb/regformats/tic6x-c64xp-linux.dat b/gdb/regformats/tic6x-c64xp-linux.dat
new file mode 100644
index 0000000..4d12148
--- /dev/null
+++ b/gdb/regformats/tic6x-c64xp-linux.dat
@@ -0,0 +1,73 @@
+# DO NOT EDIT: generated from tic6x-c64xp-linux.xml
+name:tic6x_c64xp_linux
+xmltarget:tic6x-c64xp-linux.xml
+expedite:A15,PC
+32:A0
+32:A1
+32:A2
+32:A3
+32:A4
+32:A5
+32:A6
+32:A7
+32:A8
+32:A9
+32:A10
+32:A11
+32:A12
+32:A13
+32:A14
+32:A15
+32:B0
+32:B1
+32:B2
+32:B3
+32:B4
+32:B5
+32:B6
+32:B7
+32:B8
+32:B9
+32:B10
+32:B11
+32:B12
+32:B13
+32:B14
+32:B15
+32:CSR
+32:PC
+32:A16
+32:A17
+32:A18
+32:A19
+32:A20
+32:A21
+32:A22
+32:A23
+32:A24
+32:A25
+32:A26
+32:A27
+32:A28
+32:A29
+32:A30
+32:A31
+32:B16
+32:B17
+32:B18
+32:B19
+32:B20
+32:B21
+32:B22
+32:B23
+32:B24
+32:B25
+32:B26
+32:B27
+32:B28
+32:B29
+32:B30
+32:B31
+32:TSR
+32:ILC
+32:RILC
--
1.7.0.4
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFA 6/8] New port: TI C6x: gdbserver
2011-07-27 8:08 ` Yao Qi
@ 2011-07-27 10:43 ` Eli Zaretskii
2011-07-27 12:32 ` Yao Qi
0 siblings, 1 reply; 15+ messages in thread
From: Eli Zaretskii @ 2011-07-27 10:43 UTC (permalink / raw)
To: Yao Qi; +Cc: pedro, gdb-patches
> Date: Wed, 27 Jul 2011 15:00:37 +0800
> From: Yao Qi <yao@codesourcery.com>
> CC: pedro@codesourcery.com, gdb-patches@sourceware.org
>
> gdb/doc/
> * gdb.texinfo (Standard Target Features): Document C6x features.
Please add
(TIC6x Features): New node.
> +@V@/gdb/features/tic6x-core.xml @V@/gdb/features/tic6x-gp.xml
> +@V@/gdb/features/tic6x-c6xp.xml @V@/gdb/features/tic6x-c62x-linux.xml
These entries cause a file on the left to be renamed to the name on
the right when the tarball is unpacked. The new names should not
clash after 8+3 truncation. So the added entries are incorrect.
Otherwise, fine with me.
Thanks.
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFA 6/8] New port: TI C6x: gdbserver
2011-07-27 10:43 ` Eli Zaretskii
@ 2011-07-27 12:32 ` Yao Qi
2011-07-27 14:44 ` Eli Zaretskii
0 siblings, 1 reply; 15+ messages in thread
From: Yao Qi @ 2011-07-27 12:32 UTC (permalink / raw)
To: Eli Zaretskii; +Cc: pedro, gdb-patches
[-- Attachment #1: Type: text/plain, Size: 637 bytes --]
On 07/27/2011 06:10 PM, Eli Zaretskii wrote:
>> > gdb/doc/
>> > * gdb.texinfo (Standard Target Features): Document C6x features.
> Please add
> (TIC6x Features): New node.
>
Added.
>> > +@V@/gdb/features/tic6x-core.xml @V@/gdb/features/tic6x-gp.xml
>> > +@V@/gdb/features/tic6x-c6xp.xml @V@/gdb/features/tic6x-c62x-linux.xml
> These entries cause a file on the left to be renamed to the name on
> the right when the tarball is unpacked. The new names should not
> clash after 8+3 truncation. So the added entries are incorrect.
>
Looks like I misunderstood this file. Fixed in new patch.
--
Yao (é½å°§)
[-- Attachment #2: 0005-target-description.patch --]
[-- Type: text/x-patch, Size: 3935 bytes --]
gdb/doc/
* gdb.texinfo (Standard Target Features): Document C6x features.
(TIC6x Features): New node.
gdb/
* config/djgpp/fnchange.lst: Add features/tic6x-*.xml and
features/tic6x-*.c files.
Add regformats/tic6x-*-linux.dat files.
Add tic6x-tdep.c, tic6x-tdep.h and tic6x-linux-tdep.c.
---
gdb/config/djgpp/fnchange.lst | 15 +++++
gdb/doc/gdb.texinfo | 16 ++++++
diff --git a/gdb/config/djgpp/fnchange.lst b/gdb/config/djgpp/fnchange.lst
index 4b86c31..941abb2 100644
--- a/gdb/config/djgpp/fnchange.lst
+++ b/gdb/config/djgpp/fnchange.lst
@@ -240,6 +240,15 @@
@V@/gdb/features/i386/i386-mmx.c @V@/gdb/features/i386/i32-m.c
@V@/gdb/features/i386/i386-mmx-linux.xml @V@/gdb/features/i386/i32-ml.xml
@V@/gdb/features/i386/i386-mmx.xml @V@/gdb/features/i386/i32-m.xml
+@V@/gdb/features/tic6x-core.xml @V@/gdb/features/c6x-core.xml
+@V@/gdb/features/tic6x-gp.xml @V@/gdb/features/c6x-gp.xml
+@V@/gdb/features/tic6x-c6xp.xml @V@/gdb/features/c6x-c6xp.xml
+@V@/gdb/features/tic6x-c62x-linux.xml @V@/gdb/features/c6x-62xl.xml
+@V@/gdb/features/tic6x-c64x-linux.xml @V@/gdb/features/c6x-64xl.xml
+@V@/gdb/features/tic6x-c64xp-linux.xml @V@/gdb/features/c6x64xpl.xml
+@V@/gdb/features/tic6x-c64xp-linux.c @V@/gdb/features/c6x64xpl.c
+@V@/gdb/features/tic6x-c64x-linux.c @V@/gdb/features/c6x-64xl.c
+@V@/gdb/features/tic6x-c62x-linux.c @V@/gdb/features/c6x-62xl.c
@V@/gdb/f-exp.tab.c @V@/gdb/f-exp_tab.c
@V@/gdb/gdbserver/linux-cris-low.c @V@/gdb/gdbserver/lx-cris.c
@V@/gdb/gdbserver/linux-crisv32-low.c @V@/gdb/gdbserver/lx-cris32.c
@@ -341,6 +350,9 @@
@V@/gdb/regformats/rs6000/powerpc-vsx64l.dat @V@/gdb/regformats/rs6000/ppc-v64l.dat
@V@/gdb/regformats/rs6000/powerpc-cell32l.dat @V@/gdb/regformats/rs6000/ppc-c32l.dat
@V@/gdb/regformats/rs6000/powerpc-cell64l.dat @V@/gdb/regformats/rs6000/ppc-c64l.dat
+@V@/gdb/regformats/tic6x-c62x-linux.dat @V@/gdb/regformats/c6x-62xl.dat
+@V@/gdb/regformats/tic6x-c64x-linux.dat @V@/gdb/regformats/c6x-64xl.dat
+@V@/gdb/regformats/tic6x-c64xp-linux.dat @V@/gdb/regformats/c6x64xpl.dat
@V@/gdb/remote-e7000.c @V@/gdb/rmt-e7000.c
@V@/gdb/remote-est.c @V@/gdb/rmt-est.c
@V@/gdb/remote-mips.c @V@/gdb/rmt-mips.c
@@ -368,6 +380,9 @@
@V@/gdb/sparc-linux-tdep.c @V@/gdb/splx-tdep.c
@V@/gdb/sparc-sol2-nat.c @V@/gdb/spsol2-nat.c
@V@/gdb/sparc-sol2-tdep.c @V@/gdb/spsol2-tdep.c
+@V@/gdb/tic6x-tdep.c @V@/gdb/c6x-tdep.c
+@V@/gdb/tic6x-tdep.h @V@/gdb/c6x-tdep.h
+@V@/gdb/tic6x-linux-tdep.c @V@/gdb/c6xl-tdep.c
@V@/gdb/testsuite/.gdbinit @V@/gdb/testsuite/gdb.ini
@V@/gdb/testsuite/gdb.arch/altivec-abi.c @V@/gdb/testsuite/gdb.arch/av-abi.c
@V@/gdb/testsuite/gdb.arch/altivec-abi.exp @V@/gdb/testsuite/gdb.arch/av-abi.exp
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index 37c81b8..b5b6c74 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -36854,6 +36854,7 @@ registers using the capitalization used in the description.
* MIPS Features::
* M68K Features::
* PowerPC Features::
+* TIC6x Features::
@end menu
@@ -37015,6 +37016,21 @@ contain registers @samp{ev0h} through @samp{ev31h}, @samp{acc}, and
these to present registers @samp{ev0} through @samp{ev31} to the
user.
+@node TIC6x Features
+@subsection TMS320C6x Features
+@cindex target descriptions, TIC6x features
+@cindex target descriptions, TMS320C6x features
+The @samp{org.gnu.gdb.tic6x.core} feature is required for TMS320C6x
+targets. It should contain registers @samp{A0} through @samp{A15},
+registers @samp{B0} through @samp{B15}, @samp{CSR} and @samp{PC}.
+
+The @samp{org.gnu.gdb.tic6x.gp} feature is optional. It should
+contain registers @samp{A16} through @samp{A31} and @samp{B16}
+through @samp{B31}.
+
+The @samp{org.gnu.gdb.tic6x.c6xp} feature is optional. It should
+contain registers @samp{TSR}, @samp{ILC} and @samp{RILC}.
+
@node Operating System Information
@appendix Operating System Information
@cindex operating system information
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFA 6/8] New port: TI C6x: gdbserver
2011-07-27 12:32 ` Yao Qi
@ 2011-07-27 14:44 ` Eli Zaretskii
0 siblings, 0 replies; 15+ messages in thread
From: Eli Zaretskii @ 2011-07-27 14:44 UTC (permalink / raw)
To: Yao Qi; +Cc: pedro, gdb-patches
> Date: Wed, 27 Jul 2011 18:43:02 +0800
> From: Yao Qi <yao@codesourcery.com>
> CC: pedro@codesourcery.com, gdb-patches@sourceware.org
>
> >> > +@V@/gdb/features/tic6x-core.xml @V@/gdb/features/tic6x-gp.xml
> >> > +@V@/gdb/features/tic6x-c6xp.xml @V@/gdb/features/tic6x-c62x-linux.xml
> > These entries cause a file on the left to be renamed to the name on
> > the right when the tarball is unpacked. The new names should not
> > clash after 8+3 truncation. So the added entries are incorrect.
> >
>
> Looks like I misunderstood this file. Fixed in new patch.
Thanks, this is fine.
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2011-07-27 10:53 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-07-20 2:12 [RFA 6/8] New port: TI C6x: gdbserver Yao Qi
2011-07-20 18:22 ` Pedro Alves
2011-07-21 9:52 ` Yao Qi
2011-07-21 12:21 ` Pedro Alves
2011-07-25 7:27 ` Yao Qi
2011-07-26 18:18 ` Pedro Alves
2011-07-27 5:17 ` Yao Qi
2011-07-27 7:01 ` Eli Zaretskii
2011-07-27 8:08 ` Yao Qi
2011-07-27 10:43 ` Eli Zaretskii
2011-07-27 12:32 ` Yao Qi
2011-07-27 14:44 ` Eli Zaretskii
2011-07-27 6:19 ` Yao Qi
2011-07-21 14:04 ` Joseph S. Myers
2011-07-22 10:01 ` Yao Qi
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