From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 751 invoked by alias); 25 Jul 2011 07:19:51 -0000 Received: (qmail 719 invoked by uid 22791); 25 Jul 2011 07:19:46 -0000 X-SWARE-Spam-Status: No, hits=-2.2 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,TW_AV,TW_EG,TW_FP,TW_IW,TW_MX,TW_VF X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 25 Jul 2011 07:19:26 +0000 Received: (qmail 23102 invoked from network); 25 Jul 2011 07:19:24 -0000 Received: from unknown (HELO ?192.168.0.101?) (yao@127.0.0.2) by mail.codesourcery.com with ESMTPA; 25 Jul 2011 07:19:24 -0000 Message-ID: <4E2D18F3.6080006@codesourcery.com> Date: Mon, 25 Jul 2011 07:27:00 -0000 From: Yao Qi User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.17) Gecko/20110424 Lightning/1.0b2 Thunderbird/3.1.10 MIME-Version: 1.0 To: Pedro Alves CC: gdb-patches@sourceware.org Subject: Re: [RFA 6/8] New port: TI C6x: gdbserver References: <4E2638CE.7050205@codesourcery.com> <201107201855.09188.pedro@codesourcery.com> <4E27D5C7.5090707@codesourcery.com> <201107211213.41018.pedro@codesourcery.com> In-Reply-To: <201107211213.41018.pedro@codesourcery.com> Content-Type: multipart/mixed; boundary="------------040602070901050201020706" X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2011-07/txt/msg00682.txt.bz2 This is a multi-part message in MIME format. --------------040602070901050201020706 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Content-length: 1665 On 07/21/2011 07:13 PM, Pedro Alves wrote: > On Thursday 21 July 2011 08:31:19, Yao Qi wrote: >>>> + >>>> + >>>> + >>>> + >>>> + >>> >>> ... >>> >>> These are all general purpose, core registers, right? >>> >> >> Not really. A0-31 and B0-31 are general purpose registers, even there >> are some difference among different C6x cores (such as C62x, C67x, and >> C64x). The rest of them can be regarded as control registers and status >> registers. The target description should be refined for the different >> C6x cores, and I'd like to do it in follow-up patches later. Is it OK? > > I'd rather start with things clean than change the target's register > set after the fact, but I won't insist. At least you should document in > the manual which registers the new standard feature org.gnu.gdb.tic6x.cpu > requires (under Standard Target Features) though. > Agree. The target description part is rewritten in the new patch, and it should be clean now. The original xml description is split into three xml files, and these features are documented in gdb.texinfo. - tic6x-core.xml: core registers, exist on all C6x variants. - tic6x-gp.xml: general purpose reigster A16-A31, B16-B31. - tic6x-c6xp.xml: some control registers. These three xml files compose another three xml files, tic6x-{c64xp,c64x,c62x}-linux.xml. gdbserver part is slightly changed for calling init_registers_tic6x_{c63x,c64x,c64xp}_linux in tic6x_arch_setup, according to computed CPU ID. -- Yao (齐尧) --------------040602070901050201020706 Content-Type: text/x-patch; name="0005-target-description.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="0005-target-description.patch" Content-length: 27446 2011-07-25 Yao Qi gdb/doc/ * gdb.texinfo: Document C6x features. gdb/ * features/Makefile (WHICH): Add tic6x-c64xp-linux tic6x-c64x-linux and tic6x-c62x-linux. * features/tic6x-c6xp.xml: New. * features/tic6x-core.xml: New. * features/tic6x-gp.xml: New. * features/tic6x-c62x-linux.xml: New. * features/tic6x-c64x-linux.xml: New. * features/tic6x-c64xp-linux.xml: New. * features/tic6x-c64xp-linux.c: Generated. * features/tic6x-c64x-linux.c: Generated. * features/tic6x-c62x-linux.c: Generated. * regformats/tic6x-c62x-linux.dat: Generated. * regformats/tic6x-c64x-linux.dat: Generated. * regformats/tic6x-c64xp-linux.dat: Generated. --- gdb/doc/gdb.texinfo | 15 +++++ gdb/features/Makefile | 7 ++- gdb/features/tic6x-c62x-linux.c | 56 ++++++++++++++++++++ gdb/features/tic6x-c62x-linux.xml | 13 +++++ gdb/features/tic6x-c64x-linux.c | 90 ++++++++++++++++++++++++++++++++ gdb/features/tic6x-c64x-linux.xml | 14 +++++ gdb/features/tic6x-c64xp-linux.c | 95 ++++++++++++++++++++++++++++++++++ gdb/features/tic6x-c64xp-linux.xml | 15 +++++ gdb/features/tic6x-c6xp.xml | 13 +++++ gdb/features/tic6x-core.xml | 44 ++++++++++++++++ gdb/features/tic6x-gp.xml | 42 +++++++++++++++ gdb/regformats/tic6x-c62x-linux.dat | 38 +++++++++++++ gdb/regformats/tic6x-c64x-linux.dat | 70 +++++++++++++++++++++++++ gdb/regformats/tic6x-c64xp-linux.dat | 73 ++++++++++++++++++++++++++ 14 files changed, 583 insertions(+), 2 deletions(-) create mode 100644 gdb/features/tic6x-c62x-linux.c create mode 100644 gdb/features/tic6x-c62x-linux.xml create mode 100644 gdb/features/tic6x-c64x-linux.c create mode 100644 gdb/features/tic6x-c64x-linux.xml create mode 100644 gdb/features/tic6x-c64xp-linux.c create mode 100644 gdb/features/tic6x-c64xp-linux.xml create mode 100644 gdb/features/tic6x-c6xp.xml create mode 100644 gdb/features/tic6x-core.xml create mode 100644 gdb/features/tic6x-gp.xml create mode 100644 gdb/regformats/tic6x-c62x-linux.dat create mode 100644 gdb/regformats/tic6x-c64x-linux.dat create mode 100644 gdb/regformats/tic6x-c64xp-linux.dat diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index 37c81b8..f5f1f53 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -36854,6 +36854,7 @@ registers using the capitalization used in the description. * MIPS Features:: * M68K Features:: * PowerPC Features:: +* C6x Features:: @end menu @@ -37015,6 +37016,20 @@ contain registers @samp{ev0h} through @samp{ev31h}, @samp{acc}, and these to present registers @samp{ev0} through @samp{ev31} to the user. +@node C6x Features +@subsection C6x Features +@cindex target descriptions, C6x features +The @samp{org.gnu.gdb.tic6x.core} feature is required for C6x +targets. It should contain registers @samp{A0} through @samp{A15}, +registers @samp{B0} through @samp{B15}, @samp{CSR} and @samp{PC}. + +The @samp{org.gnu.gdb.tic6x.gp} feature is optional. It should +contain registers @samp{A16} through @samp{A31} and @samp{B16} +through @samp{B31}. + +The @samp{org.gnu.gdb.tic6x.c6xp} feature is optional. It should +contain registers @samp{TSR}, @samp{ILC} and @samp{RILC}. + @node Operating System Information @appendix Operating System Information @cindex operating system information diff --git a/gdb/features/Makefile b/gdb/features/Makefile index 4e8e7ee..e7e72d1 100644 --- a/gdb/features/Makefile +++ b/gdb/features/Makefile @@ -41,7 +41,8 @@ WHICH = arm-with-iwmmxt arm-with-vfpv2 arm-with-vfpv3 arm-with-neon \ rs6000/powerpc-32l rs6000/powerpc-altivec32l rs6000/powerpc-e500l \ rs6000/powerpc-64l rs6000/powerpc-altivec64l rs6000/powerpc-vsx32l \ rs6000/powerpc-vsx64l rs6000/powerpc-cell32l rs6000/powerpc-cell64l \ - s390-linux32 s390-linux64 s390x-linux64 + s390-linux32 s390-linux64 s390x-linux64 \ + tic6x-c64xp-linux tic6x-c64x-linux tic6x-c62x-linux # Record which registers should be sent to GDB by default after stop. arm-expedite = r11,sp,pc @@ -63,7 +64,9 @@ rs6000/powerpc-cell64l-expedite = r1,pc,r0,orig_r3,r4 s390-linux32-expedite = r14,r15,pswa s390-linux64-expedite = r14l,r15l,pswa s390x-linux64-expedite = r14,r15,pswa - +tic6x-c64xp-linux-expedite = A15,PC +tic6x-c64x-linux-expedite = A15,PC +tic6x-c62x-linux-expedite = A15,PC XSLTPROC = xsltproc outdir = ../regformats diff --git a/gdb/features/tic6x-c62x-linux.c b/gdb/features/tic6x-c62x-linux.c new file mode 100644 index 0000000..df82fc2 --- /dev/null +++ b/gdb/features/tic6x-c62x-linux.c @@ -0,0 +1,56 @@ +/* THIS FILE IS GENERATED. Original: tic6x-c62x-linux.xml */ + +#include "defs.h" +#include "osabi.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_tic6x_c62x_linux; +static void +initialize_tdesc_tic6x_c62x_linux (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("tic6x")); + + set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.core"); + tdesc_create_reg (feature, "A0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B0", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B1", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B2", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B3", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B4", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B5", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B6", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B7", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B8", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B9", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B10", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B11", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B12", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B13", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B14", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B15", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "CSR", 32, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "PC", 33, 1, NULL, 32, "code_ptr"); + + tdesc_tic6x_c62x_linux = result; +} diff --git a/gdb/features/tic6x-c62x-linux.xml b/gdb/features/tic6x-c62x-linux.xml new file mode 100644 index 0000000..0319438 --- /dev/null +++ b/gdb/features/tic6x-c62x-linux.xml @@ -0,0 +1,13 @@ + + + + + + tic6x + GNU/Linux + + diff --git a/gdb/features/tic6x-c64x-linux.c b/gdb/features/tic6x-c64x-linux.c new file mode 100644 index 0000000..39f9e95 --- /dev/null +++ b/gdb/features/tic6x-c64x-linux.c @@ -0,0 +1,90 @@ +/* THIS FILE IS GENERATED. Original: tic6x-c64x-linux.xml */ + +#include "defs.h" +#include "osabi.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_tic6x_c64x_linux; +static void +initialize_tdesc_tic6x_c64x_linux (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("tic6x")); + + set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.core"); + tdesc_create_reg (feature, "A0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B0", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B1", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B2", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B3", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B4", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B5", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B6", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B7", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B8", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B9", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B10", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B11", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B12", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B13", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B14", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B15", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "CSR", 32, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "PC", 33, 1, NULL, 32, "code_ptr"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.gp"); + tdesc_create_reg (feature, "A16", 34, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A17", 35, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A18", 36, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A19", 37, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A20", 38, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A21", 39, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A22", 40, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A23", 41, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A24", 42, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A25", 43, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A26", 44, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A27", 45, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A28", 46, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A29", 47, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A30", 48, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A31", 49, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B16", 50, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B17", 51, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B18", 52, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B19", 53, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B20", 54, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B21", 55, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B22", 56, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B23", 57, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B24", 58, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B25", 59, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B26", 60, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B27", 61, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B28", 62, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B29", 63, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B30", 64, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B31", 65, 1, NULL, 32, "uint32"); + + tdesc_tic6x_c64x_linux = result; +} diff --git a/gdb/features/tic6x-c64x-linux.xml b/gdb/features/tic6x-c64x-linux.xml new file mode 100644 index 0000000..2d11bd0 --- /dev/null +++ b/gdb/features/tic6x-c64x-linux.xml @@ -0,0 +1,14 @@ + + + + + + tic6x + GNU/Linux + + + diff --git a/gdb/features/tic6x-c64xp-linux.c b/gdb/features/tic6x-c64xp-linux.c new file mode 100644 index 0000000..a959ec6 --- /dev/null +++ b/gdb/features/tic6x-c64xp-linux.c @@ -0,0 +1,95 @@ +/* THIS FILE IS GENERATED. Original: tic6x-c64xp-linux.xml */ + +#include "defs.h" +#include "osabi.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_tic6x_c64xp_linux; +static void +initialize_tdesc_tic6x_c64xp_linux (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + struct tdesc_type *field_type, *type; + + set_tdesc_architecture (result, bfd_scan_arch ("tic6x")); + + set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux")); + + feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.core"); + tdesc_create_reg (feature, "A0", 0, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A1", 1, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A2", 2, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A3", 3, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A4", 4, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A5", 5, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A6", 6, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A7", 7, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A8", 8, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A9", 9, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A10", 10, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A11", 11, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A12", 12, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A13", 13, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A14", 14, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A15", 15, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B0", 16, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B1", 17, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B2", 18, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B3", 19, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B4", 20, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B5", 21, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B6", 22, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B7", 23, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B8", 24, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B9", 25, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B10", 26, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B11", 27, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B12", 28, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B13", 29, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B14", 30, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B15", 31, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "CSR", 32, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "PC", 33, 1, NULL, 32, "code_ptr"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.gp"); + tdesc_create_reg (feature, "A16", 34, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A17", 35, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A18", 36, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A19", 37, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A20", 38, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A21", 39, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A22", 40, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A23", 41, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A24", 42, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A25", 43, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A26", 44, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A27", 45, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A28", 46, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A29", 47, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A30", 48, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "A31", 49, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B16", 50, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B17", 51, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B18", 52, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B19", 53, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B20", 54, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B21", 55, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B22", 56, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B23", 57, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B24", 58, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B25", 59, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B26", 60, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B27", 61, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B28", 62, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B29", 63, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B30", 64, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "B31", 65, 1, NULL, 32, "uint32"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.tic6x.c6xp"); + tdesc_create_reg (feature, "TSR", 66, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "ILC", 67, 1, NULL, 32, "uint32"); + tdesc_create_reg (feature, "RILC", 68, 1, NULL, 32, "uint32"); + + tdesc_tic6x_c64xp_linux = result; +} diff --git a/gdb/features/tic6x-c64xp-linux.xml b/gdb/features/tic6x-c64xp-linux.xml new file mode 100644 index 0000000..6ff8407 --- /dev/null +++ b/gdb/features/tic6x-c64xp-linux.xml @@ -0,0 +1,15 @@ + + + + + + tic6x + GNU/Linux + + + + diff --git a/gdb/features/tic6x-c6xp.xml b/gdb/features/tic6x-c6xp.xml new file mode 100644 index 0000000..0923b1b --- /dev/null +++ b/gdb/features/tic6x-c6xp.xml @@ -0,0 +1,13 @@ + + + + + + + + + diff --git a/gdb/features/tic6x-core.xml b/gdb/features/tic6x-core.xml new file mode 100644 index 0000000..63074eb --- /dev/null +++ b/gdb/features/tic6x-core.xml @@ -0,0 +1,44 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/gdb/features/tic6x-gp.xml b/gdb/features/tic6x-gp.xml new file mode 100644 index 0000000..d1249f3 --- /dev/null +++ b/gdb/features/tic6x-gp.xml @@ -0,0 +1,42 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/gdb/regformats/tic6x-c62x-linux.dat b/gdb/regformats/tic6x-c62x-linux.dat new file mode 100644 index 0000000..3758d84 --- /dev/null +++ b/gdb/regformats/tic6x-c62x-linux.dat @@ -0,0 +1,38 @@ +# DO NOT EDIT: generated from tic6x-c62x-linux.xml +name:tic6x_c62x_linux +xmltarget:tic6x-c62x-linux.xml +expedite:A15,PC +32:A0 +32:A1 +32:A2 +32:A3 +32:A4 +32:A5 +32:A6 +32:A7 +32:A8 +32:A9 +32:A10 +32:A11 +32:A12 +32:A13 +32:A14 +32:A15 +32:B0 +32:B1 +32:B2 +32:B3 +32:B4 +32:B5 +32:B6 +32:B7 +32:B8 +32:B9 +32:B10 +32:B11 +32:B12 +32:B13 +32:B14 +32:B15 +32:CSR +32:PC diff --git a/gdb/regformats/tic6x-c64x-linux.dat b/gdb/regformats/tic6x-c64x-linux.dat new file mode 100644 index 0000000..8b1724c --- /dev/null +++ b/gdb/regformats/tic6x-c64x-linux.dat @@ -0,0 +1,70 @@ +# DO NOT EDIT: generated from tic6x-c64x-linux.xml +name:tic6x_c64x_linux +xmltarget:tic6x-c64x-linux.xml +expedite:A15,PC +32:A0 +32:A1 +32:A2 +32:A3 +32:A4 +32:A5 +32:A6 +32:A7 +32:A8 +32:A9 +32:A10 +32:A11 +32:A12 +32:A13 +32:A14 +32:A15 +32:B0 +32:B1 +32:B2 +32:B3 +32:B4 +32:B5 +32:B6 +32:B7 +32:B8 +32:B9 +32:B10 +32:B11 +32:B12 +32:B13 +32:B14 +32:B15 +32:CSR +32:PC +32:A16 +32:A17 +32:A18 +32:A19 +32:A20 +32:A21 +32:A22 +32:A23 +32:A24 +32:A25 +32:A26 +32:A27 +32:A28 +32:A29 +32:A30 +32:A31 +32:B16 +32:B17 +32:B18 +32:B19 +32:B20 +32:B21 +32:B22 +32:B23 +32:B24 +32:B25 +32:B26 +32:B27 +32:B28 +32:B29 +32:B30 +32:B31 diff --git a/gdb/regformats/tic6x-c64xp-linux.dat b/gdb/regformats/tic6x-c64xp-linux.dat new file mode 100644 index 0000000..4d12148 --- /dev/null +++ b/gdb/regformats/tic6x-c64xp-linux.dat @@ -0,0 +1,73 @@ +# DO NOT EDIT: generated from tic6x-c64xp-linux.xml +name:tic6x_c64xp_linux +xmltarget:tic6x-c64xp-linux.xml +expedite:A15,PC +32:A0 +32:A1 +32:A2 +32:A3 +32:A4 +32:A5 +32:A6 +32:A7 +32:A8 +32:A9 +32:A10 +32:A11 +32:A12 +32:A13 +32:A14 +32:A15 +32:B0 +32:B1 +32:B2 +32:B3 +32:B4 +32:B5 +32:B6 +32:B7 +32:B8 +32:B9 +32:B10 +32:B11 +32:B12 +32:B13 +32:B14 +32:B15 +32:CSR +32:PC +32:A16 +32:A17 +32:A18 +32:A19 +32:A20 +32:A21 +32:A22 +32:A23 +32:A24 +32:A25 +32:A26 +32:A27 +32:A28 +32:A29 +32:A30 +32:A31 +32:B16 +32:B17 +32:B18 +32:B19 +32:B20 +32:B21 +32:B22 +32:B23 +32:B24 +32:B25 +32:B26 +32:B27 +32:B28 +32:B29 +32:B30 +32:B31 +32:TSR +32:ILC +32:RILC -- 1.7.0.4 --------------040602070901050201020706 Content-Type: text/x-patch; name="0007-gdbserver-tic6x.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="0007-gdbserver-tic6x.patch" Content-length: 13605 2011-07-19 Andrew Jenner Yao Qi gdb/gdbserver/ * Makefile.in (clean): Remove tic6x-c64xp-linux.c, tic6x-c64x-linux.c and tic6x-c62x-linux.c. (linux-tic6x-low.o, tic6x-c62x-linux.o, tic6x-c64x-linux.o): New rules. (tic6x-c64xp-linux.o, tic6x-c62x-linux.c, tic6x-c64x-linux.c): Likewise. (tic6x-c64xp-linux.c): Likewise. * configure.srv: Add support for tic6x-*-uclinux. * linux-tic6x-low.c: New. * linux-low.c (PT_TEXT_ADDR, PT_DATA_ADDR, PT_TEXT_END_ADDR): Define. --- gdb/gdbserver/Makefile.in | 11 ++ gdb/gdbserver/configure.srv | 14 ++ gdb/gdbserver/linux-low.c | 4 + gdb/gdbserver/linux-tic6x-low.c | 339 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 368 insertions(+), 0 deletions(-) create mode 100644 gdb/gdbserver/linux-tic6x-low.c diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in index 095c706..a1e0c43 100644 --- a/gdb/gdbserver/Makefile.in +++ b/gdb/gdbserver/Makefile.in @@ -276,6 +276,7 @@ clean: rm -f powerpc-isa205-altivec32l.c powerpc-isa205-vsx32l.c powerpc-isa205-altivec64l.c rm -f powerpc-isa205-vsx64l.c rm -f s390-linux32.c s390-linux64.c s390x-linux64.c + rm -f tic6x-c64xp-linux.c tic6x-c64x-linux.c tic6x-c62x-linux.c rm -f xml-builtin.c stamp-xml rm -f i386-avx.c i386-avx-linux.c rm -f amd64-avx.c amd64-avx-linux.c @@ -428,6 +429,7 @@ linux-mips-low.o: linux-mips-low.c $(linux_low_h) $(server_h) \ linux-ppc-low.o: linux-ppc-low.c $(linux_low_h) $(server_h) linux-s390-low.o: linux-s390-low.c $(linux_low_h) $(server_h) linux-sh-low.o: linux-sh-low.c $(linux_low_h) $(server_h) +linux-tic6x-low.o: linux-tic6x-low.c $(linux_low_h) $(server_h) linux-x86-low.o: linux-x86-low.c $(linux_low_h) $(server_h) \ $(gdb_proc_service_h) $(i386_low_h) linux-xtensa-low.o: linux-xtensa-low.c xtensa-xtregs.c $(linux_low_h) $(server_h) @@ -563,6 +565,15 @@ s390-linux64.c : $(srcdir)/../regformats/s390-linux64.dat $(regdat_sh) s390x-linux64.o : s390x-linux64.c $(regdef_h) s390x-linux64.c : $(srcdir)/../regformats/s390x-linux64.dat $(regdat_sh) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/s390x-linux64.dat s390x-linux64.c +tic6x-c64xp-linux.o : tic6x-c64xp-linux.c $(regdef_h) +tic6x-c64xp-linux.c : $(srcdir)/../regformats/tic6x-c64xp-linux.dat $(regdat_sh) + $(SHELL) $(regdat_sh) $(srcdir)/../regformats/tic6x-c64xp-linux.dat tic6x-c64xp-linux.c +tic6x-c64x-linux.o : tic6x-c64x-linux.c $(regdef_h) +tic6x-c64x-linux.c : $(srcdir)/../regformats/tic6x-c64x-linux.dat $(regdat_sh) + $(SHELL) $(regdat_sh) $(srcdir)/../regformats/tic6x-c64x-linux.dat tic6x-c64x-linux.c +tic6x-c62x-linux.o : tic6x-c62x-linux.c $(regdef_h) +tic6x-c62x-linux.c : $(srcdir)/../regformats/tic6x-c62x-linux.dat $(regdat_sh) + $(SHELL) $(regdat_sh) $(srcdir)/../regformats/tic6x-c62x-linux.dat tic6x-c62x-linux.c reg-sh.o : reg-sh.c $(regdef_h) reg-sh.c : $(srcdir)/../regformats/reg-sh.dat $(regdat_sh) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-sh.dat reg-sh.c diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv index 55dd4cf..9c657e7 100644 --- a/gdb/gdbserver/configure.srv +++ b/gdb/gdbserver/configure.srv @@ -243,6 +243,20 @@ case "${target}" in spu*-*-*) srv_regobj=reg-spu.o srv_tgtobj="spu-low.o" ;; + tic6x-*-uclinux) srv_regobj="tic6x-c64xp-linux.o" + srv_regobj="${srv_regobj} tic6x-c64x-linux.o" + srv_regobj="${srv_regobj} tic6x-c62x-linux.o" + srv_xmlfiles="tic6x-c64xp-linux.xml" + srv_xmlfiles="${srv_xmlfiles} tic6x-c64x-linux.xml" + srv_xmlfiles="${srv_xmlfiles} tic6x-c62x-linux.xml" + srv_xmlfiles="${srv_xmlfiles} tic6x-core.xml" + srv_xmlfiles="${srv_xmlfiles} tic6x-gp.xml" + srv_xmlfiles="${srv_xmlfiles} tic6x-c6xp.xml" + srv_tgtobj="linux-low.o linux-tic6x-low.o" + srv_linux_regsets=yes + srv_linux_usrregs=yes + srv_linux_thread_db=yes + ;; x86_64-*-linux*) srv_regobj="$srv_amd64_linux_regobj $srv_i386_linux_regobj" srv_tgtobj="linux-low.o linux-x86-low.o i386-low.o i387-fp.o" srv_xmlfiles="$srv_i386_linux_xmlfiles $srv_amd64_linux_xmlfiles" diff --git a/gdb/gdbserver/linux-low.c b/gdb/gdbserver/linux-low.c index f3641d0..91d3af4 100644 --- a/gdb/gdbserver/linux-low.c +++ b/gdb/gdbserver/linux-low.c @@ -4347,6 +4347,10 @@ linux_stopped_data_address (void) #define PT_TEXT_ADDR 220 #define PT_TEXT_END_ADDR 224 #define PT_DATA_ADDR 228 +#elif defined(__TMS320C6X__) +#define PT_TEXT_ADDR (0x10000*4) +#define PT_DATA_ADDR (0x10004*4) +#define PT_TEXT_END_ADDR (0x10008*4) #endif /* Under uClinux, programs are loaded at non-zero offsets, which we need diff --git a/gdb/gdbserver/linux-tic6x-low.c b/gdb/gdbserver/linux-tic6x-low.c new file mode 100644 index 0000000..254a899 --- /dev/null +++ b/gdb/gdbserver/linux-tic6x-low.c @@ -0,0 +1,339 @@ +/* Target dependent code for GDB on TI C6x systems. + + Copyright (C) 2010, 2011 + Free Software Foundation, Inc. + Contributed by Andrew Jenner + Contributed by Yao Qi + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#include "server.h" +#include "linux-low.h" + +#include +#include + +#include "gdb_proc_service.h" + +#ifndef PTRACE_GET_THREAD_AREA +#define PTRACE_GET_THREAD_AREA 25 +#endif + +/* There are at most 69 registers accessible in ptrace. */ +#define TIC6X_NUM_REGS 69 + +#include + +/* Defined in auto-generated file tic6x-c64xp-linux.c. */ +void init_registers_tic6x_c64xp_linux (void); +/* Defined in auto-generated file tic6x-c64x-linux.c. */ +void init_registers_tic6x_c64x_linux (void); +/* Defined in auto-generated file tic62x-c6xp-linux.c. */ +void init_registers_tic6x_c62x_linux (void); + +union tic6x_register +{ + unsigned char buf[4]; + + int reg32; +}; + +/* Return the ptrace ``address'' of register REGNO. */ + +#if __BYTE_ORDER == __BIG_ENDIAN +static int tic6x_regmap_c64xp[] = { + /* A0 - A15 */ + 53, 52, 55, 54, 57, 56, 59, 58, + 61, 60, 63, 62, 65, 64, 67, 66, + /* B0 - B15 */ + 23, 22, 25, 24, 27, 26, 29, 28, + 31, 30, 33, 32, 35, 34, 69, 68, + /* CSR PC*/ + 5, 4, + /* A16 -A31 */ + 37, 36, 39, 38, 41, 40, 43, 42, + 45, 44, 47, 46, 49, 48, 51, 50, + /* B16 - B31 */ + 7, 6, 9, 8, 11, 10, 13, 12, + 15, 14, 17, 16, 19, 18, 21, 20, + /* TSR, ILC, RILC */ + 1, 2, 3 +}; + +static int tic6x_regmap_c64x[] = { + /* A0 - A15 */ + 51, 50, 53, 52, 55, 54, 57, 56, + 59, 58, 61, 60, 63, 62, 65, 64, + /* B0 - B15 */ + 21, 20, 23, 22, 25, 24, 27, 26, + 29, 28, 31, 30, 33, 32, 67, 66, + /* CSR PC */ + 3, 2, + /* A16 - A31 */ + 35, 34, 37, 36, 39, 38, 41, 40, + 43, 42, 45, 44, 47, 46, 49, 48, + /* B16 - B32 */ + 5, 4, 7, 6, 9, 8, 11, 10, + 13, 12, 15, 14, 17, 16, 19, 18, + -1, -1, -1 +}; + +static int tic6x_regmap_c62x[] = { + /* A0 - A15 */ + 19, 18, 21, 20, 23, 22, 25, 24, + 27, 26, 29, 28, 31, 30, 33, 32, + /* B0 - B15 */ + 5, 4, 7, 6, 9, 8, 11, 10, + 13, 12, 15, 14, 17, 16, 35, 34, + /* CSR, PC */ + 3, 2, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1 +}; + +#else +static int tic6x_regmap_c64xp[] = { + /* A0 - A15 */ + 52, 53, 54, 55, 56, 57, 58, 59, + 60, 61, 62, 63, 64, 65, 66, 67, + /* B0 - B15 */ + 22, 23, 24, 25, 26, 27, 28, 29, + 30, 31, 32, 33, 34, 35, 68, 69, + /* CSR PC*/ + 4, 5, + /* A16 - A31 */ + 36, 37, 38, 39, 40, 41, 42, 43, + 44, 45, 46, 47, 48, 49, 50, 51, + /* B16 -B31 */ + 6, 7, 8, 9, 10, 11, 12, 13, + 14, 15, 16, 17, 18, 19, 20, 31, + /* TSR, ILC, RILC */ + 0, 3, 2 +}; + +static int tic6x_regmap_c64x[] = { + /* A0 - A15 */ + 50, 51, 52, 53, 54, 55, 56, 57, + 58, 59, 60, 61, 62, 63, 64, 65, + /* B0 - B15 */ + 20, 21, 22, 23, 24, 25, 26, 27, + 28, 29, 30, 31, 32, 33, 66, 67, + /* CSR PC*/ + 2, 3, + /* A16 - A31 */ + 34, 35, 36, 37, 38, 39, 40, 41, + 42, 43, 44, 45, 46, 47, 48, 49, + /* B16 - B31 */ + 4, 5, 6, 7, 8, 9, 10, 11, + 12, 13, 14, 15, 16, 17, 18, 19, + -1, -1, -1 +}; + +static int tic6x_regmap_c62x[] = { + /* A0 - A15 */ + 18, 19, 20, 21, 22, 23, 24, 25, + 26, 27, 28, 29, 30, 31, 32, 33, + /* B0 - B15 */ + 4, 5, 6, 7, 8, 9, 10, 11, + 12, 13, 14, 15, 16, 17, 34, 35, + /* CSR PC*/ + 2, 3, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1 +}; + +#endif + +extern struct linux_target_ops the_low_target; + +static int *tic6x_regmap; +static unsigned int tic6x_breakpoint; + +static void +tic6x_arch_setup (void) +{ + register unsigned int csr asm ("B2"); + unsigned int cpuid; + + /* Determine the CPU we're running on to find the register order. */ + __asm__ ("MVC .S2 CSR,%0" : "=r" (csr) :); + cpuid = csr >> 24; + switch (cpuid) + { + case 0x00: /* C62x */ + case 0x02: /* C67x */ + tic6x_regmap = tic6x_regmap_c62x; + tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */ + init_registers_tic6x_c62x_linux (); + break; + case 0x03: /* C67x+ */ + tic6x_regmap = tic6x_regmap_c64x; + tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */ + init_registers_tic6x_c64x_linux (); + break; + case 0x0c: /* C64x */ + tic6x_regmap = tic6x_regmap_c64x; + tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */ + init_registers_tic6x_c64x_linux (); + break; + case 0x10: /* C64x+ */ + case 0x14: /* C674x */ + case 0x15: /* C66x */ + tic6x_regmap = tic6x_regmap_c64xp; + tic6x_breakpoint = 0x56454314; /* illegal opcode */ + init_registers_tic6x_c64xp_linux (); + break; + default: + error("Unknown CPU ID 0x%02x", cpuid); + } + the_low_target.regmap = tic6x_regmap; +} + +static int +tic6x_cannot_fetch_register (int regno) +{ + return (tic6x_regmap[regno] == -1); +} + +static int +tic6x_cannot_store_register (int regno) +{ + return (tic6x_regmap[regno] == -1); +} + +static CORE_ADDR +tic6x_get_pc (struct regcache *regcache) +{ + union tic6x_register pc; + + collect_register_by_name (regcache, "PC", pc.buf); + return pc.reg32; +} + +static void +tic6x_set_pc (struct regcache *regcache, CORE_ADDR pc) +{ + union tic6x_register newpc; + + newpc.reg32 = pc; + supply_register_by_name (regcache, "PC", newpc.buf); +} + +#define tic6x_breakpoint_len 4 + +static int +tic6x_breakpoint_at (CORE_ADDR where) +{ + unsigned int insn; + + (*the_target->read_memory) (where, (unsigned char *) &insn, 4); + if (insn == tic6x_breakpoint) + return 1; + + /* If necessary, recognize more trap instructions here. GDB only uses the + one. */ + return 0; +} + +/* Fetch the thread-local storage pointer for libthread_db. */ + +ps_err_e +ps_get_thread_area (const struct ps_prochandle *ph, + lwpid_t lwpid, int idx, void **base) +{ + if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0) + return PS_ERR; + + /* IDX is the bias from the thread pointer to the beginning of the + thread descriptor. It has to be subtracted due to implementation + quirks in libthread_db. */ + *base = (void *) ((char *)*base - idx); + + return PS_OK; +} + +#ifdef HAVE_PTRACE_GETREGS + +static void +tic6x_collect_register (struct regcache *regcache, int regno, + union tic6x_register *reg) +{ + union tic6x_register tmp_reg; + + collect_register (regcache, regno, &tmp_reg.reg32); + reg->reg32 = tmp_reg.reg32; +} + +static void +tic6x_supply_register (struct regcache *regcache, int regno, + const union tic6x_register *reg) +{ + int offset = 0; + + supply_register (regcache, regno, reg->buf + offset); +} + +static void +tic6x_fill_gregset (struct regcache *regcache, void *buf) +{ + union tic6x_register *regset = buf; + int i; + + for (i = 0; i < TIC6X_NUM_REGS; i++) + if (tic6x_regmap[i] != -1) + tic6x_collect_register (regcache, i, regset + tic6x_regmap[i]); +} + +static void +tic6x_store_gregset (struct regcache *regcache, const void *buf) +{ + const union tic6x_register *regset = buf; + int i; + + for (i = 0; i < TIC6X_NUM_REGS; i++) + if (tic6x_regmap[i] != -1) + tic6x_supply_register (regcache, i, regset + tic6x_regmap[i]); +} +#endif /* HAVE_PTRACE_GETREGS */ + +struct regset_info target_regsets[] = { +#ifdef HAVE_PTRACE_GETREGS + { PTRACE_GETREGS, PTRACE_SETREGS, 0, TIC6X_NUM_REGS * 4, GENERAL_REGS, + tic6x_fill_gregset, tic6x_store_gregset }, +#endif /* HAVE_PTRACE_GETREGS */ + { 0, 0, 0, -1, -1, NULL, NULL } +}; + +struct linux_target_ops the_low_target = { + tic6x_arch_setup, + TIC6X_NUM_REGS, + 0, + tic6x_cannot_fetch_register, + tic6x_cannot_store_register, + tic6x_get_pc, + tic6x_set_pc, + (const unsigned char *) &tic6x_breakpoint, + tic6x_breakpoint_len, + NULL, + 0, + tic6x_breakpoint_at, +}; -- 1.7.0.4 --------------040602070901050201020706--