Re: [PATCH v3 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

Re: [PATCH v3 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

[Aktemur, Baris]

AMD General

Hi Klaus,

This is a reply to

 https://inbox.sourceware.org/gdb-patches/87zffcn798.fsf@redhat.com/

It seems the patch is not merged to upstream master, yet.  I assume it's
simply an oversight.  Could you take a look?

I have one comment below:

> diff --git a/gdb/infrun.c b/gdb/infrun.c
> index 43eca814e29..eb34aed09e0 100644
> --- a/gdb/infrun.c
> +++ b/gdb/infrun.c
> @@ -6138,7 +6138,9 @@ handle_inferior_event (struct execution_control_state *ecs)
>       stack.  */
>    if (ecs->ws.kind () == TARGET_WAITKIND_STOPPED
>        && (ecs->ws.sig () == GDB_SIGNAL_ILL
> -       || ecs->ws.sig () == GDB_SIGNAL_SEGV
> +       || (ecs->ws.sig () == GDB_SIGNAL_SEGV
> +           && !gdbarch_imprecise_pagefault_reporting
> +             (current_inferior ()->arch ()))

In a case like AMD GPUs, the inferior contains a mixture of CPU and GPU threads.
The imprecise reporting property would depend on the kind of the thread.  Therefore,
instead of

  current_inferior ()->arch ()

I'd propose

  target_thread_architecture (ecs->event_thread->ptid)

That should still give the same behavior for Intel's case because by default a
process stratum target returns the inferior's arch.

Best,
-Baris

RE: [PATCH v3 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

[Gerlicher, Klaus]

Hi Baris,

Thanks a lot for noticing this, indeed it's an oversight.

I'll try the target_thread_architecture (ecs->event_thread->ptid) modificiation.

Thanks
Klaus


> -----Original Message-----
> From: Aktemur, Baris <TankutBaris.Aktemur@amd.com>
> Sent: Wednesday, May 13, 2026 10:20 AM
> To: Gerlicher, Klaus <klaus.gerlicher@intel.com>; gdb-
> patches@sourceware.org
> Cc: aburgess@redhat.com
> Subject: Re: [PATCH v3 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on
> user breakpoints
> 
> AMD General
> 
> Hi Klaus,
> 
> This is a reply to
> 
>  https://inbox.sourceware.org/gdb-patches/87zffcn798.fsf@redhat.com/
> 
> It seems the patch is not merged to upstream master, yet.  I assume it's
> simply an oversight.  Could you take a look?
> 
> I have one comment below:
> 
> > diff --git a/gdb/infrun.c b/gdb/infrun.c
> > index 43eca814e29..eb34aed09e0 100644
> > --- a/gdb/infrun.c
> > +++ b/gdb/infrun.c
> > @@ -6138,7 +6138,9 @@ handle_inferior_event (struct
> execution_control_state *ecs)
> >       stack.  */
> >    if (ecs->ws.kind () == TARGET_WAITKIND_STOPPED
> >        && (ecs->ws.sig () == GDB_SIGNAL_ILL
> > -       || ecs->ws.sig () == GDB_SIGNAL_SEGV
> > +       || (ecs->ws.sig () == GDB_SIGNAL_SEGV
> > +           && !gdbarch_imprecise_pagefault_reporting
> > +             (current_inferior ()->arch ()))
> 
> In a case like AMD GPUs, the inferior contains a mixture of CPU and GPU
> threads.
> The imprecise reporting property would depend on the kind of the thread.
> Therefore,
> instead of
> 
>   current_inferior ()->arch ()
> 
> I'd propose
> 
>   target_thread_architecture (ecs->event_thread->ptid)
> 
> That should still give the same behavior for Intel's case because by default a
> process stratum target returns the inferior's arch.
> 
> Best,
> -Baris
> 

Intel Deutschland GmbH
Registered Address: Dornacher Strasse 1, 85622 Feldkirchen, Germany
Tel: +49 89 991 430, www.intel.de
Managing Directors: Harry Demas, Jeffrey Schneiderman, Yin Chong Sorrell
Chairperson of the Supervisory Board: Nicole Lau
Registered Seat: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928

RE: [PATCH v3 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

[Aktemur, Baris]

AMD General

Hi Klaus,

On Tuesday, May 19, 2026 12:30 PM, Gerlicher, Klaus wrote:
> Hi Baris,
>
> Thanks a lot for noticing this, indeed it's an oversight.
>
> I'll try the target_thread_architecture (ecs->event_thread->ptid) modificiation.

Any update on this?

Regards,
-Baris

> Thanks
> Klaus
>
>
> > -----Original Message-----
> > From: Aktemur, Baris <TankutBaris.Aktemur@amd.com>
> > Sent: Wednesday, May 13, 2026 10:20 AM
> > To: Gerlicher, Klaus <klaus.gerlicher@intel.com>; gdb-
> > patches@sourceware.org
> > Cc: aburgess@redhat.com
> > Subject: Re: [PATCH v3 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on
> > user breakpoints
> >
> > AMD General
> >
> > Hi Klaus,
> >
> > This is a reply to
> >
> >  https://inbox.sourceware.org/gdb-patches/87zffcn798.fsf@redhat.com/
> >
> > It seems the patch is not merged to upstream master, yet.  I assume it's
> > simply an oversight.  Could you take a look?
> >
> > I have one comment below:
> >
> > > diff --git a/gdb/infrun.c b/gdb/infrun.c
> > > index 43eca814e29..eb34aed09e0 100644
> > > --- a/gdb/infrun.c
> > > +++ b/gdb/infrun.c
> > > @@ -6138,7 +6138,9 @@ handle_inferior_event (struct
> > execution_control_state *ecs)
> > >       stack.  */
> > >    if (ecs->ws.kind () == TARGET_WAITKIND_STOPPED
> > >        && (ecs->ws.sig () == GDB_SIGNAL_ILL
> > > -       || ecs->ws.sig () == GDB_SIGNAL_SEGV
> > > +       || (ecs->ws.sig () == GDB_SIGNAL_SEGV
> > > +           && !gdbarch_imprecise_pagefault_reporting
> > > +             (current_inferior ()->arch ()))
> >
> > In a case like AMD GPUs, the inferior contains a mixture of CPU and GPU
> > threads.
> > The imprecise reporting property would depend on the kind of the thread.
> > Therefore,
> > instead of
> >
> >   current_inferior ()->arch ()
> >
> > I'd propose
> >
> >   target_thread_architecture (ecs->event_thread->ptid)
> >
> > That should still give the same behavior for Intel's case because by default a
> > process stratum target returns the inferior's arch.
> >
> > Best,
> > -Baris
> >
>
> Intel Deutschland GmbH
> Registered Address: Dornacher Strasse 1, 85622 Feldkirchen, Germany
> Tel: +49 89 991 430, www.intel.de
> Managing Directors: Harry Demas, Jeffrey Schneiderman, Yin Chong Sorrell
> Chairperson of the Supervisory Board: Nicole Lau
> Registered Seat: Munich
> Commercial Register: Amtsgericht Muenchen HRB 186928

[PATCH v4 0/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

[Klaus Gerlicher]

From: "Gerlicher, Klaus" <klaus.gerlicher@intel.com>

Hi Baris, Andrew, all,

thanks for the feedback and approval.

I incorporated your suggestions and added target_thread_architecture() instead of 
current_inferior()->arch() to obtain the architecture for the imprecise_pagefault_reporting
check.

Changes since V3:
- Use target_thread_architecture() instead of current_inferior()->arch()
  to obtain the architecture for the imprecise_pagefault_reporting check.

Thanks
Klaus

Gerlicher, Klaus (1):
  gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

 gdb/gdbarch-gen.c         | 22 ++++++++++++++++++++++
 gdb/gdbarch-gen.h         |  7 +++++++
 gdb/gdbarch_components.py | 12 ++++++++++++
 gdb/infrun.c              |  4 +++-
 4 files changed, 44 insertions(+), 1 deletion(-)

-- 
2.34.1

Intel Deutschland GmbH

Registered Address: Dornacher Strasse 1, 85622 Feldkirchen, Germany
Tel: +49 89 991 430, www.intel.de
Managing Directors: Harry Demas, Jeffrey Schneiderman, Yin Chong Sorrell
Chairperson of the Supervisory Board: Nicole Lau
Registered Seat: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928

[PATCH v4 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

[Klaus Gerlicher]

From: "Gerlicher, Klaus" <klaus.gerlicher@intel.com>

GDB converts signals GDB_SIGNAL_ILL, GDB_SIGNAL_SEGV and GDB_SIGNAL_EMT to
GDB_SIGNAL_TRAP if a breakpoint is inserted at the fault location.  If, due
to imprecise page fault reporting, a breakpoint is at the same address as
the fault address, this signal would always be reported as GDB_SIGNAL_TRAP.

Add a new gdbarch function, imprecise_pagefault_reporting, that allows the
signal conversion from GDB_SIGNAL_SEGV to GDB_SIGNAL_TRAP to be skipped for
an architecture.  The default is false (conversion enabled), preserving
existing behavior.
---
 gdb/gdbarch-gen.c         | 22 ++++++++++++++++++++++
 gdb/gdbarch-gen.h         |  7 +++++++
 gdb/gdbarch_components.py | 12 ++++++++++++
 gdb/infrun.c              |  4 +++-
 4 files changed, 44 insertions(+), 1 deletion(-)

diff --git a/gdb/gdbarch-gen.c b/gdb/gdbarch-gen.c
index f424fa2a86e..d9bb3e7078c 100644
--- a/gdb/gdbarch-gen.c
+++ b/gdb/gdbarch-gen.c
@@ -253,6 +253,7 @@ struct gdbarch
   gdbarch_core_parse_exec_context_ftype *core_parse_exec_context = default_core_parse_exec_context;
   gdbarch_shadow_stack_push_ftype *shadow_stack_push = nullptr;
   gdbarch_get_shadow_stack_pointer_ftype *get_shadow_stack_pointer = default_get_shadow_stack_pointer;
+  gdbarch_imprecise_pagefault_reporting_ftype *imprecise_pagefault_reporting = [] () -> bool {return false;};
 };
 
 /* Create a new ``struct gdbarch'' based on information provided by
@@ -513,6 +514,7 @@ verify_gdbarch (struct gdbarch *gdbarch)
   /* Skip verify of core_parse_exec_context, invalid_p == 0.  */
   /* Skip verify of shadow_stack_push, has predicate.  */
   /* Skip verify of get_shadow_stack_pointer, invalid_p == 0.  */
+  /* Skip verify of imprecise_pagefault_reporting, invalid_p == 0.  */
   if (!log.empty ())
     internal_error (_("verify_gdbarch: the following are invalid ...%s"),
 		    log.c_str ());
@@ -1339,6 +1341,9 @@ gdbarch_dump (struct gdbarch *gdbarch, struct ui_file *file)
   gdb_printf (file,
 	      "gdbarch_dump: get_shadow_stack_pointer = <%s>\n",
 	      host_address_to_string (gdbarch->get_shadow_stack_pointer));
+  gdb_printf (file,
+	      "gdbarch_dump: imprecise_pagefault_reporting = <%s>\n",
+	      host_address_to_string (gdbarch->imprecise_pagefault_reporting));
   if (gdbarch->dump_tdep != nullptr)
     gdbarch->dump_tdep (gdbarch, file);
 }
@@ -5286,3 +5291,20 @@ set_gdbarch_get_shadow_stack_pointer (struct gdbarch *gdbarch,
 {
   gdbarch->get_shadow_stack_pointer = get_shadow_stack_pointer;
 }
+
+bool
+gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch)
+{
+  gdb_assert (gdbarch != NULL);
+  gdb_assert (gdbarch->imprecise_pagefault_reporting != NULL);
+  if (gdbarch_debug >= 2)
+    gdb_printf (gdb_stdlog, "gdbarch_imprecise_pagefault_reporting called\n");
+  return gdbarch->imprecise_pagefault_reporting ();
+}
+
+void
+set_gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch,
+					   gdbarch_imprecise_pagefault_reporting_ftype imprecise_pagefault_reporting)
+{
+  gdbarch->imprecise_pagefault_reporting = imprecise_pagefault_reporting;
+}
diff --git a/gdb/gdbarch-gen.h b/gdb/gdbarch-gen.h
index 678b308fba5..bb95df25eb6 100644
--- a/gdb/gdbarch-gen.h
+++ b/gdb/gdbarch-gen.h
@@ -1752,3 +1752,10 @@ void set_gdbarch_shadow_stack_push (struct gdbarch *gdbarch, gdbarch_shadow_stac
 using gdbarch_get_shadow_stack_pointer_ftype = std::optional<CORE_ADDR> (struct gdbarch *gdbarch, regcache *regcache, bool &shadow_stack_enabled);
 std::optional<CORE_ADDR> gdbarch_get_shadow_stack_pointer (struct gdbarch *gdbarch, regcache *regcache, bool &shadow_stack_enabled);
 void set_gdbarch_get_shadow_stack_pointer (struct gdbarch *gdbarch, gdbarch_get_shadow_stack_pointer_ftype *get_shadow_stack_pointer);
+
+/* Returns true if architecture has imprecise pagefault reporting.  This is
+   used in conversion of SIGSEGV to SIGTRAP for an architecture. */
+
+typedef bool (gdbarch_imprecise_pagefault_reporting_ftype) ();
+extern bool gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch);
+extern void set_gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch, gdbarch_imprecise_pagefault_reporting_ftype *imprecise_pagefault_reporting);
diff --git a/gdb/gdbarch_components.py b/gdb/gdbarch_components.py
index b9304d3036d..d903446435f 100644
--- a/gdb/gdbarch_components.py
+++ b/gdb/gdbarch_components.py
@@ -2781,3 +2781,15 @@ SHADOW_STACK_ENABLED to false.
     predefault="default_get_shadow_stack_pointer",
     invalid=False,
 )
+
+Function(
+    comment="""
+Returns true if architecture has imprecise pagefault reporting.  This is
+used in conversion of SIGSEGV to SIGTRAP for an architecture.
+""",
+    type="bool",
+    name="imprecise_pagefault_reporting",
+    params=[],
+    predefault="[] () -> bool {return false;}",
+    invalid=False
+)
diff --git a/gdb/infrun.c b/gdb/infrun.c
index c0767e7f764..25ed7e7523f 100644
--- a/gdb/infrun.c
+++ b/gdb/infrun.c
@@ -6331,7 +6331,9 @@ handle_inferior_event (struct execution_control_state *ecs)
      stack.  */
   if (ecs->ws.kind () == TARGET_WAITKIND_STOPPED
       && (ecs->ws.sig () == GDB_SIGNAL_ILL
-	  || ecs->ws.sig () == GDB_SIGNAL_SEGV
+	  || (ecs->ws.sig () == GDB_SIGNAL_SEGV
+	      && !gdbarch_imprecise_pagefault_reporting
+		  (target_thread_architecture (ecs->event_thread->ptid)))
 	  || ecs->ws.sig () == GDB_SIGNAL_EMT))
     {
       struct regcache *regcache = get_thread_regcache (ecs->event_thread);
-- 
2.34.1

Intel Deutschland GmbH

Registered Address: Dornacher Strasse 1, 85622 Feldkirchen, Germany
Tel: +49 89 991 430, www.intel.de
Managing Directors: Harry Demas, Jeffrey Schneiderman, Yin Chong Sorrell
Chairperson of the Supervisory Board: Nicole Lau
Registered Seat: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928

RE: [PATCH v4 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

[Aktemur, Baris]

AMD General

Hi Klaus,

On Friday, July 17, 2026 9:45 AM, Klaus Gerlicher wrote:
> GDB converts signals GDB_SIGNAL_ILL, GDB_SIGNAL_SEGV and GDB_SIGNAL_EMT to
> GDB_SIGNAL_TRAP if a breakpoint is inserted at the fault location.  If, due
> to imprecise page fault reporting, a breakpoint is at the same address as
> the fault address, this signal would always be reported as GDB_SIGNAL_TRAP.
>
> Add a new gdbarch function, imprecise_pagefault_reporting, that allows the
> signal conversion from GDB_SIGNAL_SEGV to GDB_SIGNAL_TRAP to be skipped for
> an architecture.  The default is false (conversion enabled), preserving
> existing behavior.

It seems gdbarch.py has been updated since the last time you generated gdbarch files.
Re-generating gives the diff below.  The patch LGTM with that fixed.

Reviewed-By: Tankut Baris Aktemur <TankutBaris.Aktemur@amd.com>

Thank you.
-Baris


diff --git a/gdb/gdbarch-gen.c b/gdb/gdbarch-gen.c
index d9bb3e7078c..0b815296261 100644
--- a/gdb/gdbarch-gen.c
+++ b/gdb/gdbarch-gen.c
@@ -5295,8 +5295,8 @@ set_gdbarch_get_shadow_stack_pointer (struct gdbarch *gdbarch,
 bool
 gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch)
 {
-  gdb_assert (gdbarch != NULL);
-  gdb_assert (gdbarch->imprecise_pagefault_reporting != NULL);
+  gdb_assert (gdbarch != nullptr);
+  gdb_assert (gdbarch->imprecise_pagefault_reporting != nullptr);
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_imprecise_pagefault_reporting called\n");
   return gdbarch->imprecise_pagefault_reporting ();
diff --git a/gdb/gdbarch-gen.h b/gdb/gdbarch-gen.h
index bb95df25eb6..a96692c206c 100644
--- a/gdb/gdbarch-gen.h
+++ b/gdb/gdbarch-gen.h
@@ -1756,6 +1756,6 @@ void set_gdbarch_get_shadow_stack_pointer (struct gdbarch *gdbarch, gdbarch_get_
 /* Returns true if architecture has imprecise pagefault reporting.  This is
    used in conversion of SIGSEGV to SIGTRAP for an architecture. */

-typedef bool (gdbarch_imprecise_pagefault_reporting_ftype) ();
-extern bool gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch);
-extern void set_gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch, gdbarch_imprecise_pagefault_reporting_ftype *imprecise_pagefault_reporting);
+using gdbarch_imprecise_pagefault_reporting_ftype = bool ();
+bool gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch);
+void set_gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch, gdbarch_imprecise_pagefault_reporting_ftype *imprecise_pagefault_reporting);

RE: [PATCH v4 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

[Gerlicher, Klaus]

Thank you, Baris.

 I discovered this too *after* I posted. I'll make sure it's updated once Andrew approves again.

Thanks
Klaus

> -----Original Message-----
> From: Aktemur, Baris <TankutBaris.Aktemur@amd.com>
> Sent: Friday, July 17, 2026 11:17 AM
> To: Gerlicher, Klaus <klaus.gerlicher@intel.com>; gdb-
> patches@sourceware.org
> Cc: aburgess@redhat.com
> Subject: RE: [PATCH v4 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on
> user breakpoints
> 
> AMD General
> 
> Hi Klaus,
> 
> On Friday, July 17, 2026 9:45 AM, Klaus Gerlicher wrote:
> > GDB converts signals GDB_SIGNAL_ILL, GDB_SIGNAL_SEGV and
> GDB_SIGNAL_EMT to
> > GDB_SIGNAL_TRAP if a breakpoint is inserted at the fault location.  If, due
> > to imprecise page fault reporting, a breakpoint is at the same address as
> > the fault address, this signal would always be reported as
> GDB_SIGNAL_TRAP.
> >
> > Add a new gdbarch function, imprecise_pagefault_reporting, that allows the
> > signal conversion from GDB_SIGNAL_SEGV to GDB_SIGNAL_TRAP to be
> skipped for
> > an architecture.  The default is false (conversion enabled), preserving
> > existing behavior.
> 
> It seems gdbarch.py has been updated since the last time you generated
> gdbarch files.
> Re-generating gives the diff below.  The patch LGTM with that fixed.
> 
> Reviewed-By: Tankut Baris Aktemur <TankutBaris.Aktemur@amd.com>
> 
> Thank you.
> -Baris
> 
> 
> diff --git a/gdb/gdbarch-gen.c b/gdb/gdbarch-gen.c
> index d9bb3e7078c..0b815296261 100644
> --- a/gdb/gdbarch-gen.c
> +++ b/gdb/gdbarch-gen.c
> @@ -5295,8 +5295,8 @@ set_gdbarch_get_shadow_stack_pointer (struct
> gdbarch *gdbarch,
>  bool
>  gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch)
>  {
> -  gdb_assert (gdbarch != NULL);
> -  gdb_assert (gdbarch->imprecise_pagefault_reporting != NULL);
> +  gdb_assert (gdbarch != nullptr);
> +  gdb_assert (gdbarch->imprecise_pagefault_reporting != nullptr);
>    if (gdbarch_debug >= 2)
>      gdb_printf (gdb_stdlog, "gdbarch_imprecise_pagefault_reporting
> called\n");
>    return gdbarch->imprecise_pagefault_reporting ();
> diff --git a/gdb/gdbarch-gen.h b/gdb/gdbarch-gen.h
> index bb95df25eb6..a96692c206c 100644
> --- a/gdb/gdbarch-gen.h
> +++ b/gdb/gdbarch-gen.h
> @@ -1756,6 +1756,6 @@ void set_gdbarch_get_shadow_stack_pointer
> (struct gdbarch *gdbarch, gdbarch_get_
>  /* Returns true if architecture has imprecise pagefault reporting.  This is
>     used in conversion of SIGSEGV to SIGTRAP for an architecture. */
> 
> -typedef bool (gdbarch_imprecise_pagefault_reporting_ftype) ();
> -extern bool gdbarch_imprecise_pagefault_reporting (struct gdbarch
> *gdbarch);
> -extern void set_gdbarch_imprecise_pagefault_reporting (struct gdbarch
> *gdbarch, gdbarch_imprecise_pagefault_reporting_ftype
> *imprecise_pagefault_reporting);
> +using gdbarch_imprecise_pagefault_reporting_ftype = bool ();
> +bool gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch);
> +void set_gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch,
> gdbarch_imprecise_pagefault_reporting_ftype
> *imprecise_pagefault_reporting);
> 

Intel Deutschland GmbH

Registered Address: Dornacher Strasse 1, 85622 Feldkirchen, Germany
Tel: +49 89 991 430, www.intel.de
Managing Directors: Harry Demas, Jeffrey Schneiderman, Yin Chong Sorrell
Chairperson of the Supervisory Board: Nicole Lau
Registered Seat: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928

RE: [PATCH v4 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

[Aktemur, Baris]

AMD General

Hi Andrew,

Kindly pinging for a re-approval.

Regards,
-Baris

On Friday, July 17, 2026 3:25 PM, Gerlicher, Klaus wrote:
> Thank you, Baris.
>
>  I discovered this too *after* I posted. I'll make sure it's updated once Andrew
> approves again.
>
> Thanks
> Klaus
>
> > -----Original Message-----
> > From: Aktemur, Baris <TankutBaris.Aktemur@amd.com>
> > Sent: Friday, July 17, 2026 11:17 AM
> > To: Gerlicher, Klaus <klaus.gerlicher@intel.com>; gdb-
> > patches@sourceware.org
> > Cc: aburgess@redhat.com
> > Subject: RE: [PATCH v4 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on
> > user breakpoints
> >
> > AMD General
> >
> > Hi Klaus,
> >
> > On Friday, July 17, 2026 9:45 AM, Klaus Gerlicher wrote:
> > > GDB converts signals GDB_SIGNAL_ILL, GDB_SIGNAL_SEGV and
> > GDB_SIGNAL_EMT to
> > > GDB_SIGNAL_TRAP if a breakpoint is inserted at the fault location.  If, due
> > > to imprecise page fault reporting, a breakpoint is at the same address as
> > > the fault address, this signal would always be reported as
> > GDB_SIGNAL_TRAP.
> > >
> > > Add a new gdbarch function, imprecise_pagefault_reporting, that allows the
> > > signal conversion from GDB_SIGNAL_SEGV to GDB_SIGNAL_TRAP to be
> > skipped for
> > > an architecture.  The default is false (conversion enabled), preserving
> > > existing behavior.
> >
> > It seems gdbarch.py has been updated since the last time you generated
> > gdbarch files.
> > Re-generating gives the diff below.  The patch LGTM with that fixed.
> >
> > Reviewed-By: Tankut Baris Aktemur <TankutBaris.Aktemur@amd.com>
> >
> > Thank you.
> > -Baris
> >
> >
> > diff --git a/gdb/gdbarch-gen.c b/gdb/gdbarch-gen.c
> > index d9bb3e7078c..0b815296261 100644
> > --- a/gdb/gdbarch-gen.c
> > +++ b/gdb/gdbarch-gen.c
> > @@ -5295,8 +5295,8 @@ set_gdbarch_get_shadow_stack_pointer (struct
> > gdbarch *gdbarch,
> >  bool
> >  gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch)
> >  {
> > -  gdb_assert (gdbarch != NULL);
> > -  gdb_assert (gdbarch->imprecise_pagefault_reporting != NULL);
> > +  gdb_assert (gdbarch != nullptr);
> > +  gdb_assert (gdbarch->imprecise_pagefault_reporting != nullptr);
> >    if (gdbarch_debug >= 2)
> >      gdb_printf (gdb_stdlog, "gdbarch_imprecise_pagefault_reporting
> > called\n");
> >    return gdbarch->imprecise_pagefault_reporting ();
> > diff --git a/gdb/gdbarch-gen.h b/gdb/gdbarch-gen.h
> > index bb95df25eb6..a96692c206c 100644
> > --- a/gdb/gdbarch-gen.h
> > +++ b/gdb/gdbarch-gen.h
> > @@ -1756,6 +1756,6 @@ void set_gdbarch_get_shadow_stack_pointer
> > (struct gdbarch *gdbarch, gdbarch_get_
> >  /* Returns true if architecture has imprecise pagefault reporting.  This is
> >     used in conversion of SIGSEGV to SIGTRAP for an architecture. */
> >
> > -typedef bool (gdbarch_imprecise_pagefault_reporting_ftype) ();
> > -extern bool gdbarch_imprecise_pagefault_reporting (struct gdbarch
> > *gdbarch);
> > -extern void set_gdbarch_imprecise_pagefault_reporting (struct gdbarch
> > *gdbarch, gdbarch_imprecise_pagefault_reporting_ftype
> > *imprecise_pagefault_reporting);
> > +using gdbarch_imprecise_pagefault_reporting_ftype = bool ();
> > +bool gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch);
> > +void set_gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch,
> > gdbarch_imprecise_pagefault_reporting_ftype
> > *imprecise_pagefault_reporting);
> >
>
> Intel Deutschland GmbH
>
> Registered Address: Dornacher Strasse 1, 85622 Feldkirchen, Germany
> Tel: +49 89 991 430, www.intel.de
> Managing Directors: Harry Demas, Jeffrey Schneiderman, Yin Chong Sorrell
> Chairperson of the Supervisory Board: Nicole Lau
> Registered Seat: Munich
> Commercial Register: Amtsgericht Muenchen HRB 186928

RE: [PATCH v3 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

[Gerlicher, Klaus]

Hi Baris,

Yes, I posted V4 just now.

Thanks
Klaus

> -----Original Message-----
> From: Aktemur, Baris <TankutBaris.Aktemur@amd.com>
> Sent: Tuesday, July 7, 2026 8:36 AM
> To: Gerlicher, Klaus <klaus.gerlicher@intel.com>; gdb-
> patches@sourceware.org
> Cc: aburgess@redhat.com
> Subject: RE: [PATCH v3 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on
> user breakpoints
> 
> AMD General
> 
> Hi Klaus,
> 
> On Tuesday, May 19, 2026 12:30 PM, Gerlicher, Klaus wrote:
> > Hi Baris,
> >
> > Thanks a lot for noticing this, indeed it's an oversight.
> >
> > I'll try the target_thread_architecture (ecs->event_thread->ptid)
> modificiation.
> 
> Any update on this?
> 
> Regards,
> -Baris
> 
> > Thanks
> > Klaus
> >
> >
> > > -----Original Message-----
> > > From: Aktemur, Baris <TankutBaris.Aktemur@amd.com>
> > > Sent: Wednesday, May 13, 2026 10:20 AM
> > > To: Gerlicher, Klaus <klaus.gerlicher@intel.com>; gdb-
> > > patches@sourceware.org
> > > Cc: aburgess@redhat.com
> > > Subject: Re: [PATCH v3 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP
> on
> > > user breakpoints
> > >
> > > AMD General
> > >
> > > Hi Klaus,
> > >
> > > This is a reply to
> > >
> > >  https://inbox.sourceware.org/gdb-patches/87zffcn798.fsf@redhat.com/
> > >
> > > It seems the patch is not merged to upstream master, yet.  I assume it's
> > > simply an oversight.  Could you take a look?
> > >
> > > I have one comment below:
> > >
> > > > diff --git a/gdb/infrun.c b/gdb/infrun.c
> > > > index 43eca814e29..eb34aed09e0 100644
> > > > --- a/gdb/infrun.c
> > > > +++ b/gdb/infrun.c
> > > > @@ -6138,7 +6138,9 @@ handle_inferior_event (struct
> > > execution_control_state *ecs)
> > > >       stack.  */
> > > >    if (ecs->ws.kind () == TARGET_WAITKIND_STOPPED
> > > >        && (ecs->ws.sig () == GDB_SIGNAL_ILL
> > > > -       || ecs->ws.sig () == GDB_SIGNAL_SEGV
> > > > +       || (ecs->ws.sig () == GDB_SIGNAL_SEGV
> > > > +           && !gdbarch_imprecise_pagefault_reporting
> > > > +             (current_inferior ()->arch ()))
> > >
> > > In a case like AMD GPUs, the inferior contains a mixture of CPU and GPU
> > > threads.
> > > The imprecise reporting property would depend on the kind of the thread.
> > > Therefore,
> > > instead of
> > >
> > >   current_inferior ()->arch ()
> > >
> > > I'd propose
> > >
> > >   target_thread_architecture (ecs->event_thread->ptid)
> > >
> > > That should still give the same behavior for Intel's case because by default a
> > > process stratum target returns the inferior's arch.
> > >
> > > Best,
> > > -Baris
> > >
> >
> > Intel Deutschland GmbH
> > Registered Address: Dornacher Strasse 1, 85622 Feldkirchen, Germany
> > Tel: +49 89 991 430, www.intel.de
> > Managing Directors: Harry Demas, Jeffrey Schneiderman, Yin Chong Sorrell
> > Chairperson of the Supervisory Board: Nicole Lau
> > Registered Seat: Munich
> > Commercial Register: Amtsgericht Muenchen HRB 186928

[PATCH v3 0/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

[Klaus Gerlicher]

Hi Andrew,

thanks for the feedback. 

You replied: 

> But, I wonder if there's a different approach that could be used?
> 
> I assume that your out of tree architecture with these imprecise page
> faults has a new gdbarch to represent it.
> 
> You are limiting the SIGSEGV -> SIGTRAP conversion because, I assume,
> you've hit cases where a SIGSEGV occurs and then your target has run on
> and reported the stop at the address of a user breakpoint.  But all
> you're really doing is reducing the scope for errors.  It could be the
> case that the SIGSEGV is reported at the site of an internal breakpoint,
> and then you'll still have issues.
> 
> So what if, instead, you added a new gdbarch method, something like:
> 
>   bool gdbarch_has_imprecise_page_faults (struct gdbarch *gdbarch);
> 
> The default for this, and for all currently in-tree targets, would be to
> return true.  For your target this will return false.
> 
> Then in this code we would do:
> 
>   if (ecs->ws.kind () == TARGET_WAITKIND_STOPPED
>       && (ecs->ws.sig () == GDB_SIGNAL_ILL
> 	  || (ecs->ws.sig () == GDB_SIGNAL_SEGV
>               !gdbarch_has_imprecise_page_faults (gdbarch))
> 	  || ecs->ws.sig () == GDB_SIGNAL_EMT))
> 
> How does this approach sound?

I think for now this would be a viable solution and I implemented it in the V3 
patch.

However, we had a little discussion internally and we were wondering if this now
feels more like a workaround in a workaround.

It seems to me that the conversion of any of these signals should really be
only done for a specific target.  Even though the SIG_ILL and SIG_EMT
conversions  obviously have no side effects for most targets, I would think
these should be avoided.

Do you think there's a way to limit these more specifically or are we unsure
which targets actually need these? Maybe some of the users are already obsolete?

I would assume it would be difficult to limit to a specific target when we used
the remote target since we would then have to update GDB server to also support
this.

I'm of course fine if we fix it with the architecture method but maybe others
would disagree?

Thanks
Klaus

Gerlicher, Klaus (1):
  gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

 gdb/gdbarch-gen.c         | 22 ++++++++++++++++++++++
 gdb/gdbarch-gen.h         |  7 +++++++
 gdb/gdbarch_components.py | 12 ++++++++++++
 gdb/infrun.c              |  4 +++-
 4 files changed, 44 insertions(+), 1 deletion(-)

-- 
2.34.1

Intel Deutschland GmbH
Registered Address: Am Campeon 10, 85579 Neubiberg, Germany
Tel: +49 89 99 8853-0, www.intel.de
Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva
Chairperson of the Supervisory Board: Nicole Lau
Registered Office: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928

[PATCH v3 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

[Klaus Gerlicher]

From: "Gerlicher, Klaus" <klaus.gerlicher@intel.com>

GDB converts signals GDB_SIGNAL_ILL, GDB_SIGNAL_SEGV and GDB_SIGNAL_EMT to
GDB_SIGNAL_SEGV if a breakpoint is inserted at the fault location.  If, due
to imprecise page fault reporting, a breakpoint is at the same address as
the fault address, this signal would always be reported as GDB_SIGNAL_TRAP.

Add a new gdbarch function that allows the signal conversion from SIGNAL_SEGV
to SIGNAL_TRAP to be skipped for an architecture.
---
 gdb/gdbarch-gen.c         | 22 ++++++++++++++++++++++
 gdb/gdbarch-gen.h         |  7 +++++++
 gdb/gdbarch_components.py | 12 ++++++++++++
 gdb/infrun.c              |  4 +++-
 4 files changed, 44 insertions(+), 1 deletion(-)

diff --git a/gdb/gdbarch-gen.c b/gdb/gdbarch-gen.c
index d05c7a3cbdf..255f851ffa3 100644
--- a/gdb/gdbarch-gen.c
+++ b/gdb/gdbarch-gen.c
@@ -260,6 +260,7 @@ struct gdbarch
   gdbarch_get_pc_address_flags_ftype *get_pc_address_flags = default_get_pc_address_flags;
   gdbarch_read_core_file_mappings_ftype *read_core_file_mappings = default_read_core_file_mappings;
   gdbarch_use_target_description_from_corefile_notes_ftype *use_target_description_from_corefile_notes = default_use_target_description_from_corefile_notes;
+  gdbarch_imprecise_pagefault_reporting_ftype *imprecise_pagefault_reporting = [] () -> bool {return false;};
 };
 
 /* Create a new ``struct gdbarch'' based on information provided by
@@ -531,6 +532,7 @@ verify_gdbarch (struct gdbarch *gdbarch)
   /* Skip verify of get_pc_address_flags, invalid_p == 0.  */
   /* Skip verify of read_core_file_mappings, invalid_p == 0.  */
   /* Skip verify of use_target_description_from_corefile_notes, invalid_p == 0.  */
+  /* Skip verify of imprecise_pagefault_reporting, invalid_p == 0.  */
   if (!log.empty ())
     internal_error (_("verify_gdbarch: the following are invalid ...%s"),
 		    log.c_str ());
@@ -1396,6 +1398,9 @@ gdbarch_dump (struct gdbarch *gdbarch, struct ui_file *file)
   gdb_printf (file,
 	      "gdbarch_dump: use_target_description_from_corefile_notes = <%s>\n",
 	      host_address_to_string (gdbarch->use_target_description_from_corefile_notes));
+  gdb_printf (file,
+	      "gdbarch_dump: imprecise_pagefault_reporting = <%s>\n",
+	      host_address_to_string (gdbarch->imprecise_pagefault_reporting));
   if (gdbarch->dump_tdep != NULL)
     gdbarch->dump_tdep (gdbarch, file);
 }
@@ -5507,3 +5512,20 @@ set_gdbarch_use_target_description_from_corefile_notes (struct gdbarch *gdbarch,
 {
   gdbarch->use_target_description_from_corefile_notes = use_target_description_from_corefile_notes;
 }
+
+bool
+gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch)
+{
+  gdb_assert (gdbarch != NULL);
+  gdb_assert (gdbarch->imprecise_pagefault_reporting != NULL);
+  if (gdbarch_debug >= 2)
+    gdb_printf (gdb_stdlog, "gdbarch_imprecise_pagefault_reporting called\n");
+  return gdbarch->imprecise_pagefault_reporting ();
+}
+
+void
+set_gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch,
+					   gdbarch_imprecise_pagefault_reporting_ftype imprecise_pagefault_reporting)
+{
+  gdbarch->imprecise_pagefault_reporting = imprecise_pagefault_reporting;
+}
diff --git a/gdb/gdbarch-gen.h b/gdb/gdbarch-gen.h
index 9fda85f860f..e2ca6e59680 100644
--- a/gdb/gdbarch-gen.h
+++ b/gdb/gdbarch-gen.h
@@ -1778,3 +1778,10 @@ extern void set_gdbarch_read_core_file_mappings (struct gdbarch *gdbarch, gdbarc
 typedef bool (gdbarch_use_target_description_from_corefile_notes_ftype) (struct gdbarch *gdbarch, struct bfd *corefile_bfd);
 extern bool gdbarch_use_target_description_from_corefile_notes (struct gdbarch *gdbarch, struct bfd *corefile_bfd);
 extern void set_gdbarch_use_target_description_from_corefile_notes (struct gdbarch *gdbarch, gdbarch_use_target_description_from_corefile_notes_ftype *use_target_description_from_corefile_notes);
+
+/* Returns true if architecture has imprecise pagefault reporting.  This is
+   used in conversion of SIGSEGV to SIGTRAP for an architecture. */
+
+typedef bool (gdbarch_imprecise_pagefault_reporting_ftype) ();
+extern bool gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch);
+extern void set_gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch, gdbarch_imprecise_pagefault_reporting_ftype *imprecise_pagefault_reporting);
diff --git a/gdb/gdbarch_components.py b/gdb/gdbarch_components.py
index cc7c6d8677b..8f518e1052a 100644
--- a/gdb/gdbarch_components.py
+++ b/gdb/gdbarch_components.py
@@ -2815,3 +2815,15 @@ The corefile's bfd is passed through COREFILE_BFD.
     predefault="default_use_target_description_from_corefile_notes",
     invalid=False,
 )
+
+Function(
+    comment="""
+Returns true if architecture has imprecise pagefault reporting.  This is
+used in conversion of SIGSEGV to SIGTRAP for an architecture.
+""",
+    type="bool",
+    name="imprecise_pagefault_reporting",
+    params=[],
+    predefault="[] () -> bool {return false;}",
+    invalid=False
+)
diff --git a/gdb/infrun.c b/gdb/infrun.c
index 43eca814e29..eb34aed09e0 100644
--- a/gdb/infrun.c
+++ b/gdb/infrun.c
@@ -6138,7 +6138,9 @@ handle_inferior_event (struct execution_control_state *ecs)
      stack.  */
   if (ecs->ws.kind () == TARGET_WAITKIND_STOPPED
       && (ecs->ws.sig () == GDB_SIGNAL_ILL
-	  || ecs->ws.sig () == GDB_SIGNAL_SEGV
+	  || (ecs->ws.sig () == GDB_SIGNAL_SEGV
+	      && !gdbarch_imprecise_pagefault_reporting
+	        (current_inferior ()->arch ()))
 	  || ecs->ws.sig () == GDB_SIGNAL_EMT))
     {
       struct regcache *regcache = get_thread_regcache (ecs->event_thread);
-- 
2.34.1

Intel Deutschland GmbH
Registered Address: Am Campeon 10, 85579 Neubiberg, Germany
Tel: +49 89 99 8853-0, www.intel.de
Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva
Chairperson of the Supervisory Board: Nicole Lau
Registered Office: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928

Re: [PATCH v3 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

[Andrew Burgess]

Klaus Gerlicher <klaus.gerlicher@intel.com> writes:

> From: "Gerlicher, Klaus" <klaus.gerlicher@intel.com>
>
> GDB converts signals GDB_SIGNAL_ILL, GDB_SIGNAL_SEGV and GDB_SIGNAL_EMT to
> GDB_SIGNAL_SEGV if a breakpoint is inserted at the fault location.  If, due
> to imprecise page fault reporting, a breakpoint is at the same address as
> the fault address, this signal would always be reported as GDB_SIGNAL_TRAP.
>
> Add a new gdbarch function that allows the signal conversion from SIGNAL_SEGV
> to SIGNAL_TRAP to be skipped for an architecture.

LGTM.

Approved-By: Andrew Burgess <aburgess@redhat.com>

Thanks,
Andrew


> ---
>  gdb/gdbarch-gen.c         | 22 ++++++++++++++++++++++
>  gdb/gdbarch-gen.h         |  7 +++++++
>  gdb/gdbarch_components.py | 12 ++++++++++++
>  gdb/infrun.c              |  4 +++-
>  4 files changed, 44 insertions(+), 1 deletion(-)
>
> diff --git a/gdb/gdbarch-gen.c b/gdb/gdbarch-gen.c
> index d05c7a3cbdf..255f851ffa3 100644
> --- a/gdb/gdbarch-gen.c
> +++ b/gdb/gdbarch-gen.c
> @@ -260,6 +260,7 @@ struct gdbarch
>    gdbarch_get_pc_address_flags_ftype *get_pc_address_flags = default_get_pc_address_flags;
>    gdbarch_read_core_file_mappings_ftype *read_core_file_mappings = default_read_core_file_mappings;
>    gdbarch_use_target_description_from_corefile_notes_ftype *use_target_description_from_corefile_notes = default_use_target_description_from_corefile_notes;
> +  gdbarch_imprecise_pagefault_reporting_ftype *imprecise_pagefault_reporting = [] () -> bool {return false;};
>  };
>  
>  /* Create a new ``struct gdbarch'' based on information provided by
> @@ -531,6 +532,7 @@ verify_gdbarch (struct gdbarch *gdbarch)
>    /* Skip verify of get_pc_address_flags, invalid_p == 0.  */
>    /* Skip verify of read_core_file_mappings, invalid_p == 0.  */
>    /* Skip verify of use_target_description_from_corefile_notes, invalid_p == 0.  */
> +  /* Skip verify of imprecise_pagefault_reporting, invalid_p == 0.  */
>    if (!log.empty ())
>      internal_error (_("verify_gdbarch: the following are invalid ...%s"),
>  		    log.c_str ());
> @@ -1396,6 +1398,9 @@ gdbarch_dump (struct gdbarch *gdbarch, struct ui_file *file)
>    gdb_printf (file,
>  	      "gdbarch_dump: use_target_description_from_corefile_notes = <%s>\n",
>  	      host_address_to_string (gdbarch->use_target_description_from_corefile_notes));
> +  gdb_printf (file,
> +	      "gdbarch_dump: imprecise_pagefault_reporting = <%s>\n",
> +	      host_address_to_string (gdbarch->imprecise_pagefault_reporting));
>    if (gdbarch->dump_tdep != NULL)
>      gdbarch->dump_tdep (gdbarch, file);
>  }
> @@ -5507,3 +5512,20 @@ set_gdbarch_use_target_description_from_corefile_notes (struct gdbarch *gdbarch,
>  {
>    gdbarch->use_target_description_from_corefile_notes = use_target_description_from_corefile_notes;
>  }
> +
> +bool
> +gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch)
> +{
> +  gdb_assert (gdbarch != NULL);
> +  gdb_assert (gdbarch->imprecise_pagefault_reporting != NULL);
> +  if (gdbarch_debug >= 2)
> +    gdb_printf (gdb_stdlog, "gdbarch_imprecise_pagefault_reporting called\n");
> +  return gdbarch->imprecise_pagefault_reporting ();
> +}
> +
> +void
> +set_gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch,
> +					   gdbarch_imprecise_pagefault_reporting_ftype imprecise_pagefault_reporting)
> +{
> +  gdbarch->imprecise_pagefault_reporting = imprecise_pagefault_reporting;
> +}
> diff --git a/gdb/gdbarch-gen.h b/gdb/gdbarch-gen.h
> index 9fda85f860f..e2ca6e59680 100644
> --- a/gdb/gdbarch-gen.h
> +++ b/gdb/gdbarch-gen.h
> @@ -1778,3 +1778,10 @@ extern void set_gdbarch_read_core_file_mappings (struct gdbarch *gdbarch, gdbarc
>  typedef bool (gdbarch_use_target_description_from_corefile_notes_ftype) (struct gdbarch *gdbarch, struct bfd *corefile_bfd);
>  extern bool gdbarch_use_target_description_from_corefile_notes (struct gdbarch *gdbarch, struct bfd *corefile_bfd);
>  extern void set_gdbarch_use_target_description_from_corefile_notes (struct gdbarch *gdbarch, gdbarch_use_target_description_from_corefile_notes_ftype *use_target_description_from_corefile_notes);
> +
> +/* Returns true if architecture has imprecise pagefault reporting.  This is
> +   used in conversion of SIGSEGV to SIGTRAP for an architecture. */
> +
> +typedef bool (gdbarch_imprecise_pagefault_reporting_ftype) ();
> +extern bool gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch);
> +extern void set_gdbarch_imprecise_pagefault_reporting (struct gdbarch *gdbarch, gdbarch_imprecise_pagefault_reporting_ftype *imprecise_pagefault_reporting);
> diff --git a/gdb/gdbarch_components.py b/gdb/gdbarch_components.py
> index cc7c6d8677b..8f518e1052a 100644
> --- a/gdb/gdbarch_components.py
> +++ b/gdb/gdbarch_components.py
> @@ -2815,3 +2815,15 @@ The corefile's bfd is passed through COREFILE_BFD.
>      predefault="default_use_target_description_from_corefile_notes",
>      invalid=False,
>  )
> +
> +Function(
> +    comment="""
> +Returns true if architecture has imprecise pagefault reporting.  This is
> +used in conversion of SIGSEGV to SIGTRAP for an architecture.
> +""",
> +    type="bool",
> +    name="imprecise_pagefault_reporting",
> +    params=[],
> +    predefault="[] () -> bool {return false;}",
> +    invalid=False
> +)
> diff --git a/gdb/infrun.c b/gdb/infrun.c
> index 43eca814e29..eb34aed09e0 100644
> --- a/gdb/infrun.c
> +++ b/gdb/infrun.c
> @@ -6138,7 +6138,9 @@ handle_inferior_event (struct execution_control_state *ecs)
>       stack.  */
>    if (ecs->ws.kind () == TARGET_WAITKIND_STOPPED
>        && (ecs->ws.sig () == GDB_SIGNAL_ILL
> -	  || ecs->ws.sig () == GDB_SIGNAL_SEGV
> +	  || (ecs->ws.sig () == GDB_SIGNAL_SEGV
> +	      && !gdbarch_imprecise_pagefault_reporting
> +	        (current_inferior ()->arch ()))
>  	  || ecs->ws.sig () == GDB_SIGNAL_EMT))
>      {
>        struct regcache *regcache = get_thread_regcache (ecs->event_thread);
> -- 
> 2.34.1
>
> Intel Deutschland GmbH
> Registered Address: Am Campeon 10, 85579 Neubiberg, Germany
> Tel: +49 89 99 8853-0, www.intel.de
> Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva
> Chairperson of the Supervisory Board: Nicole Lau
> Registered Office: Munich
> Commercial Register: Amtsgericht Muenchen HRB 186928