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From: "Aktemur, Baris" <TankutBaris.Aktemur@amd.com>
To: "Gerlicher, Klaus" <klaus.gerlicher@intel.com>,
	"gdb-patches@sourceware.org" <gdb-patches@sourceware.org>
Cc: "aburgess@redhat.com" <aburgess@redhat.com>
Subject: RE: [PATCH v3 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints
Date: Tue, 7 Jul 2026 06:35:44 +0000	[thread overview]
Message-ID: <DM4PR12MB647002F14BD82D4CA3DD4A04F8F02@DM4PR12MB6470.namprd12.prod.outlook.com> (raw)
In-Reply-To: <DM3PPFD7E67F03687EED4D181884BA982DAE8002@DM3PPFD7E67F036.namprd11.prod.outlook.com>

AMD General

Hi Klaus,

On Tuesday, May 19, 2026 12:30 PM, Gerlicher, Klaus wrote:
> Hi Baris,
>
> Thanks a lot for noticing this, indeed it's an oversight.
>
> I'll try the target_thread_architecture (ecs->event_thread->ptid) modificiation.

Any update on this?

Regards,
-Baris

> Thanks
> Klaus
>
>
> > -----Original Message-----
> > From: Aktemur, Baris <TankutBaris.Aktemur@amd.com>
> > Sent: Wednesday, May 13, 2026 10:20 AM
> > To: Gerlicher, Klaus <klaus.gerlicher@intel.com>; gdb-
> > patches@sourceware.org
> > Cc: aburgess@redhat.com
> > Subject: Re: [PATCH v3 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on
> > user breakpoints
> >
> > AMD General
> >
> > Hi Klaus,
> >
> > This is a reply to
> >
> >  https://inbox.sourceware.org/gdb-patches/87zffcn798.fsf@redhat.com/
> >
> > It seems the patch is not merged to upstream master, yet.  I assume it's
> > simply an oversight.  Could you take a look?
> >
> > I have one comment below:
> >
> > > diff --git a/gdb/infrun.c b/gdb/infrun.c
> > > index 43eca814e29..eb34aed09e0 100644
> > > --- a/gdb/infrun.c
> > > +++ b/gdb/infrun.c
> > > @@ -6138,7 +6138,9 @@ handle_inferior_event (struct
> > execution_control_state *ecs)
> > >       stack.  */
> > >    if (ecs->ws.kind () == TARGET_WAITKIND_STOPPED
> > >        && (ecs->ws.sig () == GDB_SIGNAL_ILL
> > > -       || ecs->ws.sig () == GDB_SIGNAL_SEGV
> > > +       || (ecs->ws.sig () == GDB_SIGNAL_SEGV
> > > +           && !gdbarch_imprecise_pagefault_reporting
> > > +             (current_inferior ()->arch ()))
> >
> > In a case like AMD GPUs, the inferior contains a mixture of CPU and GPU
> > threads.
> > The imprecise reporting property would depend on the kind of the thread.
> > Therefore,
> > instead of
> >
> >   current_inferior ()->arch ()
> >
> > I'd propose
> >
> >   target_thread_architecture (ecs->event_thread->ptid)
> >
> > That should still give the same behavior for Intel's case because by default a
> > process stratum target returns the inferior's arch.
> >
> > Best,
> > -Baris
> >
>
> Intel Deutschland GmbH
> Registered Address: Dornacher Strasse 1, 85622 Feldkirchen, Germany
> Tel: +49 89 991 430, www.intel.de
> Managing Directors: Harry Demas, Jeffrey Schneiderman, Yin Chong Sorrell
> Chairperson of the Supervisory Board: Nicole Lau
> Registered Seat: Munich
> Commercial Register: Amtsgericht Muenchen HRB 186928


  reply	other threads:[~2026-07-07  6:36 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-13  8:19 Aktemur, Baris
2026-05-19 10:29 ` Gerlicher, Klaus
2026-07-07  6:35   ` Aktemur, Baris [this message]
2026-07-17  7:44     ` [PATCH v4 0/1] " Klaus Gerlicher
2026-07-17  7:44       ` [PATCH v4 1/1] " Klaus Gerlicher
2026-07-17  9:16         ` Aktemur, Baris
2026-07-17 13:25           ` Gerlicher, Klaus
2026-07-28  8:49             ` Aktemur, Baris
2026-07-17  7:46     ` [PATCH v3 " Gerlicher, Klaus
  -- strict thread matches above, loose matches on Subject: below --
2024-11-27 11:01 [PATCH v3 0/1] " Klaus Gerlicher
2024-11-27 11:01 ` [PATCH v3 1/1] " Klaus Gerlicher
2025-05-16 11:07   ` Andrew Burgess

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