RE: [PATCH v3 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on user breakpoints

["Gerlicher, Klaus" <klaus.gerlicher@intel.com>]

Hi Baris,

Thanks a lot for noticing this, indeed it's an oversight.

I'll try the target_thread_architecture (ecs->event_thread->ptid) modificiation.

Thanks
Klaus


> -----Original Message-----
> From: Aktemur, Baris <TankutBaris.Aktemur@amd.com>
> Sent: Wednesday, May 13, 2026 10:20 AM
> To: Gerlicher, Klaus <klaus.gerlicher@intel.com>; gdb-
> patches@sourceware.org
> Cc: aburgess@redhat.com
> Subject: Re: [PATCH v3 1/1] gdb: avoid conversion of SIGSEGV to SIGTRAP on
> user breakpoints
> 
> AMD General
> 
> Hi Klaus,
> 
> This is a reply to
> 
>  https://inbox.sourceware.org/gdb-patches/87zffcn798.fsf@redhat.com/
> 
> It seems the patch is not merged to upstream master, yet.  I assume it's
> simply an oversight.  Could you take a look?
> 
> I have one comment below:
> 
> > diff --git a/gdb/infrun.c b/gdb/infrun.c
> > index 43eca814e29..eb34aed09e0 100644
> > --- a/gdb/infrun.c
> > +++ b/gdb/infrun.c
> > @@ -6138,7 +6138,9 @@ handle_inferior_event (struct
> execution_control_state *ecs)
> >       stack.  */
> >    if (ecs->ws.kind () == TARGET_WAITKIND_STOPPED
> >        && (ecs->ws.sig () == GDB_SIGNAL_ILL
> > -       || ecs->ws.sig () == GDB_SIGNAL_SEGV
> > +       || (ecs->ws.sig () == GDB_SIGNAL_SEGV
> > +           && !gdbarch_imprecise_pagefault_reporting
> > +             (current_inferior ()->arch ()))
> 
> In a case like AMD GPUs, the inferior contains a mixture of CPU and GPU
> threads.
> The imprecise reporting property would depend on the kind of the thread.
> Therefore,
> instead of
> 
>   current_inferior ()->arch ()
> 
> I'd propose
> 
>   target_thread_architecture (ecs->event_thread->ptid)
> 
> That should still give the same behavior for Intel's case because by default a
> process stratum target returns the inferior's arch.
> 
> Best,
> -Baris
> 

Intel Deutschland GmbH
Registered Address: Dornacher Strasse 1, 85622 Feldkirchen, Germany
Tel: +49 89 991 430, www.intel.de
Managing Directors: Harry Demas, Jeffrey Schneiderman, Yin Chong Sorrell
Chairperson of the Supervisory Board: Nicole Lau
Registered Seat: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928