From: Pedro Alves <palves@redhat.com>
To: Omair Javaid <omair.javaid@linaro.org>,
Will Newton <will.newton@linaro.org>
Cc: "gdb-patches@sourceware.org" <gdb-patches@sourceware.org>,
Patch Tracking <patches@linaro.org>
Subject: Re: [PATCH v3 2/6] Implements support for recording thumb2 ASIMD struct ld/st insn
Date: Wed, 27 Aug 2014 10:09:00 -0000 [thread overview]
Message-ID: <53FDAE64.1070407@redhat.com> (raw)
In-Reply-To: <CANW4E-1w4iuAF22QwNRGbs6+zNM9+KtRhA6yWXk41O4sUPBmPA@mail.gmail.com>
On 08/27/2014 10:07 AM, Omair Javaid wrote:
> On 13 August 2014 19:10, Will Newton <will.newton@linaro.org> wrote:
>> On 13 August 2014 14:12, Omair Javaid <omair.javaid@linaro.org> wrote:
>>> gdb:
>>>
Same comments as previous patch on ChangeLog and $subject.
Please likewise adjust all patches in the series.
>>> +static int
>>> +thumb2_record_asimd_struct_ld_st (insn_decode_record *thumb2_insn_r)
>>> +{
>>> + struct regcache *reg_cache = thumb2_insn_r->regcache;
>>> + uint32_t l_bit, a_bit, b_bits;
>>> + uint32_t record_buf[128], record_buf_mem[128];
>>> + uint32_t reg_rn, reg_vd, address, f_esize, f_elem;
>>> + uint32_t index_r = 0, index_e = 0, bf_regs = 0, index_m = 0, loop_t = 0;
>>> + uint8_t bf_align, f_ebytes;
>>> +
>>> + l_bit = bit (thumb2_insn_r->arm_insn, 21);
>>> + a_bit = bit (thumb2_insn_r->arm_insn, 23);
>>> + b_bits = bits (thumb2_insn_r->arm_insn, 8, 11);
>>> + bf_align = bits (thumb2_insn_r->arm_insn, 4, 5);
>>
>> bf_align does not appear to be used.
>>
>>> + reg_rn = bits (thumb2_insn_r->arm_insn, 16, 19);
>>> + reg_vd = bits (thumb2_insn_r->arm_insn, 12, 15);
>>> + reg_vd = (bit (thumb2_insn_r->arm_insn, 22) << 4) | reg_vd;
>>> + f_ebytes = (1 << bits (thumb2_insn_r->arm_insn, 6, 7));
>>
>> The outer brackets are redundant.
> Ping! Kindly provide your feedback and help me approve this patch series.
This is OK with Will's comments addressed.
Thanks,
Pedro Alves
next prev parent reply other threads:[~2014-08-27 10:09 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-13 13:13 [PATCH v3 0/6] ARM process record/replay improvements Omair Javaid
2014-08-13 13:13 ` [PATCH v3 5/6] Implement support for recording vector data transfer instructions Omair Javaid
2014-08-13 14:10 ` Will Newton
2014-08-27 9:09 ` Omair Javaid
2014-08-27 10:19 ` Pedro Alves
2014-08-28 13:07 ` Omair Javaid
2014-08-13 13:13 ` [PATCH v3 3/6] Implement support for recording VFP data processing instructions Omair Javaid
2014-08-13 14:10 ` Will Newton
2014-08-27 9:10 ` Omair Javaid
2014-08-27 10:11 ` Pedro Alves
2014-08-28 11:06 ` Omair Javaid
2014-08-13 13:13 ` [PATCH v3 4/6] Implement support for recording extension register ld/st insn Omair Javaid
2014-08-13 14:10 ` Will Newton
2014-08-27 9:21 ` Omair Javaid
2014-08-27 10:17 ` Pedro Alves
2014-08-28 12:56 ` Omair Javaid
2014-09-02 14:59 ` Will Newton
2014-09-10 11:29 ` Omair Javaid
2014-09-10 11:55 ` Will Newton
2014-08-13 13:13 ` [PATCH v3 2/6] Implements support for recording thumb2 ASIMD struct " Omair Javaid
2014-08-13 14:10 ` Will Newton
2014-08-27 9:08 ` Omair Javaid
2014-08-27 10:09 ` Pedro Alves [this message]
2014-08-28 10:56 ` [PATCH v3 2/6] Implement support for recording thumb2 ASIMD struct ld/st insns Omair Javaid
2014-09-02 14:55 ` Will Newton
2014-09-10 11:16 ` Omair Javaid
2014-09-10 11:54 ` Will Newton
2014-08-13 13:13 ` [PATCH v3 6/6] Fix reverse-step and reverse-next over undebuggable solib code Omair Javaid
2014-08-27 9:09 ` Omair Javaid
2014-08-27 10:34 ` Pedro Alves
2014-08-13 13:13 ` [PATCH v3 1/6] Implements support for recording arm/thumb mode coprocessor instructions Omair Javaid
2014-08-13 14:10 ` Will Newton
2014-08-27 9:07 ` Omair Javaid
2014-08-27 10:05 ` Pedro Alves
2014-08-28 9:50 ` [PATCH] Implement " Omair Javaid
2014-09-02 14:51 ` Will Newton
2014-08-27 9:05 ` [PATCH v3 0/6] ARM process record/replay improvements Omair Javaid
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