[ltt-dev] [URCU PATCH] cmm: provide lightweight rmb/wmb on PPC

[compudj@krystal.dyndns.org (Mathieu Desnoyers)]

* Paolo Bonzini (pbonzini at redhat.com) wrote:
> On 09/20/2011 06:31 PM, Mathieu Desnoyers wrote:
>> I don't think lwsync orders non-cacheable memory operations. Therefore,
>> is it the right choice for cmm_rmb/cmm_wmb ?
>
> I think you're right. "eieio;lwsync" is good for rmb, lwsync is good for  
> wmb/smp_rmb/smp_wmb.

I'm not convinced that the "eieio; lwsync" combo would provide the
ordering we're looking for for cmm_rmb(). AFAIK, eieio orders,
separately, a) cacheable stores and b) loads and stores to non-cacheable
memory. AFAIK, lwsync orders cacheable memory ops, but not loads with
respect to previous stores. So basically, this combo lacks ordering of
non-cacheable memory accesses with respect to cachable memory accesses.

Why would lwsync be good for cmm_wmb ? Does it order non-cacheable
writes ?

I'd be tempted to stick to "sync" for both cmm_rmb() and cmm_wmb().

Now about cmm_smp_rmb(), lwsync seems like a good choice. For
cmm_smp_wmb(), lwsync would be appropriate too I think in the general
case. We could have specific compile options for older architectures
that lack lwsync support that uses eieio instead, but this would be just
an optimisation, because lwsync AFAIK falls back to "sync" on these
older archs.

It would be really good to have the double-check of a PowerPC expert on
this before we weaken any of these primitives though.

Thanks,

Mathieu

-- 
Mathieu Desnoyers
Operating System Efficiency R&D Consultant
EfficiOS Inc.
http://www.efficios.com