From: compudj@krystal.dyndns.org (Mathieu Desnoyers)
Subject: [ltt-dev] [URCU PATCH] cmm: provide lightweight rmb/wmb on PPC
Date: Tue, 20 Sep 2011 12:31:25 -0400 [thread overview]
Message-ID: <20110920163125.GA31802@Krystal> (raw)
In-Reply-To: <1316502769-576-1-git-send-email-pbonzini@redhat.com>
* Paolo Bonzini (pbonzini at redhat.com) wrote:
> lwsync orders loads with respect to other loads, and stores with respect
> to other stores. eieio instead only orders stores. Use them to
> implement rmb/wmb/smp_wmb.
> ---
> urcu/arch/ppc.h | 9 ++++++++-
> 1 files changed, 8 insertions(+), 1 deletions(-)
>
> diff --git a/urcu/arch/ppc.h b/urcu/arch/ppc.h
> index a03d688..3a6c702 100644
> --- a/urcu/arch/ppc.h
> +++ b/urcu/arch/ppc.h
> @@ -32,7 +32,14 @@ extern "C" {
> /* Include size of POWER5+ L3 cache lines: 256 bytes */
> #define CAA_CACHE_LINE_SIZE 256
>
> -#define cmm_mb() asm volatile("sync":::"memory")
> +#define cmm_mb() asm volatile("sync":::"memory")
> +#define cmm_rmb() asm volatile("lwsync":::"memory")
> +#define cmm_wmb() asm volatile("lwsync":::"memory")
I don't think lwsync orders non-cacheable memory operations. Therefore,
is it the right choice for cmm_rmb/cmm_wmb ?
It might be a good choice for cmm_smp_rmb/cmm_smp_wmb though.
> +
> +/* eieio is good for a write memory barrier, assuming we don't
> + * need to order cacheable and non-cacheable stores with respect
> + * to each other. */
> +#define cmm_smp_wmb() asm volatile("eieio":::"memory")
For this one, I wonder which of lwsync or eieio perform best ? But the
question that arises is whether lwsync is available on all PowerPC
flavors, and if not, which. We may want to have a configure/compile
option to specialize the output generated depending on the powerpc
flavor.
If eieio is slower than lwsync on recent powerpc, then slowing down new
generations for speedup of older generations seems like a global loss.
Thanks,
Mathieu
>
> #define mftbl() \
> ({ \
> --
> 1.7.6
>
>
> _______________________________________________
> ltt-dev mailing list
> ltt-dev at lists.casi.polymtl.ca
> http://lists.casi.polymtl.ca/cgi-bin/mailman/listinfo/ltt-dev
>
--
Mathieu Desnoyers
Operating System Efficiency R&D Consultant
EfficiOS Inc.
http://www.efficios.com
next prev parent reply other threads:[~2011-09-20 16:31 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-20 7:12 Paolo Bonzini
2011-09-20 16:31 ` Mathieu Desnoyers [this message]
2011-09-20 16:39 ` Paolo Bonzini
2011-09-20 16:51 ` Mathieu Desnoyers
2011-09-21 7:20 ` Paolo Bonzini
2011-09-21 23:43 ` Paul E. McKenney
2011-09-21 23:42 ` Paul E. McKenney
2011-09-22 8:42 ` [ltt-dev] [PATCH v2] cmm: provide lightweight smp_rmb/smp_wmb " Paolo Bonzini
2011-09-22 9:10 ` Mathieu Desnoyers
2011-09-22 14:49 ` Paul E. McKenney
2011-09-22 14:57 ` Mathieu Desnoyers
2011-09-22 15:26 ` Paul E. McKenney
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20110920163125.GA31802@Krystal \
--to=compudj@krystal.dyndns.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox