PATCH: Support x86 pseudo registers

PATCH: Support x86 pseudo registers

[H.J. Lu]

Hi,

This patch supports 8bit, 16bit and 32bit x86 pseudo registers. OK
to install?

Thanks.


H.J.
----
gdb/

2010-03-01  H.J. Lu  <hongjiu.lu@intel.com>

	* amd64-tdep.c (amd64_byte_names): New.
	(amd64_word_names): Likewise.
	(amd64_dword_names): Likewise.
	(amd64_pseudo_register_name): Likewise.
	(amd64_pseudo_register_read): Likewise.
	(amd64_pseudo_register_write): Likewise.
	(amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs
	and num_mmx_regs.  Call set_gdbarch_pseudo_register_read,
	set_gdbarch_pseudo_register_write and
	set_tdesc_pseudo_register_name.  Don't call
	set_gdbarch_num_pseudo_regs.  Don't set mm0_regnum.

	* i386-tdep.c (i386_num_mmx_regs): Removed.
	(i386_num_pseudo_regs): Likewise.
	(i386_byte_names): New.
	(i386_word_names): Likewise.
	(i386_byte_regnum_p): Likewise.
	(i386_word_regnum_p): Likewise.
	(i386_mmx_regnum_p): Updated.
	(i386_pseudo_register_name): Make it global.  Handle byte and
	word pseudo-registers.
	(i386_pseudo_register_read): Likewise.
	(i386_pseudo_register_write): Likewise.
	(i386_pseudo_register_type): Handle byte, word and dword
	pseudo-registers
	(i386_register_reggroup_p): Don't include pseudo
	registers, except for MXX, in any register groups.  Don't
	include pseudo byte, word, dword registers in general_reggroup.
	(i386_gdbarch_init): Set num_byte_regs, num_word_regs,
	num_dword_regs, al_regnum, ax_regnum and eax_regnum.  Put MMX
	pseudo-registers after word pseudo-registers.  Call
	set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi.

	* i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs,
	al_regnum, num_word_regs, ax_regnum, num_dword_regs and
	eax_regnum.
	(i386_byte_regnum_p): New.
	(i386_word_regnum_p): Likewise.
	(i386_dword_regnum_p): Likewise.
	(i386_pseudo_register_name): Likewise.
	(i386_pseudo_register_read): Likewise.
	(i386_pseudo_register_write): Likewise.

gdb/testsuite/

2010-03-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gdb.arch/amd64-byte.exp: New.
	* gdb.arch/amd64-dword.exp: Likewise.
	* gdb.arch/amd64-pseudo.c: Likewise.
	* gdb.arch/amd64-word.exp: Likewise.
	* gdb.arch/i386-byte.exp: Likewise.
	* gdb.arch/i386-pseudo.c: Likewise.
	* gdb.arch/i386-word.exp: Likewise.

diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index 0ec60c1..8c41a8a 100644
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -210,6 +210,107 @@ amd64_arch_reg_to_regnum (int reg)
   return amd64_arch_regmap[reg];
 }
 
+/* Register names for byte pseudo-registers.  */
+
+static const char *amd64_byte_names[] =
+{
+  "al", "bl", "cl", "dl", "sil", "dil", "bpl", "spl",
+  "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
+};
+
+/* Register names for word pseudo-registers.  */
+
+static const char *amd64_word_names[] =
+{
+  "ax", "bx", "cx", "dx", "si", "di", "bp", "sp", 
+  "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
+};
+
+/* Register names for dword pseudo-registers.  */
+
+static const char *amd64_dword_names[] =
+{
+  "eax", "ebx", "ecx", "edx", "esi", "edi", "ebp", "esp", 
+  "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
+};
+
+/* Return the name of register REGNUM.  */
+
+static const char *
+amd64_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
+{
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+  if (i386_byte_regnum_p (gdbarch, regnum))
+    return amd64_byte_names[regnum - tdep->al_regnum];
+  else if (i386_word_regnum_p (gdbarch, regnum))
+    return amd64_word_names[regnum - tdep->ax_regnum];
+  else if (i386_dword_regnum_p (gdbarch, regnum))
+    return amd64_dword_names[regnum - tdep->eax_regnum];
+  else
+    return i386_pseudo_register_name (gdbarch, regnum);
+}
+
+static void
+amd64_pseudo_register_read (struct gdbarch *gdbarch,
+			    struct regcache *regcache,
+			    int regnum, gdb_byte *buf)
+{
+  gdb_byte raw_buf[MAX_REGISTER_SIZE];
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+  if (i386_byte_regnum_p (gdbarch, regnum))
+    {
+      int gpnum = regnum - tdep->al_regnum;
+
+      /* Extract (always little endian).  */
+      regcache_raw_read (regcache, gpnum, raw_buf);
+      memcpy (buf, raw_buf, 1);
+    }
+  else if (i386_dword_regnum_p (gdbarch, regnum))
+    {
+      int gpnum = regnum - tdep->eax_regnum;
+      /* Extract (always little endian).  */
+      regcache_raw_read (regcache, gpnum, raw_buf);
+      memcpy (buf, raw_buf, 4);
+    }
+  else
+    i386_pseudo_register_read (gdbarch, regcache, regnum, buf);
+}
+
+static void
+amd64_pseudo_register_write (struct gdbarch *gdbarch,
+			     struct regcache *regcache,
+			     int regnum, const gdb_byte *buf)
+{
+  gdb_byte raw_buf[MAX_REGISTER_SIZE];
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+  if (i386_byte_regnum_p (gdbarch, regnum))
+    {
+      int gpnum = regnum - tdep->al_regnum;
+
+      /* Read ...  */
+      regcache_raw_read (regcache, gpnum, raw_buf);
+      /* ... Modify ... (always little endian).  */
+      memcpy (raw_buf, buf, 1);
+      /* ... Write.  */
+      regcache_raw_write (regcache, gpnum, raw_buf);
+    }
+  else if (i386_dword_regnum_p (gdbarch, regnum))
+    {
+      int gpnum = regnum - tdep->eax_regnum;
+
+      /* Read ...  */
+      regcache_raw_read (regcache, gpnum, raw_buf);
+      /* ... Modify ... (always little endian).  */
+      memcpy (raw_buf, buf, 4);
+      /* ... Write.  */
+      regcache_raw_write (regcache, gpnum, raw_buf);
+    }
+  else
+    i386_pseudo_register_write (gdbarch, regcache, regnum, buf);
+}
+
 \f
 
 /* Return the union class of CLASS1 and CLASS2.  See the psABI for
@@ -2127,6 +2228,19 @@ amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
   tdep->num_core_regs = AMD64_NUM_GREGS + I387_NUM_REGS;
   tdep->register_names = amd64_register_names;
 
+  tdep->num_byte_regs = 16;
+  tdep->num_word_regs = 16;
+  tdep->num_dword_regs = 16;
+  /* Avoid wiring in the MMX registers for now.  */
+  tdep->num_mmx_regs = 0;
+
+  set_gdbarch_pseudo_register_read (gdbarch,
+				    amd64_pseudo_register_read);
+  set_gdbarch_pseudo_register_write (gdbarch,
+				     amd64_pseudo_register_write);
+
+  set_tdesc_pseudo_register_name (gdbarch, amd64_pseudo_register_name);
+
   /* AMD64 has an FPU and 16 SSE registers.  */
   tdep->st0_regnum = AMD64_ST0_REGNUM;
   tdep->num_xmm_regs = 16;
@@ -2178,10 +2292,6 @@ amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
 
   set_gdbarch_skip_prologue (gdbarch, amd64_skip_prologue);
 
-  /* Avoid wiring in the MMX registers for now.  */
-  set_gdbarch_num_pseudo_regs (gdbarch, 0);
-  tdep->mm0_regnum = -1;
-
   tdep->record_regmap = amd64_record_regmap;
 
   set_gdbarch_dummy_id (gdbarch, amd64_dummy_id);
diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
index 1c188fd..208ed2c 100644
--- a/gdb/i386-tdep.c
+++ b/gdb/i386-tdep.c
@@ -81,17 +81,72 @@ static const char *i386_mmx_names[] =
   "mm4", "mm5", "mm6", "mm7"
 };
 
-static const int i386_num_mmx_regs = ARRAY_SIZE (i386_mmx_names);
+/* Register names for byte pseudo-registers.  */
+
+static const char *i386_byte_names[] =
+{
+  "al", "cl", "dl", "bl", 
+  "ah", "ch", "dh", "bh"
+};
+
+/* Register names for word pseudo-registers.  */
+
+static const char *i386_word_names[] =
+{
+  "ax", "cx", "dx", "bx",
+  "sp", "bp", "si", "di"
+};
+
+/* MMX register?  */
 
 static int
 i386_mmx_regnum_p (struct gdbarch *gdbarch, int regnum)
 {
-  int mm0_regnum = gdbarch_tdep (gdbarch)->mm0_regnum;
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+  int mm0_regnum = tdep->mm0_regnum;
 
   if (mm0_regnum < 0)
     return 0;
 
-  return (regnum >= mm0_regnum && regnum < mm0_regnum + i386_num_mmx_regs);
+  regnum -= mm0_regnum;
+  return regnum >= 0 && regnum < tdep->num_mmx_regs;
+}
+
+/* Byte register?  */
+
+int
+i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+  regnum -= tdep->al_regnum;
+  return regnum >= 0 && regnum < tdep->num_byte_regs;
+}
+
+/* Word register?  */
+
+int
+i386_word_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+  regnum -= tdep->ax_regnum;
+  return regnum >= 0 && regnum < tdep->num_word_regs;
+}
+
+/* Dword register?  */
+
+int
+i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum)
+{
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+  int eax_regnum = tdep->eax_regnum;
+
+  if (eax_regnum < 0)
+    return 0;
+
+  regnum -= eax_regnum;
+  return regnum >= 0 && regnum < tdep->num_dword_regs;
 }
 
 /* SSE register?  */
@@ -147,11 +202,18 @@ i386_fpc_regnum_p (struct gdbarch *gdbarch, int regnum)
 
 /* Return the name of register REGNUM.  */
 
-static const char *
+const char *
 i386_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
 {
-  gdb_assert (i386_mmx_regnum_p (gdbarch, regnum));
-  return i386_mmx_names[regnum - I387_MM0_REGNUM (gdbarch_tdep (gdbarch))];
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+  if (i386_mmx_regnum_p (gdbarch, regnum))
+    return i386_mmx_names[regnum - I387_MM0_REGNUM (tdep)];
+  else if (i386_byte_regnum_p (gdbarch, regnum))
+    return i386_byte_names[regnum - tdep->al_regnum];
+  else if (i386_word_regnum_p (gdbarch, regnum))
+    return i386_word_names[regnum - tdep->ax_regnum];
+
+  internal_error (__FILE__, __LINE__, _("invalid regnum"));
 }
 
 /* Convert a dbx register number REG to the appropriate register
@@ -2169,8 +2231,20 @@ i386_mmx_type (struct gdbarch *gdbarch)
 static struct type *
 i386_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
 {
-  gdb_assert (i386_mmx_regnum_p (gdbarch, regnum));
-  return i386_mmx_type (gdbarch);
+  if (i386_mmx_regnum_p (gdbarch, regnum))
+    return i386_mmx_type (gdbarch);
+  else
+    {
+      const struct builtin_type *bt = builtin_type (gdbarch);
+      if (i386_byte_regnum_p (gdbarch, regnum))
+	return bt->builtin_int8;
+      else if (i386_word_regnum_p (gdbarch, regnum))
+	return bt->builtin_int16;
+      else if (i386_dword_regnum_p (gdbarch, regnum))
+	return bt->builtin_int32;
+    }
+
+  internal_error (__FILE__, __LINE__, _("invalid regnum"));
 }
 
 /* Map a cooked register onto a raw register or memory.  For the i386,
@@ -2192,41 +2266,104 @@ i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum)
   return (I387_ST0_REGNUM (tdep) + fpreg);
 }
 
-static void
+void
 i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
 			   int regnum, gdb_byte *buf)
 {
+  gdb_byte raw_buf[MAX_REGISTER_SIZE];
+
   if (i386_mmx_regnum_p (gdbarch, regnum))
     {
-      gdb_byte mmx_buf[MAX_REGISTER_SIZE];
       int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
 
       /* Extract (always little endian).  */
-      regcache_raw_read (regcache, fpnum, mmx_buf);
-      memcpy (buf, mmx_buf, register_size (gdbarch, regnum));
+      regcache_raw_read (regcache, fpnum, raw_buf);
+      memcpy (buf, raw_buf, register_size (gdbarch, regnum));
     }
   else
-    regcache_raw_read (regcache, regnum, buf);
+    {
+      struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+      if (i386_word_regnum_p (gdbarch, regnum))
+	{
+	  int gpnum = regnum - tdep->ax_regnum;
+
+	  /* Extract (always little endian).  */
+	  regcache_raw_read (regcache, gpnum, raw_buf);
+	  memcpy (buf, raw_buf, 2);
+	}
+      else if (i386_byte_regnum_p (gdbarch, regnum))
+	{
+	  /* Check byte pseudo registers last since this function will
+	     be called from amd64_pseudo_register_read, which handles
+	     byte pseudo registers differently.  */
+	  int gpnum = regnum - tdep->al_regnum;
+
+	  /* Extract (always little endian).  We read both lower and
+	     upper registers.  */
+	  regcache_raw_read (regcache, gpnum % 4, raw_buf);
+	  if (gpnum >= 4)
+	    memcpy (buf, raw_buf + 1, 1);
+	  else
+	    memcpy (buf, raw_buf, 1);
+	}
+      else
+	internal_error (__FILE__, __LINE__, _("invalid regnum"));
+    }
 }
 
-static void
+void
 i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
 			    int regnum, const gdb_byte *buf)
 {
+  gdb_byte raw_buf[MAX_REGISTER_SIZE];
+
   if (i386_mmx_regnum_p (gdbarch, regnum))
     {
-      gdb_byte mmx_buf[MAX_REGISTER_SIZE];
       int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum);
 
       /* Read ...  */
-      regcache_raw_read (regcache, fpnum, mmx_buf);
+      regcache_raw_read (regcache, fpnum, raw_buf);
       /* ... Modify ... (always little endian).  */
-      memcpy (mmx_buf, buf, register_size (gdbarch, regnum));
+      memcpy (raw_buf, buf, register_size (gdbarch, regnum));
       /* ... Write.  */
-      regcache_raw_write (regcache, fpnum, mmx_buf);
+      regcache_raw_write (regcache, fpnum, raw_buf);
     }
   else
-    regcache_raw_write (regcache, regnum, buf);
+    {
+      struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+      if (i386_word_regnum_p (gdbarch, regnum))
+	{
+	  int gpnum = regnum - tdep->ax_regnum;
+
+	  /* Read ...  */
+	  regcache_raw_read (regcache, gpnum, raw_buf);
+	  /* ... Modify ... (always little endian).  */
+	  memcpy (raw_buf, buf, 2);
+	  /* ... Write.  */
+	  regcache_raw_write (regcache, gpnum, raw_buf);
+	}
+      else if (i386_byte_regnum_p (gdbarch, regnum))
+	{
+	  /* Check byte pseudo registers last since this function will
+	     be called from amd64_pseudo_register_read, which handles
+	     byte pseudo registers differently.  */
+	  int gpnum = regnum - tdep->al_regnum;
+
+	  /* Read ...  We read both lower and upper registers.  */
+	  regcache_raw_read (regcache, gpnum % 4, raw_buf);
+	  /* ... Modify ... (always little endian).  */
+	  if (gpnum >= 4)
+	    memcpy (raw_buf + 1, buf, 1);
+	  else
+	    memcpy (raw_buf, buf, 1);
+	  /* ... Write.  */
+	  regcache_raw_write (regcache, gpnum % 4, raw_buf);
+	}
+      else
+	internal_error (__FILE__, __LINE__, _("invalid regnum"));
+    }
 }
 \f
 
@@ -2663,22 +2800,46 @@ int
 i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
 			  struct reggroup *group)
 {
-  int sse_regnum_p = (i386_sse_regnum_p (gdbarch, regnum)
-		      || i386_mxcsr_regnum_p (gdbarch, regnum));
-  int fp_regnum_p = (i386_fp_regnum_p (gdbarch, regnum)
-		     || i386_fpc_regnum_p (gdbarch, regnum));
-  int mmx_regnum_p = (i386_mmx_regnum_p (gdbarch, regnum));
+  int sse_regnum_p, fp_regnum_p, mmx_regnum_p, byte_regnum_p,
+      word_regnum_p, dword_regnum_p;
 
+  /* Don't include pseudo registers, except for MMX, in any register
+     groups.  */
+  byte_regnum_p = i386_byte_regnum_p (gdbarch, regnum);
+  if (byte_regnum_p)
+    return 0;
+
+  word_regnum_p = i386_word_regnum_p (gdbarch, regnum);
+  if (word_regnum_p)
+    return 0;
+
+  dword_regnum_p = i386_dword_regnum_p (gdbarch, regnum);
+  if (dword_regnum_p)
+    return 0;
+
+  mmx_regnum_p = i386_mmx_regnum_p (gdbarch, regnum);
   if (group == i386_mmx_reggroup)
     return mmx_regnum_p;
+
+  sse_regnum_p = (i386_sse_regnum_p (gdbarch, regnum)
+		  || i386_mxcsr_regnum_p (gdbarch, regnum));
   if (group == i386_sse_reggroup)
     return sse_regnum_p;
   if (group == vector_reggroup)
-    return (mmx_regnum_p || sse_regnum_p);
+    return mmx_regnum_p || sse_regnum_p;
+
+  fp_regnum_p = (i386_fp_regnum_p (gdbarch, regnum)
+		 || i386_fpc_regnum_p (gdbarch, regnum));
   if (group == float_reggroup)
     return fp_regnum_p;
+
   if (group == general_reggroup)
-    return (!fp_regnum_p && !mmx_regnum_p && !sse_regnum_p);
+    return (!fp_regnum_p
+	    && !mmx_regnum_p
+	    && !sse_regnum_p
+	    && !byte_regnum_p
+	    && !word_regnum_p
+	    && !dword_regnum_p);
 
   return default_register_reggroup_p (gdbarch, regnum, group);
 }
@@ -5527,6 +5688,7 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   struct gdbarch *gdbarch;
   struct tdesc_arch_data *tdesc_data;
   const struct target_desc *tdesc;
+  int mm0_regnum;
 
   /* If there is already a candidate, use it.  */
   arches = gdbarch_list_lookup_by_info (arches, &info);
@@ -5563,11 +5725,6 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 
   tdep->st0_regnum = I386_ST0_REGNUM;
 
-  /* The MMX registers are implemented as pseudo-registers.  Put off
-     calculating the register number for %mm0 until we know the number
-     of raw registers.  */
-  tdep->mm0_regnum = 0;
-
   /* I386_NUM_XREGS includes %mxcsr, so substract one.  */
   tdep->num_xmm_regs = I386_NUM_XREGS - 1;
 
@@ -5690,8 +5847,7 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 
   frame_base_set_default (gdbarch, &i386_frame_base);
 
-  /* Wire in the MMX registers.  */
-  set_gdbarch_num_pseudo_regs (gdbarch, i386_num_mmx_regs);
+  /* Pseudo registers may be changed by amd64_init_abi.  */
   set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read);
   set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write);
 
@@ -5711,12 +5867,24 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   tdep->num_core_regs = I386_NUM_GREGS + I387_NUM_REGS;
   tdep->register_names = i386_register_names;
 
+  tdep->num_byte_regs = 8;
+  tdep->num_word_regs = 8;
+  tdep->num_dword_regs = 0;
+  tdep->num_mmx_regs = 8;
+
   tdesc_data = tdesc_data_alloc ();
 
   /* Hook in ABI-specific overrides, if they have been registered.  */
   info.tdep_info = (void *) tdesc_data;
   gdbarch_init_osabi (info, gdbarch);
 
+  /* Wire in pseudo registers.  Number of pseudo registers may be
+     changed.  */
+  set_gdbarch_num_pseudo_regs (gdbarch, (tdep->num_byte_regs
+					 + tdep->num_word_regs
+					 + tdep->num_dword_regs
+					 + tdep->num_mmx_regs));
+
   /* Target description may be changed.  */
   tdesc = tdep->tdesc;
 
@@ -5733,6 +5901,28 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   /* Override gdbarch_register_reggroup_p set in tdesc_use_registers.  */
   set_gdbarch_register_reggroup_p (gdbarch, tdep->register_reggroup_p);
 
+  /* Make %al the first pseudo-register.  */
+  tdep->al_regnum = gdbarch_num_regs (gdbarch);
+  tdep->ax_regnum = tdep->al_regnum + tdep->num_byte_regs;
+
+  mm0_regnum = tdep->ax_regnum + tdep->num_word_regs;
+  if (tdep->num_dword_regs)
+    {
+      /* Support dword pseudo-registesr if it hasn't been disabled,  */
+      tdep->eax_regnum = mm0_regnum;
+      mm0_regnum = tdep->eax_regnum + tdep->num_dword_regs;
+    }
+  else
+    tdep->eax_regnum = -1;
+
+  if (tdep->num_mmx_regs != 0)
+    {
+      /* Support MMX pseudo-registesr if MMX hasn't been disabled,  */
+      tdep->mm0_regnum = mm0_regnum;
+    }
+  else
+    tdep->mm0_regnum = -1;
+
   /* Hook in the legacy prologue-based unwinders last (fallback).  */
   frame_unwind_append_unwinder (gdbarch, &i386_sigtramp_frame_unwind);
   frame_unwind_append_unwinder (gdbarch, &i386_frame_unwind);
@@ -5744,11 +5934,6 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
     set_gdbarch_regset_from_core_section (gdbarch,
 					  i386_regset_from_core_section);
 
-  /* Unless support for MMX has been disabled, make %mm0 the first
-     pseudo-register.  */
-  if (tdep->mm0_regnum == 0)
-    tdep->mm0_regnum = gdbarch_num_regs (gdbarch);
-
   set_gdbarch_skip_permanent_breakpoint (gdbarch,
 					 i386_skip_permanent_breakpoint);
 
diff --git a/gdb/i386-tdep.h b/gdb/i386-tdep.h
index a64e5c3..72c634e 100644
--- a/gdb/i386-tdep.h
+++ b/gdb/i386-tdep.h
@@ -114,10 +114,32 @@ struct gdbarch_tdep
      absence of an FPU.  */
   int st0_regnum;
 
+  /* Number of MMX registers.  */
+  int num_mmx_regs;
+
   /* Register number for %mm0.  Set this to -1 to indicate the absence
      of MMX support.  */
   int mm0_regnum;
 
+  /* Number of byte registers.  */
+  int num_byte_regs;
+
+  /* Register pseudo number for %al.  */
+  int al_regnum;
+
+  /* Number of pseudo word registers.  */
+  int num_word_regs;
+
+  /* Register number for %ax.  */
+  int ax_regnum;
+
+  /* Number of pseudo dword registers.  */
+  int num_dword_regs;
+
+  /* Register number for %eax.  Set this to -1 to indicate the absence
+     of pseudo dword register support.  */
+  int eax_regnum;
+
   /* Number of core registers.  */
   int num_core_regs;
 
@@ -250,6 +272,21 @@ enum record_i386_regnum
 /* Types for i386-specific registers.  */
 extern struct type *i387_ext_type (struct gdbarch *gdbarch);
 
+/* Checks of different pseudo-registers.  */
+extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
+extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
+
+extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
+					      int regnum);
+
+extern void i386_pseudo_register_read (struct gdbarch *gdbarch,
+				       struct regcache *regcache,
+				       int regnum, gdb_byte *buf);
+extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
+					struct regcache *regcache,
+					int regnum, const gdb_byte *buf);
+
 /* Segment selectors.  */
 #define I386_SEL_RPL	0x0003  /* Requester's Privilege Level mask.  */
 #define I386_SEL_UPL	0x0003	/* User Privilige Level. */
diff --git a/gdb/testsuite/gdb.arch/amd64-byte.exp b/gdb/testsuite/gdb.arch/amd64-byte.exp
new file mode 100644
index 0000000..9a14099
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/amd64-byte.exp
@@ -0,0 +1,121 @@
+# Copyright 2010 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Please email any bugs, comments, and/or additions to this file to:
+# bug-gdb@gnu.org
+
+# This file is part of the gdb testsuite.
+
+if $tracelevel {
+    strace $tracelevel
+}
+
+set prms_id 0
+set bug_id 0
+
+if { ![istarget x86_64-*-* ] } {
+    verbose "Skipping amd64 byte register tests."
+    return
+}
+
+set testfile "amd64-byte"
+set srcfile amd64-pseudo.c
+set binfile ${objdir}/${subdir}/${testfile}
+
+if [get_compiler_info ${binfile}] {
+    return -1
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable [list debug]] != "" } {
+    untested ${testfile}
+    return
+}
+
+gdb_exit
+gdb_start
+gdb_reinitialize_dir $srcdir/$subdir
+gdb_load ${binfile}
+
+if ![runto_main] then {
+    gdb_suppress_tests
+}
+
+set nr_regs 14
+set byte_regs(1) al
+set byte_regs(2) bl
+set byte_regs(3) cl
+set byte_regs(4) dl
+set byte_regs(5) sil
+set byte_regs(6) dil
+set byte_regs(7) r8l
+set byte_regs(8) r9l
+set byte_regs(9) r10l
+set byte_regs(10) r11l
+set byte_regs(11) r12l
+set byte_regs(12) r13l
+set byte_regs(13) r14l
+set byte_regs(14) r15l
+
+gdb_test "break [gdb_get_line_number "first breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set first breakpoint in main"
+gdb_continue_to_breakpoint "continue to first breakpoint in main"
+
+for { set r 1 } { $r <= 6  } { incr r } {
+    gdb_test "print/x \$$byte_regs($r)" \
+        ".. = 0x[format %x $r]1" \
+        "check contents of %$byte_regs($r)"
+}
+
+gdb_test "break [gdb_get_line_number "second breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set second breakpoint in main"
+gdb_continue_to_breakpoint "continue to second breakpoint in main"
+
+for { set r 7 } { $r <= $nr_regs  } { incr r } {
+    gdb_test "print/x \$$byte_regs($r)" \
+        ".. = 0x[format %x $r]1" \
+        "check contents of %$byte_regs($r)"
+}
+
+for { set r 1 } { $r <= 6  } { incr r } {
+  gdb_test "set var \$$byte_regs($r) = $r" "" "set %$byte_regs($r)"
+}
+
+gdb_test "break [gdb_get_line_number "third breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set third breakpoint in main"
+gdb_continue_to_breakpoint "continue to third breakpoint in main"
+
+for { set r 1 } { $r <= 6  } { incr r } {
+    gdb_test "print \$$byte_regs($r)" \
+        ".. = $r" \
+        "check contents of %$byte_regs($r)"
+}
+
+for { set r 7 } { $r <= $nr_regs  } { incr r } {
+  gdb_test "set var \$$byte_regs($r) = $r" "" "set %$byte_regs($r)"
+}
+
+gdb_test "break [gdb_get_line_number "forth breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set forth breakpoint in main"
+gdb_continue_to_breakpoint "continue to forth breakpoint in main"
+
+for { set r 7 } { $r <= $nr_regs  } { incr r } {
+    gdb_test "print \$$byte_regs($r)" \
+        ".. = $r" \
+        "check contents of %$byte_regs($r)"
+}
diff --git a/gdb/testsuite/gdb.arch/amd64-dword.exp b/gdb/testsuite/gdb.arch/amd64-dword.exp
new file mode 100644
index 0000000..632e46b
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/amd64-dword.exp
@@ -0,0 +1,123 @@
+# Copyright 2010 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Please email any bugs, comments, and/or additions to this file to:
+# bug-gdb@gnu.org
+
+# This file is part of the gdb testsuite.
+
+if $tracelevel {
+    strace $tracelevel
+}
+
+set prms_id 0
+set bug_id 0
+
+if { ![istarget x86_64-*-* ] } {
+    verbose "Skipping amd64 dword register tests."
+    return
+}
+
+set testfile "amd64-dword"
+set srcfile amd64-pseudo.c
+set binfile ${objdir}/${subdir}/${testfile}
+
+if [get_compiler_info ${binfile}] {
+    return -1
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable [list debug]] != "" } {
+    untested ${testfile}
+    return
+}
+
+gdb_exit
+gdb_start
+gdb_reinitialize_dir $srcdir/$subdir
+gdb_load ${binfile}
+
+if ![runto_main] then {
+    gdb_suppress_tests
+}
+
+set nr_regs 14
+set dword_regs(1) eax
+set dword_regs(2) ebx
+set dword_regs(3) ecx
+set dword_regs(4) edx
+set dword_regs(5) esi
+set dword_regs(6) edi
+set dword_regs(7) r8d
+set dword_regs(8) r9d
+set dword_regs(9) r10d
+set dword_regs(10) r11d
+set dword_regs(11) r12d
+set dword_regs(12) r13d
+set dword_regs(13) r14d
+set dword_regs(14) r15d
+
+gdb_test "break [gdb_get_line_number "first breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set first breakpoint in main"
+gdb_continue_to_breakpoint "continue to first breakpoint in main"
+
+for { set r 1 } { $r <= 6  } { incr r } {
+    set hex [format %x $r]
+    gdb_test "print/x \$$dword_regs($r)" \
+	".. = 0x${hex}4${hex}3${hex}2${hex}1" \
+        "check contents of %$dword_regs($r)"
+}
+
+gdb_test "break [gdb_get_line_number "second breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set second breakpoint in main"
+gdb_continue_to_breakpoint "continue to second breakpoint in main"
+
+for { set r 7 } { $r <= $nr_regs  } { incr r } {
+    set hex [format %x $r]
+    gdb_test "print/x \$$dword_regs($r)" \
+	".. = 0x${hex}4${hex}3${hex}2${hex}1" \
+        "check contents of %$dword_regs($r)"
+}
+
+for { set r 1 } { $r <= 6  } { incr r } {
+  gdb_test "set var \$$dword_regs($r) = $r" "" "set %$dword_regs($r)"
+}
+
+gdb_test "break [gdb_get_line_number "third breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set third breakpoint in main"
+gdb_continue_to_breakpoint "continue to third breakpoint in main"
+
+for { set r 1 } { $r <= 6  } { incr r } {
+    gdb_test "print \$$dword_regs($r)" \
+        ".. = $r" \
+        "check contents of %$dword_regs($r)"
+}
+
+for { set r 7 } { $r <= $nr_regs  } { incr r } {
+  gdb_test "set var \$$dword_regs($r) = $r" "" "set %$dword_regs($r)"
+}
+
+gdb_test "break [gdb_get_line_number "forth breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set forth breakpoint in main"
+gdb_continue_to_breakpoint "continue to forth breakpoint in main"
+
+for { set r 7 } { $r <= $nr_regs  } { incr r } {
+    gdb_test "print \$$dword_regs($r)" \
+        ".. = $r" \
+        "check contents of %$dword_regs($r)"
+}
diff --git a/gdb/testsuite/gdb.arch/amd64-pseudo.c b/gdb/testsuite/gdb.arch/amd64-pseudo.c
new file mode 100644
index 0000000..78b7899
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/amd64-pseudo.c
@@ -0,0 +1,91 @@
+/* Test program for byte registers.
+
+   Copyright 2010 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include <stdio.h>
+
+int data[] = {
+  0x14131211,
+  0x24232221,
+  0x34333231,
+  0x44434241,
+  0x54535251,
+  0x64636261,
+  0x74737271,
+  0x84838281,
+  0x94939291,
+  0xa4a3a2a1,
+  0xb4b3b2b1,
+  0xc4c3c2c1,
+  0xd4d3d2d1,
+  0xe4e3e2e1,
+};
+
+int
+main (int argc, char **argv)
+{
+  asm ("mov 0(%0), %%eax\n\t"
+       "mov 4(%0), %%ebx\n\t"
+       "mov 8(%0), %%ecx\n\t"
+       "mov 12(%0), %%edx\n\t"
+       "mov 16(%0), %%esi\n\t"
+       "mov 20(%0), %%edi\n\t"
+       : /* no output operands */
+       : "r" (data) 
+       : "eax", "ebx", "ecx", "edx", "esi", "edi");
+  asm ("nop"); /* first breakpoint here */
+
+  asm ("mov 24(%0), %%r8d\n\t"
+       "mov 28(%0), %%r9d\n\t"
+       "mov 32(%0), %%r10d\n\t"
+       "mov 36(%0), %%r11\n\t"
+       "mov 40(%0), %%r12d\n\t"
+       "mov 44(%0), %%r13d\n\t"
+       "mov 48(%0), %%r14d\n\t"
+       "mov 52(%0), %%r15d\n\t"
+       : /* no output operands */
+       : "r" (data) 
+       : "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15");
+  asm ("nop"); /* second breakpoint here */
+
+  asm ("mov %%eax, 0(%0)\n\t"
+       "mov %%ebx, 4(%0)\n\t"
+       "mov %%ecx, 8(%0)\n\t"
+       "mov %%edx, 12(%0)\n\t"
+       "mov %%esi, 16(%0)\n\t"
+       "mov %%edi, 20(%0)\n\t"
+       : /* no output operands */
+       : "r" (data) 
+       : "eax", "ebx", "ecx", "edx", "esi", "edi");
+  asm ("nop"); /* third breakpoint here */
+
+  asm ("mov %%r8d, 24(%0)\n\t"
+       "mov %%r9d, 28(%0)\n\t"
+       "mov %%r10d, 32(%0)\n\t"
+       "mov %%r11d, 36(%0)\n\t"
+       "mov %%r12d, 40(%0)\n\t"
+       "mov %%r13d, 44(%0)\n\t"
+       "mov %%r14d, 48(%0)\n\t"
+       "mov %%r15d, 52(%0)\n\t"
+       : /* no output operands */
+       : "r" (data) 
+       : "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15");
+  puts ("Bye!"); /* forth breakpoint here */
+
+  return 0;
+}
diff --git a/gdb/testsuite/gdb.arch/amd64-word.exp b/gdb/testsuite/gdb.arch/amd64-word.exp
new file mode 100644
index 0000000..98116cb
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/amd64-word.exp
@@ -0,0 +1,123 @@
+# Copyright 2010 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Please email any bugs, comments, and/or additions to this file to:
+# bug-gdb@gnu.org
+
+# This file is part of the gdb testsuite.
+
+if $tracelevel {
+    strace $tracelevel
+}
+
+set prms_id 0
+set bug_id 0
+
+if { ![istarget x86_64-*-* ] } {
+    verbose "Skipping amd64 word register tests."
+    return
+}
+
+set testfile "amd64-word"
+set srcfile amd64-pseudo.c
+set binfile ${objdir}/${subdir}/${testfile}
+
+if [get_compiler_info ${binfile}] {
+    return -1
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable [list debug]] != "" } {
+    untested ${testfile}
+    return
+}
+
+gdb_exit
+gdb_start
+gdb_reinitialize_dir $srcdir/$subdir
+gdb_load ${binfile}
+
+if ![runto_main] then {
+    gdb_suppress_tests
+}
+
+set nr_regs 14
+set word_regs(1) ax
+set word_regs(2) bx
+set word_regs(3) cx
+set word_regs(4) dx
+set word_regs(5) si
+set word_regs(6) di
+set word_regs(7) r8w
+set word_regs(8) r9w
+set word_regs(9) r10w
+set word_regs(10) r11w
+set word_regs(11) r12w
+set word_regs(12) r13w
+set word_regs(13) r14w
+set word_regs(14) r15w
+
+gdb_test "break [gdb_get_line_number "first breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set first breakpoint in main"
+gdb_continue_to_breakpoint "continue to first breakpoint in main"
+
+for { set r 1 } { $r <= 6  } { incr r } {
+    set hex [format %x $r]
+    gdb_test "print/x \$$word_regs($r)" \
+        ".. = 0x${hex}2${hex}1" \
+        "check contents of %$word_regs($r)"
+}
+
+gdb_test "break [gdb_get_line_number "second breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set second breakpoint in main"
+gdb_continue_to_breakpoint "continue to second breakpoint in main"
+
+for { set r 7 } { $r <= $nr_regs  } { incr r } {
+    set hex [format %x $r]
+    gdb_test "print/x \$$word_regs($r)" \
+        ".. = 0x${hex}2${hex}1" \
+        "check contents of %$word_regs($r)"
+}
+
+for { set r 1 } { $r <= 6  } { incr r } {
+  gdb_test "set var \$$word_regs($r) = $r" "" "set %$word_regs($r)"
+}
+
+gdb_test "break [gdb_get_line_number "third breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set third breakpoint in main"
+gdb_continue_to_breakpoint "continue to third breakpoint in main"
+
+for { set r 1 } { $r <= 6  } { incr r } {
+    gdb_test "print \$$word_regs($r)" \
+        ".. = $r" \
+        "check contents of %$word_regs($r)"
+}
+
+for { set r 7 } { $r <= $nr_regs  } { incr r } {
+  gdb_test "set var \$$word_regs($r) = $r" "" "set %$word_regs($r)"
+}
+
+gdb_test "break [gdb_get_line_number "forth breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set forth breakpoint in main"
+gdb_continue_to_breakpoint "continue to forth breakpoint in main"
+
+for { set r 7 } { $r <= $nr_regs  } { incr r } {
+    gdb_test "print \$$word_regs($r)" \
+        ".. = $r" \
+        "check contents of %$word_regs($r)"
+}
diff --git a/gdb/testsuite/gdb.arch/i386-byte.exp b/gdb/testsuite/gdb.arch/i386-byte.exp
new file mode 100644
index 0000000..865257d
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/i386-byte.exp
@@ -0,0 +1,98 @@
+# Copyright 2010 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Please email any bugs, comments, and/or additions to this file to:
+# bug-gdb@gnu.org
+
+# This file is part of the gdb testsuite.
+
+if $tracelevel {
+    strace $tracelevel
+}
+
+set prms_id 0
+set bug_id 0
+
+if { ![istarget i?86-*-*] } {
+    verbose "Skipping i386 byte register tests."
+    return
+}
+
+set testfile "i386-byte"
+set srcfile i386-pseudo.c
+set binfile ${objdir}/${subdir}/${testfile}
+
+if [get_compiler_info ${binfile}] {
+    return -1
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable [list debug]] != "" } {
+    untested ${testfile}
+    return
+}
+
+gdb_exit
+gdb_start
+gdb_reinitialize_dir $srcdir/$subdir
+gdb_load ${binfile}
+
+if ![runto_main] then {
+    gdb_suppress_tests
+}
+
+set byte_regs(1) al
+set byte_regs(2) bl
+set byte_regs(3) cl
+set byte_regs(4) dl
+set byte_regs(5) ah
+set byte_regs(6) bh
+set byte_regs(7) ch
+set byte_regs(8) dh
+
+gdb_test "break [gdb_get_line_number "first breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set first breakpoint in main"
+gdb_continue_to_breakpoint "continue to first breakpoint in main"
+
+for { set r 1 } { $r <= 4  } { incr r } {
+    gdb_test "print/x \$$byte_regs($r)" \
+        ".. = 0x[format %x $r]1" \
+        "check contents of %$byte_regs($r)"
+    set h [expr $r + 4]
+    gdb_test "print/x \$$byte_regs($h)" \
+        ".. = 0x[format %x $r]2" \
+        "check contents of %$byte_regs($h)"
+}
+
+for { set r 1 } { $r <= 4  } { incr r } {
+  gdb_test "set var \$$byte_regs($r) = $r" "" "set %$byte_regs($r)"
+  set h [expr $r + 4]
+  gdb_test "set var \$$byte_regs($h) = $h" "" "set %$byte_regs($h)"
+}
+
+gdb_test "break [gdb_get_line_number "second breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set second breakpoint in main"
+gdb_continue_to_breakpoint "continue to second breakpoint in main"
+
+for { set r 1 } { $r <= 4  } { incr r } {
+    gdb_test "print \$$byte_regs($r)" \
+        ".. = $r" \
+        "check contents of %$byte_regs($r)"
+    set h [expr $r + 4]
+    gdb_test "print \$$byte_regs($h)" \
+        ".. = $h" \
+        "check contents of %$byte_regs($h)"
+}
diff --git a/gdb/testsuite/gdb.arch/i386-pseudo.c b/gdb/testsuite/gdb.arch/i386-pseudo.c
new file mode 100644
index 0000000..84e9a3d
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/i386-pseudo.c
@@ -0,0 +1,51 @@
+/* Test program for byte registers.
+
+   Copyright 2010 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include <stdio.h>
+
+int data[] = {
+  0x14131211,
+  0x24232221,
+  0x34333231,
+  0x44434241,
+};
+
+int
+main (int argc, char **argv)
+{
+  asm ("mov 0(%0), %%eax\n\t"
+       "mov 4(%0), %%ebx\n\t"
+       "mov 8(%0), %%ecx\n\t"
+       "mov 12(%0), %%edx\n\t"
+       : /* no output operands */
+       : "r" (data) 
+       : "eax", "ebx", "ecx", "edx");
+  asm ("nop"); /* first breakpoint here */
+
+  asm ("mov %%eax, 0(%0)\n\t"
+       "mov %%ebx, 4(%0)\n\t"
+       "mov %%ecx, 8(%0)\n\t"
+       "mov %%edx, 12(%0)\n\t"
+       : /* no output operands */
+       : "r" (data) 
+       : "eax", "ebx", "ecx", "edx");
+  puts ("Bye!"); /* second breakpoint here */
+
+  return 0;
+}
diff --git a/gdb/testsuite/gdb.arch/i386-word.exp b/gdb/testsuite/gdb.arch/i386-word.exp
new file mode 100644
index 0000000..73f3b59
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/i386-word.exp
@@ -0,0 +1,84 @@
+# Copyright 2010 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Please email any bugs, comments, and/or additions to this file to:
+# bug-gdb@gnu.org
+
+# This file is part of the gdb testsuite.
+
+if $tracelevel {
+    strace $tracelevel
+}
+
+set prms_id 0
+set bug_id 0
+
+if { ![istarget i?86-*-*] } {
+    verbose "Skipping i386 word register tests."
+    return
+}
+
+set testfile "i386-word"
+set srcfile i386-pseudo.c
+set binfile ${objdir}/${subdir}/${testfile}
+
+if [get_compiler_info ${binfile}] {
+    return -1
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable [list debug]] != "" } {
+    untested ${testfile}
+    return
+}
+
+gdb_exit
+gdb_start
+gdb_reinitialize_dir $srcdir/$subdir
+gdb_load ${binfile}
+
+if ![runto_main] then {
+    gdb_suppress_tests
+}
+
+set word_regs(1) ax
+set word_regs(2) bx
+set word_regs(3) cx
+set word_regs(4) dx
+
+gdb_test "break [gdb_get_line_number "first breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set first breakpoint in main"
+gdb_continue_to_breakpoint "continue to first breakpoint in main"
+
+for { set r 1 } { $r <= 4  } { incr r } {
+    gdb_test "print/x \$$word_regs($r)" \
+        ".. = 0x[format %x $r]2[format %x $r]1" \
+        "check contents of %$word_regs($r)"
+}
+
+for { set r 1 } { $r <= 4  } { incr r } {
+  gdb_test "set var \$$word_regs($r) = $r" "" "set %$word_regs($r)"
+}
+
+gdb_test "break [gdb_get_line_number "second breakpoint here"]" \
+         "Breakpoint .* at .*${srcfile}.*" \
+         "set second breakpoint in main"
+gdb_continue_to_breakpoint "continue to second breakpoint in main"
+
+for { set r 1 } { $r <= 4  } { incr r } {
+    gdb_test "print \$$word_regs($r)" \
+        ".. = $r" \
+        "check contents of %$word_regs($r)"
+}

Re: PATCH: Support x86 pseudo registers

[Mark Kettenis]

> Date: Mon, 1 Mar 2010 09:01:52 -0800
> From: "H.J. Lu" <hongjiu.lu@intel.com>
> 
> Hi,
> 
> This patch supports 8bit, 16bit and 32bit x86 pseudo registers. OK
> to install?

ok

> gdb/
> 
> 2010-03-01  H.J. Lu  <hongjiu.lu@intel.com>
> 
> 	* amd64-tdep.c (amd64_byte_names): New.
> 	(amd64_word_names): Likewise.
> 	(amd64_dword_names): Likewise.
> 	(amd64_pseudo_register_name): Likewise.
> 	(amd64_pseudo_register_read): Likewise.
> 	(amd64_pseudo_register_write): Likewise.
> 	(amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs
> 	and num_mmx_regs.  Call set_gdbarch_pseudo_register_read,
> 	set_gdbarch_pseudo_register_write and
> 	set_tdesc_pseudo_register_name.  Don't call
> 	set_gdbarch_num_pseudo_regs.  Don't set mm0_regnum.
> 
> 	* i386-tdep.c (i386_num_mmx_regs): Removed.
> 	(i386_num_pseudo_regs): Likewise.
> 	(i386_byte_names): New.
> 	(i386_word_names): Likewise.
> 	(i386_byte_regnum_p): Likewise.
> 	(i386_word_regnum_p): Likewise.
> 	(i386_mmx_regnum_p): Updated.
> 	(i386_pseudo_register_name): Make it global.  Handle byte and
> 	word pseudo-registers.
> 	(i386_pseudo_register_read): Likewise.
> 	(i386_pseudo_register_write): Likewise.
> 	(i386_pseudo_register_type): Handle byte, word and dword
> 	pseudo-registers
> 	(i386_register_reggroup_p): Don't include pseudo
> 	registers, except for MXX, in any register groups.  Don't
> 	include pseudo byte, word, dword registers in general_reggroup.
> 	(i386_gdbarch_init): Set num_byte_regs, num_word_regs,
> 	num_dword_regs, al_regnum, ax_regnum and eax_regnum.  Put MMX
> 	pseudo-registers after word pseudo-registers.  Call
> 	set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi.
> 
> 	* i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs,
> 	al_regnum, num_word_regs, ax_regnum, num_dword_regs and
> 	eax_regnum.
> 	(i386_byte_regnum_p): New.
> 	(i386_word_regnum_p): Likewise.
> 	(i386_dword_regnum_p): Likewise.
> 	(i386_pseudo_register_name): Likewise.
> 	(i386_pseudo_register_read): Likewise.
> 	(i386_pseudo_register_write): Likewise.

Re: PATCH: Support x86 pseudo registers

[Daniel Jacobowitz]

On Mon, Mar 01, 2010 at 09:01:52AM -0800, H.J. Lu wrote:
> Hi,
> 
> This patch supports 8bit, 16bit and 32bit x86 pseudo registers. OK
> to install?

IMO, this is useful enough for a NEWS entry.

-- 
Daniel Jacobowitz
CodeSourcery

Re: PATCH: Support x86 pseudo registers

[H.J. Lu]

On Tue, Mar 2, 2010 at 5:55 AM, Daniel Jacobowitz <dan@codesourcery.com> wrote:
> On Mon, Mar 01, 2010 at 09:01:52AM -0800, H.J. Lu wrote:
>> Hi,
>>
>> This patch supports 8bit, 16bit and 32bit x86 pseudo registers. OK
>> to install?
>
> IMO, this is useful enough for a NEWS entry.
>

Like this?

diff --git a/gdb/NEWS b/gdb/NEWS
index 6cec32a..b29fa6c 100644
--- a/gdb/NEWS
+++ b/gdb/NEWS
@@ -3,6 +3,10 @@

 *** Changes since GDB 7.1

+* X86 pseudo registers
+
+  GDB now supports 8bit, 16bit and 32bit x86 pseudo registers.
+
 * Python scripting

 The GDB Python API now has access to symbols, symbol tables, and



-- 
H.J.

Re: PATCH: Support x86 pseudo registers

[Daniel Jacobowitz]

On Tue, Mar 02, 2010 at 06:08:37AM -0800, H.J. Lu wrote:
> On Tue, Mar 2, 2010 at 5:55 AM, Daniel Jacobowitz <dan@codesourcery.com> wrote:
> > On Mon, Mar 01, 2010 at 09:01:52AM -0800, H.J. Lu wrote:
> >> Hi,
> >>
> >> This patch supports 8bit, 16bit and 32bit x86 pseudo registers. OK
> >> to install?
> >
> > IMO, this is useful enough for a NEWS entry.
> >
> 
> Like this?
> 
> diff --git a/gdb/NEWS b/gdb/NEWS
> index 6cec32a..b29fa6c 100644
> --- a/gdb/NEWS
> +++ b/gdb/NEWS
> @@ -3,6 +3,10 @@
> 
>  *** Changes since GDB 7.1
> 
> +* X86 pseudo registers
> +
> +  GDB now supports 8bit, 16bit and 32bit x86 pseudo registers.
> +
>  * Python scripting
> 
>  The GDB Python API now has access to symbols, symbol tables, and
> 

That won't mean anything to users; they don't know what a pseudo
register is.  Does the architecture have a standard name for these
things?  Partial registers or something like that?

-- 
Daniel Jacobowitz
CodeSourcery

Re: PATCH: Support x86 pseudo registers

[H.J. Lu]

On Tue, Mar 2, 2010 at 7:04 AM, Daniel Jacobowitz <dan@codesourcery.com> wrote:
> On Tue, Mar 02, 2010 at 06:08:37AM -0800, H.J. Lu wrote:
>> On Tue, Mar 2, 2010 at 5:55 AM, Daniel Jacobowitz <dan@codesourcery.com> wrote:
>> > On Mon, Mar 01, 2010 at 09:01:52AM -0800, H.J. Lu wrote:
>> >> Hi,
>> >>
>> >> This patch supports 8bit, 16bit and 32bit x86 pseudo registers. OK
>> >> to install?
>> >
>> > IMO, this is useful enough for a NEWS entry.
>> >
>>
>> Like this?
>>
>> diff --git a/gdb/NEWS b/gdb/NEWS
>> index 6cec32a..b29fa6c 100644
>> --- a/gdb/NEWS
>> +++ b/gdb/NEWS
>> @@ -3,6 +3,10 @@
>>
>>  *** Changes since GDB 7.1
>>
>> +* X86 pseudo registers
>> +
>> +  GDB now supports 8bit, 16bit and 32bit x86 pseudo registers.
>> +
>>  * Python scripting
>>
>>  The GDB Python API now has access to symbols, symbol tables, and
>>
>
> That won't mean anything to users; they don't know what a pseudo
> register is.  Does the architecture have a standard name for these

SDM mentions 8bit/byte, 16bit/word and 32bit/doubleword general
purpose registers.

> things?  Partial registers or something like that?
>

"Partial registers" are too vague.  We may not access upper bits directly.


-- 
H.J.

Re: PATCH: Support x86 pseudo registers

[Eli Zaretskii]

> Date: Tue, 2 Mar 2010 10:04:46 -0500
> From: Daniel Jacobowitz <dan@codesourcery.com>
> Cc: GDB <gdb-patches@sourceware.org>, Eli Zaretskii <eliz@gnu.org>
> 
> > > IMO, this is useful enough for a NEWS entry.
> > >
> > 
> > Like this?
> > 
> > diff --git a/gdb/NEWS b/gdb/NEWS
> > index 6cec32a..b29fa6c 100644
> > --- a/gdb/NEWS
> > +++ b/gdb/NEWS
> > @@ -3,6 +3,10 @@
> > 
> >  *** Changes since GDB 7.1
> > 
> > +* X86 pseudo registers
> > +
> > +  GDB now supports 8bit, 16bit and 32bit x86 pseudo registers.
> > +
> >  * Python scripting
> > 
> >  The GDB Python API now has access to symbols, symbol tables, and
> > 
> 
> That won't mean anything to users; they don't know what a pseudo
> register is.

I agree.  We should try to explain more.

Re: PATCH: Support x86 pseudo registers

[H.J. Lu]

On Tue, Mar 2, 2010 at 9:54 AM, Eli Zaretskii <eliz@gnu.org> wrote:
>> Date: Tue, 2 Mar 2010 10:04:46 -0500
>> From: Daniel Jacobowitz <dan@codesourcery.com>
>> Cc: GDB <gdb-patches@sourceware.org>, Eli Zaretskii <eliz@gnu.org>
>>
>> > > IMO, this is useful enough for a NEWS entry.
>> > >
>> >
>> > Like this?
>> >
>> > diff --git a/gdb/NEWS b/gdb/NEWS
>> > index 6cec32a..b29fa6c 100644
>> > --- a/gdb/NEWS
>> > +++ b/gdb/NEWS
>> > @@ -3,6 +3,10 @@
>> >
>> >  *** Changes since GDB 7.1
>> >
>> > +* X86 pseudo registers
>> > +
>> > +  GDB now supports 8bit, 16bit and 32bit x86 pseudo registers.
>> > +
>> >  * Python scripting
>> >
>> >  The GDB Python API now has access to symbols, symbol tables, and
>> >
>>
>> That won't mean anything to users; they don't know what a pseudo
>> register is.
>
> I agree.  We should try to explain more.
>

How about

---
* X86 general purpose registers

  GDB now supports reading/writing byte, word and double word x86
  general purpose registers directly.
---

-- 
H.J.

Re: PATCH: Support x86 pseudo registers

[Eli Zaretskii]

> Date: Tue, 2 Mar 2010 11:01:42 -0800
> From: "H.J. Lu" <hjl.tools@gmail.com>
> Cc: Daniel Jacobowitz <dan@codesourcery.com>, gdb-patches@sourceware.org
> 
> How about
> 
> ---
> * X86 general purpose registers
> 
>   GDB now supports reading/writing byte, word and double word x86
>   general purpose registers directly.
> ---

Thanks, this is much better.  However, could we also tell what GDB
features and/or commands would benefit from this support?

Re: PATCH: Support x86 pseudo registers

[H.J. Lu]

On Tue, Mar 2, 2010 at 12:54 PM, Eli Zaretskii <eliz@gnu.org> wrote:
>> Date: Tue, 2 Mar 2010 11:01:42 -0800
>> From: "H.J. Lu" <hjl.tools@gmail.com>
>> Cc: Daniel Jacobowitz <dan@codesourcery.com>, gdb-patches@sourceware.org
>>
>> How about
>>
>> ---
>> * X86 general purpose registers
>>
>>   GDB now supports reading/writing byte, word and double word x86
>>   general purpose registers directly.
>> ---
>
> Thanks, this is much better.  However, could we also tell what GDB
> features and/or commands would benefit from this support?
>

I am not familiar with that part. I could use some help.

Thanks.

-- 
H.J.

Re: PATCH: Support x86 pseudo registers

[Eli Zaretskii]

> Date: Tue, 2 Mar 2010 13:06:20 -0800
> From: "H.J. Lu" <hjl.tools@gmail.com>
> Cc: dan@codesourcery.com, gdb-patches@sourceware.org
> 
> On Tue, Mar 2, 2010 at 12:54 PM, Eli Zaretskii <eliz@gnu.org> wrote:
> >> Date: Tue, 2 Mar 2010 11:01:42 -0800
> >> From: "H.J. Lu" <hjl.tools@gmail.com>
> >> Cc: Daniel Jacobowitz <dan@codesourcery.com>, gdb-patches@sourceware.org
> >>
> >> How about
> >>
> >> ---
> >> * X86 general purpose registers
> >>
> >>   GDB now supports reading/writing byte, word and double word x86
> >>   general purpose registers directly.
> >> ---
> >
> > Thanks, this is much better.  However, could we also tell what GDB
> > features and/or commands would benefit from this support?
> >
> 
> I am not familiar with that part. I could use some help.

Who can help out here?  I can help with wording, if someone tells the
story.

Re: PATCH: Support x86 pseudo registers

[Daniel Jacobowitz]

On Tue, Mar 02, 2010 at 11:47:35PM +0200, Eli Zaretskii wrote:
> Who can help out here?  I can help with wording, if someone tells the
> story.

Presumably H. J. knows why he wrote the patch?

I presume it lets us say $ah or $ax in addition to $eax, and lets $eax
work on 64-bit systems where we really have $rax.

-- 
Daniel Jacobowitz
CodeSourcery

Re: PATCH: Support x86 pseudo registers

[Michael Snyder]

Daniel Jacobowitz wrote:
> On Tue, Mar 02, 2010 at 11:47:35PM +0200, Eli Zaretskii wrote:
>> Who can help out here?  I can help with wording, if someone tells the
>> story.
> 
> Presumably H. J. knows why he wrote the patch?
> 
> I presume it lets us say $ah or $ax in addition to $eax, and lets $eax
> work on 64-bit systems where we really have $rax.

Mmm hmm, and the context would be expressions or anywhere where a
register name is appropriate (eg. info reg).  Yes?

Re: PATCH: Support x86 pseudo registers

[H.J. Lu]

On Tue, Mar 2, 2010 at 1:52 PM, Daniel Jacobowitz <dan@codesourcery.com> wrote:
> On Tue, Mar 02, 2010 at 11:47:35PM +0200, Eli Zaretskii wrote:
>> Who can help out here?  I can help with wording, if someone tells the
>> story.
>
> Presumably H. J. knows why he wrote the patch?
>
> I presume it lets us say $ah or $ax in addition to $eax, and lets $eax
> work on 64-bit systems where we really have $rax.
>

Exactly. I can do

(top-gdb) disass
Dump of assembler code for function main:
   0x000000000044ce70 <+0>:	sub    $0x28,%rsp
   0x000000000044ce74 <+4>:	movq   $0x0,(%rsp)
   0x000000000044ce7c <+12>:	mov    %edi,(%rsp)
=> 0x000000000044ce7f <+15>:	mov    %rsp,%rdi
   0x000000000044ce82 <+18>:	movq   $0x0,0x10(%rsp)
   0x000000000044ce8b <+27>:	mov    %rsi,0x8(%rsp)
   0x000000000044ce90 <+32>:	movq   $0x6a6ed0,0x18(%rsp)
   0x000000000044ce99 <+41>:	callq  0x44ceb0 <gdb_main>
   0x000000000044ce9e <+46>:	add    $0x28,%rsp
   0x000000000044cea2 <+50>:	retq
End of assembler dump.
(top-gdb) p/x $edi
$1 = 0x1
(top-gdb) p/x $rdi
$2 = 0x1
(top-gdb)


-- 
H.J.

Re: PATCH: Support x86 pseudo registers

[H.J. Lu]

On Tue, Mar 2, 2010 at 1:57 PM, Michael Snyder <msnyder@vmware.com> wrote:
> Daniel Jacobowitz wrote:
>>
>> On Tue, Mar 02, 2010 at 11:47:35PM +0200, Eli Zaretskii wrote:
>>>
>>> Who can help out here?  I can help with wording, if someone tells the
>>> story.
>>
>> Presumably H. J. knows why he wrote the patch?
>>
>> I presume it lets us say $ah or $ax in addition to $eax, and lets $eax
>> work on 64-bit systems where we really have $rax.
>
> Mmm hmm, and the context would be expressions or anywhere where a
> register name is appropriate (eg. info reg).  Yes?
>

Yes.

(top-gdb) info reg $edi
edi            0x1	1
(top-gdb) info reg $rdi
rdi            0x1	1
(top-gdb) info reg $dl
dl             0xd8	-40
(top-gdb) info reg $dil
dil            0x1	1
(top-gdb)


-- 
H.J.

Re: PATCH: Support x86 pseudo registers

[H.J. Lu]

On Tue, Mar 2, 2010 at 1:59 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Tue, Mar 2, 2010 at 1:57 PM, Michael Snyder <msnyder@vmware.com> wrote:
>> Daniel Jacobowitz wrote:
>>>
>>> On Tue, Mar 02, 2010 at 11:47:35PM +0200, Eli Zaretskii wrote:
>>>>
>>>> Who can help out here?  I can help with wording, if someone tells the
>>>> story.
>>>
>>> Presumably H. J. knows why he wrote the patch?
>>>
>>> I presume it lets us say $ah or $ax in addition to $eax, and lets $eax
>>> work on 64-bit systems where we really have $rax.
>>
>> Mmm hmm, and the context would be expressions or anywhere where a
>> register name is appropriate (eg. info reg).  Yes?
>>
>
> Yes.
>
> (top-gdb) info reg $edi
> edi            0x1      1
> (top-gdb) info reg $rdi
> rdi            0x1      1
> (top-gdb) info reg $dl
> dl             0xd8     -40
> (top-gdb) info reg $dil
> dil            0x1      1
> (top-gdb)
>
>

Basically, you can access any byte/word/dword registers, as shown
in assembly code, the same way as word/dword registers.


-- 
H.J.

Re: PATCH: Support x86 pseudo registers

[Eli Zaretskii]

> Date: Tue, 2 Mar 2010 14:07:41 -0800
> From: "H.J. Lu" <hjl.tools@gmail.com>
> Cc: Eli Zaretskii <eliz@gnu.org>, gdb-patches@sourceware.org
> 
> >>> I presume it lets us say $ah or $ax in addition to $eax, and lets $eax
> >>> work on 64-bit systems where we really have $rax.
> >>
> >> Mmm hmm, and the context would be expressions or anywhere where a
> >> register name is appropriate (eg. info reg).  Yes?
> >>
> >
> > Yes.
> >
> > (top-gdb) info reg $edi
> > edi            0x1      1
> > (top-gdb) info reg $rdi
> > rdi            0x1      1
> > (top-gdb) info reg $dl
> > dl             0xd8     -40
> > (top-gdb) info reg $dil
> > dil            0x1      1
> > (top-gdb)
> >
> >
> 
> Basically, you can access any byte/word/dword registers, as shown
> in assembly code, the same way as word/dword registers.

Then how about this entry:

 * X86 general purpose registers

   GDB now supports reading/writing byte, word and double-word x86
   general purpose registers directly.  This means you can use, say,
   $ah or $ax to refer, respectively, to the byte register AH and
   16-bit word register AX that are actually portions of the 32-bit
   register EAX or 64-bit register RAX.

Re: PATCH: Support x86 pseudo registers

[H.J. Lu]

On Wed, Mar 3, 2010 at 9:33 AM, Eli Zaretskii <eliz@gnu.org> wrote:
>> Date: Tue, 2 Mar 2010 14:07:41 -0800
>> From: "H.J. Lu" <hjl.tools@gmail.com>
>> Cc: Eli Zaretskii <eliz@gnu.org>, gdb-patches@sourceware.org
>>
>> >>> I presume it lets us say $ah or $ax in addition to $eax, and lets $eax
>> >>> work on 64-bit systems where we really have $rax.
>> >>
>> >> Mmm hmm, and the context would be expressions or anywhere where a
>> >> register name is appropriate (eg. info reg).  Yes?
>> >>
>> >
>> > Yes.
>> >
>> > (top-gdb) info reg $edi
>> > edi            0x1      1
>> > (top-gdb) info reg $rdi
>> > rdi            0x1      1
>> > (top-gdb) info reg $dl
>> > dl             0xd8     -40
>> > (top-gdb) info reg $dil
>> > dil            0x1      1
>> > (top-gdb)
>> >
>> >
>>
>> Basically, you can access any byte/word/dword registers, as shown
>> in assembly code, the same way as word/dword registers.
>
> Then how about this entry:
>
>  * X86 general purpose registers
>
>   GDB now supports reading/writing byte, word and double-word x86
>   general purpose registers directly.  This means you can use, say,
>   $ah or $ax to refer, respectively, to the byte register AH and
>   16-bit word register AX that are actually portions of the 32-bit
>   register EAX or 64-bit register RAX.
>
>

It looks good to me.

Thanks.


-- 
H.J.

Re: PATCH: Support x86 pseudo registers

[Eli Zaretskii]

> Date: Wed, 3 Mar 2010 09:53:30 -0800
> From: "H.J. Lu" <hjl.tools@gmail.com>
> Cc: msnyder@vmware.com, gdb-patches@sourceware.org
> 
> >  * X86 general purpose registers
> >
> >   GDB now supports reading/writing byte, word and double-word x86
> >   general purpose registers directly.  This means you can use, say,
> >   $ah or $ax to refer, respectively, to the byte register AH and
> >   16-bit word register AX that are actually portions of the 32-bit
> >   register EAX or 64-bit register RAX.
> >
> >
> 
> It looks good to me.

Then please install it (together with the rest of the patch, if that's
not yet in).

Thanks.

Re: PATCH: Support x86 pseudo registers

[H.J. Lu]

On Wed, Mar 3, 2010 at 10:09 AM, Eli Zaretskii <eliz@gnu.org> wrote:
>> Date: Wed, 3 Mar 2010 09:53:30 -0800
>> From: "H.J. Lu" <hjl.tools@gmail.com>
>> Cc: msnyder@vmware.com, gdb-patches@sourceware.org
>>
>> >  * X86 general purpose registers
>> >
>> >   GDB now supports reading/writing byte, word and double-word x86
>> >   general purpose registers directly.  This means you can use, say,
>> >   $ah or $ax to refer, respectively, to the byte register AH and
>> >   16-bit word register AX that are actually portions of the 32-bit
>> >   register EAX or 64-bit register RAX.
>> >
>> >
>>
>> It looks good to me.
>
> Then please install it (together with the rest of the patch, if that's
> not yet in).
>

Done.  Thanks.

-- 
H.J.

Re: PATCH: Support x86 pseudo registers

[Pedro Alves]

On Wednesday 03 March 2010 17:33:21, Eli Zaretskii wrote:
>  * X86 general purpose registers
> 
>    GDB now supports reading/writing byte, word and double-word x86
>    general purpose registers directly.  This means you can use, say,
>    $ah or $ax to refer, respectively, to the byte register AH and
>    16-bit word register AX that are actually portions of the 32-bit
>    register EAX or 64-bit register RAX.
> 

I just realized that this change means that $sp is now just
a 16-bit word of $esp, instead of a pseudo-register resolving to
either $esp/$rsp (32-bit/64-bit).  I can't say it is actually wrong to
have it that way, but, I think this should at least be mentioned in
NEWS, if not in the manual too, because it can catch people
by surprise.

old:

 (top-gdb) p $sp
 $1 = (void *) 0x7fffffffdff0
 (top-gdb) ptype $sp
 type = void *

new:

 (top-gdb) p $sp
 $2 = -8176
 (top-gdb) ptype $sp
 type = int16_t
 (top-gdb)


-- 
Pedro Alves

Re: PATCH: Support x86 pseudo registers

[H.J. Lu]

On Thu, Mar 11, 2010 at 8:23 PM, Pedro Alves <pedro@codesourcery.com> wrote:
> On Wednesday 03 March 2010 17:33:21, Eli Zaretskii wrote:
>>  * X86 general purpose registers
>>
>>    GDB now supports reading/writing byte, word and double-word x86
>>    general purpose registers directly.  This means you can use, say,
>>    $ah or $ax to refer, respectively, to the byte register AH and
>>    16-bit word register AX that are actually portions of the 32-bit
>>    register EAX or 64-bit register RAX.
>>
>
> I just realized that this change means that $sp is now just
> a 16-bit word of $esp, instead of a pseudo-register resolving to
> either $esp/$rsp (32-bit/64-bit).  I can't say it is actually wrong to
> have it that way, but, I think this should at least be mentioned in
> NEWS, if not in the manual too, because it can catch people
> by surprise.
>

I think we should treat sp as a special case here and not to make
it 16bit.


-- 
H.J.

Re: PATCH: Support x86 pseudo registers

[H.J. Lu]

On Thu, Mar 11, 2010 at 9:32 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Thu, Mar 11, 2010 at 8:23 PM, Pedro Alves <pedro@codesourcery.com> wrote:
>> On Wednesday 03 March 2010 17:33:21, Eli Zaretskii wrote:
>>>  * X86 general purpose registers
>>>
>>>    GDB now supports reading/writing byte, word and double-word x86
>>>    general purpose registers directly.  This means you can use, say,
>>>    $ah or $ax to refer, respectively, to the byte register AH and
>>>    16-bit word register AX that are actually portions of the 32-bit
>>>    register EAX or 64-bit register RAX.
>>>
>>
>> I just realized that this change means that $sp is now just
>> a 16-bit word of $esp, instead of a pseudo-register resolving to
>> either $esp/$rsp (32-bit/64-bit).  I can't say it is actually wrong to
>> have it that way, but, I think this should at least be mentioned in
>> NEWS, if not in the manual too, because it can catch people
>> by surprise.
>>
>
> I think we should treat sp as a special case here and not to make
> it 16bit.
>

A patch is posted at:

http://sourceware.org/ml/gdb-patches/2010-03/msg00435.html


-- 
H.J.

Re: PATCH: Support x86 pseudo registers

[Eli Zaretskii]

> From: Pedro Alves <pedro@codesourcery.com>
> Date: Fri, 12 Mar 2010 04:23:07 +0000
> Cc: "H.J. Lu" <hjl.tools@gmail.com>,
>  msnyder@vmware.com
> 
> I just realized that this change means that $sp is now just
> a 16-bit word of $esp, instead of a pseudo-register resolving to
> either $esp/$rsp (32-bit/64-bit).  I can't say it is actually wrong to
> have it that way

I think it's very wrong, because it means we no longer have a generic
stack pointer register, at least not on x86.  Is that true?

Re: PATCH: Support x86 pseudo registers

[Pedro Alves]

On Friday 12 March 2010 08:30:50, Eli Zaretskii wrote:
> > From: Pedro Alves <pedro@codesourcery.com>
> > Date: Fri, 12 Mar 2010 04:23:07 +0000
> > Cc: "H.J. Lu" <hjl.tools@gmail.com>,
> >  msnyder@vmware.com
> > 
> > I just realized that this change means that $sp is now just
> > a 16-bit word of $esp, instead of a pseudo-register resolving to
> > either $esp/$rsp (32-bit/64-bit).  I can't say it is actually wrong to
> > have it that way
> 
> I think it's very wrong, because it means we no longer have a generic
> stack pointer register, at least not on x86.  Is that true?

A certainly agree very much that it's not convenient to have
$sp not be the largest stack pointer.  I said the above based on:

 @cindex standard registers
 @value{GDBN} has four ``standard'' register names that are available (in
 expressions) on most machines---whenever they do not conflict with an
                                 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 architecture's canonical mnemonics for registers.  The register names
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 @code{$pc} and @code{$sp} are used for the program counter register and
 the stack pointer.  @code{$fp} is used for a register that contains a
 pointer to the current stack frame, and @code{$ps} is used for a
 register that contains the processor status.  For example,
 you could print the program counter in hex with

So, should that sentence of the manual be relaxed?  I guess
this would be a good place to at least mention the x86 $sp is
always $esp or $rsp.

-- 
Pedro Alves

Re: PATCH: Support x86 pseudo registers

[Eli Zaretskii]

> From: Pedro Alves <pedro@codesourcery.com>
> Date: Fri, 12 Mar 2010 15:26:37 +0000
> Cc: hjl.tools@gmail.com,
>  msnyder@vmware.com
> 
> > > I just realized that this change means that $sp is now just
> > > a 16-bit word of $esp, instead of a pseudo-register resolving to
> > > either $esp/$rsp (32-bit/64-bit).  I can't say it is actually wrong to
> > > have it that way
> > 
> > I think it's very wrong, because it means we no longer have a generic
> > stack pointer register, at least not on x86.  Is that true?
> 
> A certainly agree very much that it's not convenient to have
> $sp not be the largest stack pointer.  I said the above based on:
> 
>  @cindex standard registers
>  @value{GDBN} has four ``standard'' register names that are available (in
>  expressions) on most machines---whenever they do not conflict with an
>                                  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>  architecture's canonical mnemonics for registers.  The register names
>  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>  @code{$pc} and @code{$sp} are used for the program counter register and
>  the stack pointer.  @code{$fp} is used for a register that contains a
>  pointer to the current stack frame, and @code{$ps} is used for a
>  register that contains the processor status.  For example,
>  you could print the program counter in hex with
> 
> So, should that sentence of the manual be relaxed?

Maybe, but frankly I don't really understand what it says, exactly.
Does it mean that if the name does clash with the architecture, the
architecture's meaning is used?

Anyway, are there any such conflicts in the current codebase?

> I guess this would be a good place to at least mention the x86 $sp
> is always $esp or $rsp.

Yes, I think so.

Re: PATCH: Support x86 pseudo registers

[Daniel Jacobowitz]

On Fri, Mar 12, 2010 at 06:04:45PM +0200, Eli Zaretskii wrote:
> Maybe, but frankly I don't really understand what it says, exactly.
> Does it mean that if the name does clash with the architecture, the
> architecture's meaning is used?

I think that's what was intended.

> Anyway, are there any such conflicts in the current codebase?

Yeah, there are.  On some platforms, "$fp" is a GDB-computed value
based on the frame unwinder.  On others, it's a register that may or
may not have a frame pointer in it right now.  For instance, $fp on
ARM is r11; "fp" on M68K is between a5 and sp.  On i386 it's
calculated.  You'll get different results for this:

(gdb) p $fp
$1 = (void *) 0x7fffffffdec0
(gdb) p $fp --
Left operand of assignment is not an lvalue.

Whaddaya mean $fp isn't an lvalue?  Oh, it's an internal value, not an
alias for $rbp.

-- 
Daniel Jacobowitz
CodeSourcery

Re: PATCH: Support x86 pseudo registers

[Pedro Alves]

On Friday 12 March 2010 16:04:45, Eli Zaretskii wrote:
> > So, should that sentence of the manual be relaxed?
> 
> Maybe, but frankly I don't really understand what it says, exactly.
> Does it mean that if the name does clash with the architecture, the
> architecture's meaning is used?

Yes.  That's what the code does too, hence this issue.

E.g., on archs with a real "$fp" register, in -fomit-frame-pointer
functions, $fp evals to the contents of the reg (which can
be anything), while on other archs it prints the unwinder's
notion of frame base.

> Anyway, are there any such conflicts in the current codebase?

There was one just now.  :-)

> > I guess this would be a good place to at least mention the x86 $sp
> > is always $esp or $rsp.
> 
> Yes, I think so.

-- 
Pedro Alves

Re: PATCH: Support x86 pseudo registers

[Eli Zaretskii]

> Date: Fri, 12 Mar 2010 11:30:04 -0500
> From: Daniel Jacobowitz <dan@codesourcery.com>
> Cc: Pedro Alves <pedro@codesourcery.com>, gdb-patches@sourceware.org,
> 	hjl.tools@gmail.com, msnyder@vmware.com
> 
> On Fri, Mar 12, 2010 at 06:04:45PM +0200, Eli Zaretskii wrote:
> > Maybe, but frankly I don't really understand what it says, exactly.
> > Does it mean that if the name does clash with the architecture, the
> > architecture's meaning is used?
> 
> I think that's what was intended.

Then maybe we should say when there's conflict, the generic name
_might_ be unavailable.

Re: PATCH: Support x86 pseudo registers

[Pedro Alves]

On Friday 12 March 2010 18:13:47, Eli Zaretskii wrote:
> > Date: Fri, 12 Mar 2010 11:30:04 -0500
> > From: Daniel Jacobowitz <dan@codesourcery.com>
> > Cc: Pedro Alves <pedro@codesourcery.com>, gdb-patches@sourceware.org,
> > 	hjl.tools@gmail.com, msnyder@vmware.com
> > 
> > On Fri, Mar 12, 2010 at 06:04:45PM +0200, Eli Zaretskii wrote:
> > > Maybe, but frankly I don't really understand what it says, exactly.
> > > Does it mean that if the name does clash with the architecture, the
> > > architecture's meaning is used?
> > 
> > I think that's what was intended.
> 
> Then maybe we should say when there's conflict, the generic name
> _might_ be unavailable.
> 

We could also stick to defaulting to the architecture meaning, and
always provide $_pc, $_sp, $_fp, $_ps registers that always map to
the generic versions.  That way, when there's a conflict,
there's always an escape route.

-- 
Pedro Alves

Re: PATCH: Support x86 pseudo registers

[Michael Snyder]

H.J. Lu wrote:
> On Thu, Mar 11, 2010 at 8:23 PM, Pedro Alves <pedro@codesourcery.com> wrote:
>> On Wednesday 03 March 2010 17:33:21, Eli Zaretskii wrote:
>>>  * X86 general purpose registers
>>>
>>>    GDB now supports reading/writing byte, word and double-word x86
>>>    general purpose registers directly.  This means you can use, say,
>>>    $ah or $ax to refer, respectively, to the byte register AH and
>>>    16-bit word register AX that are actually portions of the 32-bit
>>>    register EAX or 64-bit register RAX.
>>>
>> I just realized that this change means that $sp is now just
>> a 16-bit word of $esp, instead of a pseudo-register resolving to
>> either $esp/$rsp (32-bit/64-bit).  I can't say it is actually wrong to
>> have it that way, but, I think this should at least be mentioned in
>> NEWS, if not in the manual too, because it can catch people
>> by surprise.
>>
> 
> I think we should treat sp as a special case here and not to make
> it 16bit.

I agree.  I'm a user, and I'm very accustomed to typing "p $sp".
I wouldn't like its meaning to change.

Re: PATCH: Support x86 pseudo registers

[Eli Zaretskii]

> From: Pedro Alves <pedro@codesourcery.com>
> Date: Fri, 12 Mar 2010 18:20:10 +0000
> Cc: Daniel Jacobowitz <dan@codesourcery.com>,  hjl.tools@gmail.com,  msnyder@vmware.com
> 
> We could also stick to defaulting to the architecture meaning, and
> always provide $_pc, $_sp, $_fp, $_ps registers that always map to
> the generic versions.  That way, when there's a conflict,
> there's always an escape route.

I think it's a good idea.

Re: PATCH: Support x86 pseudo registers

[H.J. Lu]

On Fri, Mar 12, 2010 at 10:55 AM, Eli Zaretskii <eliz@gnu.org> wrote:
>> From: Pedro Alves <pedro@codesourcery.com>
>> Date: Fri, 12 Mar 2010 18:20:10 +0000
>> Cc: Daniel Jacobowitz <dan@codesourcery.com>,  hjl.tools@gmail.com,  msnyder@vmware.com
>>
>> We could also stick to defaulting to the architecture meaning, and
>> always provide $_pc, $_sp, $_fp, $_ps registers that always map to
>> the generic versions.  That way, when there's a conflict,
>> there's always an escape route.
>
> I think it's a good idea.
>

Do we have a consensus on this? Do I need to do anything for x86?

-- 
H.J.