From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 17266 invoked by alias); 2 Mar 2010 15:37:50 -0000 Received: (qmail 17252 invoked by uid 22791); 2 Mar 2010 15:37:49 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL,BAYES_00,SARE_MSGID_LONG40 X-Spam-Check-By: sourceware.org Received: from mail-ew0-f212.google.com (HELO mail-ew0-f212.google.com) (209.85.219.212) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 02 Mar 2010 15:37:44 +0000 Received: by ewy4 with SMTP id 4so236353ewy.8 for ; Tue, 02 Mar 2010 07:37:41 -0800 (PST) MIME-Version: 1.0 Received: by 10.216.88.139 with SMTP id a11mr262312wef.74.1267544261711; Tue, 02 Mar 2010 07:37:41 -0800 (PST) In-Reply-To: <20100302150446.GB20342@caradoc.them.org> References: <20100301170152.GA20106@intel.com> <20100302135502.GB16596@caradoc.them.org> <6dc9ffc81003020608s10b76867kc04404a57df45df1@mail.gmail.com> <20100302150446.GB20342@caradoc.them.org> Date: Tue, 02 Mar 2010 15:37:00 -0000 Message-ID: <6dc9ffc81003020737r55d4a4aasa5eb848e617e0684@mail.gmail.com> Subject: Re: PATCH: Support x86 pseudo registers From: "H.J. Lu" To: "H.J. Lu" , GDB , Eli Zaretskii Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2010-03/txt/msg00053.txt.bz2 On Tue, Mar 2, 2010 at 7:04 AM, Daniel Jacobowitz wr= ote: > On Tue, Mar 02, 2010 at 06:08:37AM -0800, H.J. Lu wrote: >> On Tue, Mar 2, 2010 at 5:55 AM, Daniel Jacobowitz = wrote: >> > On Mon, Mar 01, 2010 at 09:01:52AM -0800, H.J. Lu wrote: >> >> Hi, >> >> >> >> This patch supports 8bit, 16bit and 32bit x86 pseudo registers. OK >> >> to install? >> > >> > IMO, this is useful enough for a NEWS entry. >> > >> >> Like this? >> >> diff --git a/gdb/NEWS b/gdb/NEWS >> index 6cec32a..b29fa6c 100644 >> --- a/gdb/NEWS >> +++ b/gdb/NEWS >> @@ -3,6 +3,10 @@ >> >> =A0*** Changes since GDB 7.1 >> >> +* X86 pseudo registers >> + >> + =A0GDB now supports 8bit, 16bit and 32bit x86 pseudo registers. >> + >> =A0* Python scripting >> >> =A0The GDB Python API now has access to symbols, symbol tables, and >> > > That won't mean anything to users; they don't know what a pseudo > register is. =A0Does the architecture have a standard name for these SDM mentions 8bit/byte, 16bit/word and 32bit/doubleword general purpose registers. > things? =A0Partial registers or something like that? > "Partial registers" are too vague. We may not access upper bits directly. --=20 H.J.