* [RFA] mips 32/64 register/stack fix
@ 2004-04-22 18:49 Michael Snyder
2004-04-22 19:59 ` Andrew Cagney
0 siblings, 1 reply; 17+ messages in thread
From: Michael Snyder @ 2004-04-22 18:49 UTC (permalink / raw)
To: gdb-patches; +Cc: cagney, Daniel Jacobowitz
[-- Attachment #1: Type: text/plain, Size: 664 bytes --]
Hi Andrew, Daniel,
This patch applies to the case where you have a mips64 target
(eg. mipsisa64-elf), but you're compiling in 32 bit mode (gcc -mips32).
In this case mips_regsize (gdbarch) is 64, but mips_saved_regsize (tdep)
is 32 (ie. only 32 bits are used to save a register on the stack).
trad_frame_prev_register can't handle that case (AFAICT), because
it relies on what the regcache says about the regsize.
So I've added come code to mips_mdebug_frame_prev_register
to handle it. This fixes at least 500 testsuite failures,
and in fact makes the results for -mips32 almost identical
with the results for -mips64 (they were woefully different
before).
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2004-04-22 Michael Snyder <msnyder@redhat.com>
* mips-tdep.c (mips_mdebug_frame_prev_register): Don't call
trad_frame_prev_register when stack-save-size is not equal
to register-size.
Index: mips-tdep.c
===================================================================
RCS file: /cvs/cvsfiles/gnupro/gdb/mips-tdep.c,v
retrieving revision 1.11
diff -p -r1.11 mips-tdep.c
*** mips-tdep.c 14 Apr 2004 00:54:43 -0000 1.11
--- mips-tdep.c 22 Apr 2004 01:01:34 -0000
*************** mips_mdebug_frame_prev_register (struct
*** 1684,1693 ****
enum lval_type *lvalp, CORE_ADDR *addrp,
int *realnump, void *valuep)
{
struct mips_frame_cache *info = mips_mdebug_frame_cache (next_frame,
this_cache);
! trad_frame_prev_register (next_frame, info->saved_regs, regnum,
! optimizedp, lvalp, addrp, realnump, valuep);
}
static const struct frame_unwind mips_mdebug_frame_unwind =
--- 1684,1719 ----
enum lval_type *lvalp, CORE_ADDR *addrp,
int *realnump, void *valuep)
{
+ struct gdbarch *gdbarch = get_frame_arch (next_frame);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
struct mips_frame_cache *info = mips_mdebug_frame_cache (next_frame,
this_cache);
! if (mips_saved_regsize (tdep) < mips_regsize (gdbarch) &&
! trad_frame_addr_p (info->saved_regs, regnum))
! {
! char tmp[MAX_REGISTER_SIZE];
! /* The register was saved in memory, but the size on the stack
! is not the same as the size in the regcache. Trad_frame
! cannot handle this case. */
! *optimizedp = 0;
! *lvalp = lval_memory;
! *addrp = info->saved_regs[regnum].addr;
! *realnump = -1;
! if (valuep != NULL)
! {
! /* Clear the input buffer, read the value into it from memory
! (offset by the difference between its size on the stack and
! its size in the register). */
! get_frame_memory (next_frame, info->saved_regs[regnum].addr,
! tmp, mips_saved_regsize (tdep));
! store_signed_integer (valuep, mips_regsize (gdbarch),
! extract_signed_integer (tmp,
! mips_saved_regsize (tdep)));
! }
! }
! else
! trad_frame_prev_register (next_frame, info->saved_regs, regnum,
! optimizedp, lvalp, addrp, realnump, valuep);
}
static const struct frame_unwind mips_mdebug_frame_unwind =
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [RFA] mips 32/64 register/stack fix 2004-04-22 18:49 [RFA] mips 32/64 register/stack fix Michael Snyder @ 2004-04-22 19:59 ` Andrew Cagney 2004-04-22 21:29 ` Daniel Jacobowitz 2004-04-22 21:43 ` Michael Snyder 0 siblings, 2 replies; 17+ messages in thread From: Andrew Cagney @ 2004-04-22 19:59 UTC (permalink / raw) To: Michael Snyder; +Cc: gdb-patches, cagney, Daniel Jacobowitz > ! if (mips_saved_regsize (tdep) < mips_regsize (gdbarch) && > ! trad_frame_addr_p (info->saved_regs, regnum)) > ! { This doesn't look right, can you post a backtrace? The MIPS has [0 .. NUM_REGS) ISA sized registers and [NUM_REGS .. 2*NUM_REGS) ABI sized registers. So if the caller wants an ABI register it should have passed in that register number. Andrew ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFA] mips 32/64 register/stack fix 2004-04-22 19:59 ` Andrew Cagney @ 2004-04-22 21:29 ` Daniel Jacobowitz 2004-04-22 21:43 ` Michael Snyder 1 sibling, 0 replies; 17+ messages in thread From: Daniel Jacobowitz @ 2004-04-22 21:29 UTC (permalink / raw) To: Andrew Cagney; +Cc: Michael Snyder, gdb-patches, cagney On Thu, Apr 22, 2004 at 03:59:38PM -0400, Andrew Cagney wrote: > >! if (mips_saved_regsize (tdep) < mips_regsize (gdbarch) && > >! trad_frame_addr_p (info->saved_regs, regnum)) > >! { > > This doesn't look right, can you post a backtrace? > > The MIPS has [0 .. NUM_REGS) ISA sized registers and [NUM_REGS .. > 2*NUM_REGS) ABI sized registers. So if the caller wants an ABI register > it should have passed in that register number. Personally, I think the mistake is higher up - in mips_regsize or further. Look at this: int mips_regsize (struct gdbarch *gdbarch) { return (gdbarch_bfd_arch_info (gdbarch)->bits_per_word / gdbarch_bfd_arch_info (gdbarch)->bits_per_byte); } bits_per_word is based on the BFD architecture, which is based on EF_MIPS_MACH and EF_MIPS_ARCH. I don't think it's useful to have -mcpu=mips64 -mabi=32 code (which is pretty much what Michael's describing) behave differently from -mcpu=mips1 -mabi=32 code; a native GNU/Linux GDB has to deal with 32-bit target registers and 32-bit saved registers in either case. And that's what you get if you build the optimal compiler for a 32-bit kernel on a 64-bit processor, which lots of people do. It's very easy to reproduce this problem if you have access to anything that can run a MIPS64 GNU/Linux kernel. Build an n32 GDB, run it using --target_board unix/-mabi=32/-mcpu=mips64, IIRC. I have a collection of hacks to work around this and they're gross beyond all description, which is why I tabled them until after I sort through the prologue analysis issues. -- Daniel Jacobowitz MontaVista Software Debian GNU/Linux Developer ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFA] mips 32/64 register/stack fix 2004-04-22 19:59 ` Andrew Cagney 2004-04-22 21:29 ` Daniel Jacobowitz @ 2004-04-22 21:43 ` Michael Snyder 2004-04-22 22:04 ` Andrew Cagney 1 sibling, 1 reply; 17+ messages in thread From: Michael Snyder @ 2004-04-22 21:43 UTC (permalink / raw) To: Andrew Cagney; +Cc: gdb-patches, cagney, Daniel Jacobowitz Andrew Cagney wrote: >> ! if (mips_saved_regsize (tdep) < mips_regsize (gdbarch) && >> ! trad_frame_addr_p (info->saved_regs, regnum)) >> ! { > > > This doesn't look right, can you post a backtrace? Yep. Here's the context. Target string = mipsisa64-elf. Host i6860pc-linux-gnu. The test case is gdb.base/return.c, the multilib parameter is "-mips32", and the testsuite generated this compiler command: /home/msnyder/gnupro/builds/cross/mipsisa64/gcc/xgcc -B/home/msnyder/gnupro/builds/cross/mipsisa64/gcc/ /home/msnyder/gnupro/gnupro-cross/gdb/testsuite/gdb.base/return.c -I/home/msnyder/gnupro/builds/cross/mipsisa64/mipsisa64-elf/mips32/newlib/targ-include -I/home/msnyder/gnupro/gnupro-cross/newlib/libc/include -B/home/msnyder/gnupro/builds/cross/mipsisa64/mipsisa64-elf/mips32/libgloss/mips/ -L/home/msnyder/gnupro/builds/cross/mipsisa64/mipsisa64-elf/mips32/libgloss/mips -L/home/msnyder/gnupro/gnupro-cross/libgloss/mips -L/home/msnyder/gnupro/builds/cross/mipsisa64/ld -B/home/msnyder/gnupro/builds/cross/mipsisa64/mipsisa64-elf/mips32/newlib/ -L/home/msnyder/gnupro/builds/cross/mipsisa64/mipsisa64-elf/mips32/newlib -g -lm -Tidt64.ld -mips32 -o /home/msnyder/gnupro/builds/cross/mipsisa64/gdb/testsuite/gdb.base/return The sequence of commands that gets the mips64-gdb into trouble are taken from the return.exp testcase: (gdb) target sim (gdb) load (gdb) break func1 (gdb) run (gdb) return Now, return_command calls frame_pop which calls regcache_save, which eventually calls mips_mdebug_frame_prev_register with a regnum that is saved on the stack. Here's the partial backtrace at that point: #0 mips_mdebug_frame_prev_register (next_frame=0x83e7408, this_cache=0x83e747c, regnum=120, optimizedp=0xbfffc2d4, lvalp=0xbfffc2c0, addrp=0xbfffc2c8, realnump=0xbfffc2c4, valuep=0xbfffc320) at /home/msnyder/gnupro/gnupro-cross/gdb/mips-tdep.c:1687 #1 0x0818d806 in frame_register_unwind (frame=0x83e746c, regnum=120, optimizedp=0xbfffc2d4, lvalp=0xbfffc2c0, addrp=0xbfffc2c8, realnump=0xbfffc2c4, bufferp=0xbfffc320) at /home/msnyder/gnupro/gnupro-cross/gdb/frame.c:547 #2 0x0818db61 in frame_unwind_register (frame=0x83e746c, regnum=120, buf=0xbfffc320) at /home/msnyder/gnupro/gnupro-cross/gdb/frame.c:626 #3 0x0818d60f in do_frame_unwind_register (src=0x83e746c, regnum=120, buf=0xbfffc320) at /home/msnyder/gnupro/gnupro-cross/gdb/frame.c:458 #4 0x080e3f46 in regcache_save (dst=0x846a650, cooked_read=0x818d5f8 <do_frame_unwind_register>, src=0x83e746c) at /home/msnyder/gnupro/gnupro-cross/gdb/regcache.c:386 #5 0x0818d67f in frame_pop (this_frame=0x83e746c) at /home/msnyder/gnupro/gnupro-cross/gdb/frame.c:484 #6 0x0812012d in return_command (retval_exp=0x0, from_tty=1) at /home/msnyder/gnupro/gnupro-cross/gdb/stack.c:1922 #7 0x080bd10b in do_cfunc (c=0x83e1568, args=0x0, from_tty=1) at /home/msnyder/gnupro/gnupro-cross/gdb/cli/cli-decode.c:57 #8 0x080bf0c9 in cmd_func (cmd=0x83e1568, args=0x0, from_tty=1) at /home/msnyder/gnupro/gnupro-cross/gdb/cli/cli-decode.c:1541 Register 120 is the first one that's saved on the stack (ie. trad_frame_addr_p is true). So now we call trad_frame_prev_register, which calls get_frame_memory, passing it a size which it gets from calling register_size(gdbarch, regnum), which looks like this: #0 register_size (gdbarch=0x84093e8, regnum=120) at /home/msnyder/gnupro/gnupro-cross/gdb/regcache.c:281 281 size = descr->sizeof_register[regnum]; Well regcache->descr->sizeof_register [120] is 8, but by looking at the saved_registers structure, you can see that the addresses where they are saved are only 4 bytes apart. So we read 8 bytes when we should read 4 bytes, and eventually the value comes back shifted left by 4 bytes in its buffer. Therefore when we allow the return command to complete, we get: (gdb) return^M Make func1 return now? (y or n) y^M #0 0x8002032400000000 in ?? ()^M (gdb) FAIL: gdb.base/return.exp: simple return Where the address shown should have been 0xffffffff80020324. This causes at least 500 FAILs per multi-lib, all of which go away with my patch. I'm guessing they all have to do with return, finish, or target function calls. ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFA] mips 32/64 register/stack fix 2004-04-22 21:43 ` Michael Snyder @ 2004-04-22 22:04 ` Andrew Cagney 2004-04-22 22:49 ` Michael Snyder 0 siblings, 1 reply; 17+ messages in thread From: Andrew Cagney @ 2004-04-22 22:04 UTC (permalink / raw) To: Michael Snyder; +Cc: gdb-patches, cagney, Daniel Jacobowitz > #0 register_size (gdbarch=0x84093e8, regnum=120) 120 looks large enough to be cooked (but to confirm this can you look at "maint print raw-registers". This will also tell us the register's type, and hence confirm the size. Given that you see 8, this suggests that the register's type is wrong (see mips_register_type). Also, what information is available in the object file header? Andrew ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFA] mips 32/64 register/stack fix 2004-04-22 22:04 ` Andrew Cagney @ 2004-04-22 22:49 ` Michael Snyder 2004-04-28 21:45 ` Andrew Cagney 0 siblings, 1 reply; 17+ messages in thread From: Michael Snyder @ 2004-04-22 22:49 UTC (permalink / raw) To: Andrew Cagney; +Cc: gdb-patches, cagney, Daniel Jacobowitz Andrew Cagney wrote: >> #0 register_size (gdbarch=0x84093e8, regnum=120) > > > 120 looks large enough to be cooked (but to confirm this can you look at > "maint print raw-registers". This will also tell us the register's > type, and hence confirm the size. Yes, raw is from 0 to 89, and cooked is from 90 to 179. regcache->descr->sizeof_register is as follows: 8 for all raw 8 for the first 70 cooked 4 for the last 20 cooked register_type looks like: raw: 38 @ int64 32 @ double64 20 @ int64 cooked: 38 @ int64 32 @ double64 20 @ int32 > Given that you see 8, this suggests that the register's type is wrong > (see mips_register_type). It looks to me as if mips_register_type relies on mips_regsize. Which returns 8. Yep, and mips_register_type (120) returns int64_t. But mips_saved_regsize (tdep) returns 4 (as it should, I guess). > Also, what information is available in the object file header? Can you be more specific? Here's the bfd_arch_info: {bits_per_word = 64, bits_per_address = 64, bits_per_byte = 8, arch = bfd_arch_mips, mach = 64, arch_name = 0x8382960 "mips", printable_name = 0x8382a50 "mips:isa64", section_align_power = 3, the_default = 0, compatible = 0x82c36a4 <mips_compatible>, scan = 0x825f3c3 <bfd_default_scan>, next = 0x8382f00} Here's your tdep info: {elf_flags = 1610625025, mips_abi = MIPS_ABI_EABI32, found_abi = MIPS_ABI_EABI32, mips_fpu_type = MIPS_FPU_DOUBLE, mips_last_arg_regnum = 11, mips_last_fp_arg_regnum = 57, mips_default_saved_regsize = 4, mips_fp_register_double = 0, mips_default_stack_argsize = 4, default_mask_address_p = 0, mips64_transfers_32bit_regs_p = 0, regnum = 0x840968c, mips_processor_reg_names = 0x83995c0} (GDB) p /x tdep.elf_flags $10 = 0x60003001 ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFA] mips 32/64 register/stack fix 2004-04-22 22:49 ` Michael Snyder @ 2004-04-28 21:45 ` Andrew Cagney 2004-04-29 3:12 ` Daniel Jacobowitz 0 siblings, 1 reply; 17+ messages in thread From: Andrew Cagney @ 2004-04-28 21:45 UTC (permalink / raw) To: Michael Snyder; +Cc: gdb-patches, cagney, Daniel Jacobowitz > Andrew Cagney wrote: > >>> #0 register_size (gdbarch=0x84093e8, regnum=120) >> >> >> >> 120 looks large enough to be cooked (but to confirm this can you look at "maint print raw-registers". This will also tell us the register's type, and hence confirm the size. > > > Yes, raw is from 0 to 89, and cooked is from 90 to 179. > regcache->descr->sizeof_register is as follows: > 8 for all raw > 8 for the first 70 cooked > 4 for the last 20 cooked > > register_type looks like: > raw: > 38 @ int64 > 32 @ double64 > 20 @ int64 > cooked: > 38 @ int64 > 32 @ double64 > 20 @ int32 good. >> Given that you see 8, this suggests that the register's type is wrong (see mips_register_type). > > > It looks to me as if mips_register_type relies on mips_regsize. > Which returns 8. Yep, and mips_register_type (120) returns int64_t. > > But mips_saved_regsize (tdep) returns 4 (as it should, I guess). > >> Also, what information is available in the object file header? > > > Can you be more specific? [...] > Here's your tdep info: > {elf_flags = 1610625025, mips_abi = MIPS_ABI_EABI32, I was looking to see if anything like that was present -> it is clearly identified as a 32-bit ABI binary. I think the bug is in mips_register_type, the tail end should probably be changed to read something like: else if (regnum >= NUM_REGS && gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p) /* The target, while using a 64-bit raw register buffer, is only transfering 32-bits of each integer register. Reflect this in the cooked/pseudo register value. */ return builtin_type_int32; else if (regnum > NUM_REGS && mips_saved_regsize (gdbarch) == 4) /* A 32-bit ABI such as o32 possibly running on a 64-bit ISA. */ return builtin_type_int32; else if (mips_regsize (gdbarch) == 8) /* 64-bit ISA. */ return builtin_type_int64; else /* 32-bit ISA. */ return builtin_type_int32; Andrew ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFA] mips 32/64 register/stack fix 2004-04-28 21:45 ` Andrew Cagney @ 2004-04-29 3:12 ` Daniel Jacobowitz 2004-04-29 13:40 ` Andrew Cagney 0 siblings, 1 reply; 17+ messages in thread From: Daniel Jacobowitz @ 2004-04-29 3:12 UTC (permalink / raw) To: Andrew Cagney; +Cc: Michael Snyder, gdb-patches, cagney On Wed, Apr 28, 2004 at 05:45:22PM -0400, Andrew Cagney wrote: > >Here's your tdep info: > >{elf_flags = 1610625025, mips_abi = MIPS_ABI_EABI32, > > I was looking to see if anything like that was present -> it is clearly > identified as a 32-bit ABI binary. > > I think the bug is in mips_register_type, the tail end should probably > be changed to read something like: > > else if (regnum >= NUM_REGS > && gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p) > /* The target, while using a 64-bit raw register buffer, is only > transfering 32-bits of each integer register. Reflect this in > the cooked/pseudo register value. */ > return builtin_type_int32; > else if (regnum > NUM_REGS > && mips_saved_regsize (gdbarch) == 4) > /* A 32-bit ABI such as o32 possibly running on a 64-bit ISA. */ > return builtin_type_int32; > else if (mips_regsize (gdbarch) == 8) > /* 64-bit ISA. */ > return builtin_type_int64; > else > /* 32-bit ISA. */ > return builtin_type_int32; Would you mind clarifying the reason for having mips_regsize, which is used in a number of other places, return a regsize based on the ISA? This change to mips_register_type conveys the fact that we've only got 32 bits of data. But we'll choose to print (in info registers) a 64-bit wide field for each GPR if the binary is tagged E_MIPS_ARCH_64 | E_MIPS_ABI_EABI32, and a 32-bit field if it's tagged E_MIPS_ARCH_2 | E_MIPS_ABI_EABI32. Conceptually, I think we're interested in some combination of the available register size (-> a property of the target) and the size of registers known to the inferior program (-> unclear mix of its ABI and ISA). -- Daniel Jacobowitz MontaVista Software Debian GNU/Linux Developer ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFA] mips 32/64 register/stack fix 2004-04-29 3:12 ` Daniel Jacobowitz @ 2004-04-29 13:40 ` Andrew Cagney 2004-04-29 14:34 ` Daniel Jacobowitz 2004-04-29 17:58 ` [RFA] mips 32/64 register/stack fix Michael Snyder 0 siblings, 2 replies; 17+ messages in thread From: Andrew Cagney @ 2004-04-29 13:40 UTC (permalink / raw) To: Daniel Jacobowitz; +Cc: Michael Snyder, gdb-patches, cagney > On Wed, Apr 28, 2004 at 05:45:22PM -0400, Andrew Cagney wrote: > >>>> >Here's your tdep info: >>>> >{elf_flags = 1610625025, mips_abi = MIPS_ABI_EABI32, >> >>> >>> I was looking to see if anything like that was present -> it is clearly >>> identified as a 32-bit ABI binary. >>> >>> I think the bug is in mips_register_type, the tail end should probably >>> be changed to read something like: >>> >>> else if (regnum >= NUM_REGS >>> && gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p) >>> /* The target, while using a 64-bit raw register buffer, is only >>> transfering 32-bits of each integer register. Reflect this in >>> the cooked/pseudo register value. */ >>> return builtin_type_int32; >>> else if (regnum > NUM_REGS >= NUM_REGS >>> && mips_saved_regsize (gdbarch) == 4) >>> /* A 32-bit ABI such as o32 possibly running on a 64-bit ISA. */ >>> return builtin_type_int32; >>> else if (mips_regsize (gdbarch) == 8) >>> /* 64-bit ISA. */ >>> return builtin_type_int64; >>> else >>> /* 32-bit ISA. */ >>> return builtin_type_int32; > > > Would you mind clarifying the reason for having mips_regsize, which is > used in a number of other places, return a regsize based on the ISA? Hasn't this all come up before? It's the register size of the underlying ISA, on top of which the ABI is implemented. I think I'll rename mips_regsize and mips_saved_regsize to clarify this. > This change to mips_register_type conveys the fact that we've only got > 32 bits of data. But we'll choose to print (in info registers) a > 64-bit wide field for each GPR if the binary is tagged E_MIPS_ARCH_64 | > E_MIPS_ABI_EABI32, and a 32-bit field if it's tagged E_MIPS_ARCH_2 | > E_MIPS_ABI_EABI32. Conceptually, I think we're interested in some > combination of the available register size (-> a property of the target) > and the size of registers known to the inferior program (-> unclear mix > of its ABI and ISA). It does? With the above it should always print a 32-bit GPR reflecting the 32-bit ABI. If you think it should display something else, look at user-regs which lets you implement registers using the frame register values (something psuedo registers can't handle). Andrew ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFA] mips 32/64 register/stack fix 2004-04-29 13:40 ` Andrew Cagney @ 2004-04-29 14:34 ` Daniel Jacobowitz 2004-04-29 18:32 ` [commit] mips_isa_regsize, mips_abi_regsize; Was: " Andrew Cagney 2004-04-29 17:58 ` [RFA] mips 32/64 register/stack fix Michael Snyder 1 sibling, 1 reply; 17+ messages in thread From: Daniel Jacobowitz @ 2004-04-29 14:34 UTC (permalink / raw) To: Andrew Cagney; +Cc: Michael Snyder, gdb-patches, cagney On Thu, Apr 29, 2004 at 09:40:23AM -0400, Andrew Cagney wrote: > >On Wed, Apr 28, 2004 at 05:45:22PM -0400, Andrew Cagney wrote: > > > >>>>>Here's your tdep info: > >>>>>{elf_flags = 1610625025, mips_abi = MIPS_ABI_EABI32, > >> > >>> > >>>I was looking to see if anything like that was present -> it is clearly > >>>identified as a 32-bit ABI binary. > >>> > >>>I think the bug is in mips_register_type, the tail end should probably > >>>be changed to read something like: > >>> > >>> else if (regnum >= NUM_REGS > >>> && gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p) > >>> /* The target, while using a 64-bit raw register buffer, is only > >>> transfering 32-bits of each integer register. Reflect this in > >>> the cooked/pseudo register value. */ > >>> return builtin_type_int32; > >>> else if (regnum > NUM_REGS > > >= NUM_REGS > > >>> && mips_saved_regsize (gdbarch) == 4) > >>> /* A 32-bit ABI such as o32 possibly running on a 64-bit ISA. */ > >>> return builtin_type_int32; > >>> else if (mips_regsize (gdbarch) == 8) > >>> /* 64-bit ISA. */ > >>> return builtin_type_int64; > >>> else > >>> /* 32-bit ISA. */ > >>> return builtin_type_int32; > > > > > >Would you mind clarifying the reason for having mips_regsize, which is > >used in a number of other places, return a regsize based on the ISA? > > Hasn't this all come up before? Yes, but obviously it hasn't been resolved :) I've dropped it a couple of times - got distracted. > It's the register size of the underlying ISA, on top of which the ABI is > implemented. I think I'll rename mips_regsize and mips_saved_regsize to > clarify this. Please. > >This change to mips_register_type conveys the fact that we've only got > >32 bits of data. But we'll choose to print (in info registers) a > >64-bit wide field for each GPR if the binary is tagged E_MIPS_ARCH_64 | > >E_MIPS_ABI_EABI32, and a 32-bit field if it's tagged E_MIPS_ARCH_2 | > >E_MIPS_ABI_EABI32. Conceptually, I think we're interested in some > >combination of the available register size (-> a property of the target) > >and the size of registers known to the inferior program (-> unclear mix > >of its ABI and ISA). > > It does? With the above it should always print a 32-bit GPR reflecting > the 32-bit ABI. If you think it should display something else, look at > user-regs which lets you implement registers using the frame register > values (something psuedo registers can't handle). It makes decisions based on mips_regsize. See print_gp_register_row. So does mips32_heuristic_proc_desc; which has probably been converted incorrectly at some point in the past, since it takes "8 - mips_regsize (current_gdbarch)" and wants 4 for N32. I think that whole block of code is bogus. Hmm, I was just using print_gp_register_row as an example - but it turns out to be the only example. Only the two functions above and mips_register_type reference mips_regsize now - and a bunch of NetBSD specific code which is almost certainly wrong. With the functions renamed, I guess it'll be much easier to spot the errors. -- Daniel Jacobowitz MontaVista Software Debian GNU/Linux Developer ^ permalink raw reply [flat|nested] 17+ messages in thread
* [commit] mips_isa_regsize, mips_abi_regsize; Was: [RFA] mips 32/64 register/stack fix 2004-04-29 14:34 ` Daniel Jacobowitz @ 2004-04-29 18:32 ` Andrew Cagney 2004-04-29 19:45 ` [commit] compute abi regsize; Was: Andrew Cagney 0 siblings, 1 reply; 17+ messages in thread From: Andrew Cagney @ 2004-04-29 18:32 UTC (permalink / raw) To: Daniel Jacobowitz, Michael Snyder; +Cc: gdb-patches, cagney [-- Attachment #1: Type: text/plain, Size: 315 bytes --] >>It's the register size of the underlying ISA, on top of which the ABI is >>> implemented. I think I'll rename mips_regsize and mips_saved_regsize to >>> clarify this. > > > Please. I've committed the attached - mips_isa_regsize and mips_abi_regsize. Hopefully this will help people spot the bugs. Andrew [-- Attachment #2: diffs --] [-- Type: text/plain, Size: 30699 bytes --] 2004-04-29 Andrew Cagney <cagney@redhat.com> * mips-tdep.c (mips_abi_regsize): Rename mips_saved_regsize. (mips_abi_regsize_string): Rename mips_saved_regsize_string. (struct gdbarch_tdep): Rename mips_default_saved_regsize to mips_default_abi_regsize. (mips_isa_regsize): Rename mips_regisze. * mipsnbsd-tdep.c: Update. * mips-linux-tdep.c: Update. * irix5-nat.c: Update. * mips-tdep.h (mips_isa_regsize): Update. Index: irix5-nat.c =================================================================== RCS file: /cvs/src/src/gdb/irix5-nat.c,v retrieving revision 1.30 diff -u -r1.30 irix5-nat.c --- irix5-nat.c 21 Apr 2004 17:47:10 -0000 1.30 +++ irix5-nat.c 29 Apr 2004 18:27:36 -0000 @@ -1,6 +1,8 @@ /* Native support for the SGI Iris running IRIX version 5, for GDB. - Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, - 1999, 2000, 2001, 2002 Free Software Foundation, Inc. + + Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, + 1998, 1999, 2000, 2001, 2002, 2004 Free Software Foundation, Inc. + Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin. Implemented for Irix 4.x by Garrett A. Wollman. @@ -56,7 +58,7 @@ { int regi; greg_t *regp = &(*gregsetp)[0]; - int gregoff = sizeof (greg_t) - mips_regsize (current_gdbarch); + int gregoff = sizeof (greg_t) - mips_isa_regsize (current_gdbarch); static char zerobuf[32] = {0}; for (regi = 0; regi <= CTX_RA; regi++) @@ -209,8 +211,8 @@ { memcpy ((char *) deprecated_registers, core_reg_sect, core_reg_size); } - else if (mips_regsize (current_gdbarch) == 4 && - core_reg_size == (2 * mips_regsize (current_gdbarch)) * NUM_REGS) + else if (mips_isa_regsize (current_gdbarch) == 4 && + core_reg_size == (2 * mips_isa_regsize (current_gdbarch)) * NUM_REGS) { /* This is a core file from a N32 executable, 64 bits are saved for all registers. */ Index: mips-linux-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/mips-linux-tdep.c,v retrieving revision 1.23 diff -u -r1.23 mips-linux-tdep.c --- mips-linux-tdep.c 21 Apr 2004 17:47:10 -0000 1.23 +++ mips-linux-tdep.c 29 Apr 2004 18:27:36 -0000 @@ -89,7 +89,8 @@ } /* Transform the bits comprising a 32-bit register to the right size - for supply_register(). This is needed when mips_regsize() is 8. */ + for supply_register(). This is needed when mips_isa_regsize() is + 8. */ static void supply_32bit_reg (int regnum, const void *addr) Index: mips-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/mips-tdep.c,v retrieving revision 1.288 diff -u -r1.288 mips-tdep.c --- mips-tdep.c 22 Apr 2004 21:10:56 -0000 1.288 +++ mips-tdep.c 29 Apr 2004 18:27:36 -0000 @@ -137,7 +137,7 @@ enum mips_fpu_type mips_fpu_type; int mips_last_arg_regnum; int mips_last_fp_arg_regnum; - int mips_default_saved_regsize; + int mips_default_abi_regsize; int mips_fp_register_double; int mips_default_stack_argsize; int default_mask_address_p; @@ -233,7 +233,7 @@ } int -mips_regsize (struct gdbarch *gdbarch) +mips_isa_regsize (struct gdbarch *gdbarch) { return (gdbarch_bfd_arch_info (gdbarch)->bits_per_word / gdbarch_bfd_arch_info (gdbarch)->bits_per_byte); @@ -241,16 +241,16 @@ /* Return the currently configured (or set) saved register size. */ -static const char *mips_saved_regsize_string = size_auto; +static const char *mips_abi_regsize_string = size_auto; static unsigned int -mips_saved_regsize (struct gdbarch_tdep *tdep) +mips_abi_regsize (struct gdbarch_tdep *tdep) { - if (mips_saved_regsize_string == size_auto) - return tdep->mips_default_saved_regsize; - else if (mips_saved_regsize_string == size_64) + if (mips_abi_regsize_string == size_auto) + return tdep->mips_default_abi_regsize; + else if (mips_abi_regsize_string == size_64) return 8; - else /* if (mips_saved_regsize_string == size_32) */ + else /* if (mips_abi_regsize_string == size_32) */ return 4; } @@ -369,7 +369,7 @@ #define FP_REGISTER_DOUBLE (gdbarch_tdep (current_gdbarch)->mips_fp_register_double) /* The amount of space reserved on the stack for registers. This is - different to MIPS_SAVED_REGSIZE as it determines the alignment of + different to MIPS_ABI_REGSIZE as it determines the alignment of data allocated after the registers have run out. */ static const char *mips_stack_argsize_string = size_auto; @@ -694,16 +694,16 @@ && (regnum % NUM_REGS) < mips_regnum (current_gdbarch)->fp0 + 32) { /* The floating-point registers raw, or cooked, always match - mips_regsize(), and also map 1:1, byte for byte. */ + mips_isa_regsize(), and also map 1:1, byte for byte. */ switch (gdbarch_byte_order (gdbarch)) { case BFD_ENDIAN_BIG: - if (mips_regsize (gdbarch) == 4) + if (mips_isa_regsize (gdbarch) == 4) return builtin_type_ieee_single_big; else return builtin_type_ieee_double_big; case BFD_ENDIAN_LITTLE: - if (mips_regsize (gdbarch) == 4) + if (mips_isa_regsize (gdbarch) == 4) return builtin_type_ieee_single_little; else return builtin_type_ieee_double_little; @@ -718,13 +718,13 @@ /* The pseudo/cooked view of the embedded registers is always 32-bit. The raw view is handled below. */ return builtin_type_int32; - else if (regnum >= NUM_REGS && mips_regsize (gdbarch) + else if (regnum >= NUM_REGS && mips_isa_regsize (gdbarch) && gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p) /* The target, while using a 64-bit register buffer, is only transfering 32-bits of each integer register. Reflect this in the cooked/pseudo register value. */ return builtin_type_int32; - else if (mips_regsize (gdbarch) == 8) + else if (mips_isa_regsize (gdbarch) == 8) /* 64-bit ISA. */ return builtin_type_int64; else @@ -1574,7 +1574,7 @@ if (gen_mask & 0x80000000) { cache->saved_regs[NUM_REGS + ireg].addr = reg_position; - reg_position -= mips_saved_regsize (tdep); + reg_position -= mips_abi_regsize (tdep); } } @@ -1595,7 +1595,7 @@ CORE_ADDR reg_position = (cache->base + PROC_REG_OFFSET (proc_desc)); if (inst & 0x20) - reg_position -= mips_saved_regsize (tdep); + reg_position -= mips_abi_regsize (tdep); /* Check if the s0 and s1 registers were pushed on the stack. */ @@ -1604,7 +1604,7 @@ for (reg = 16; reg < sreg_count + 16; reg++) { cache->saved_regs[NUM_REGS + reg].addr = reg_position; - reg_position -= mips_saved_regsize (tdep); + reg_position -= mips_abi_regsize (tdep); } } } @@ -1620,7 +1620,7 @@ for (ireg = MIPS_NUMREGS - 1; float_mask; --ireg, float_mask <<= 1) if (float_mask & 0x80000000) { - if (mips_saved_regsize (tdep) == 4 + if (mips_abi_regsize (tdep) == 4 && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) { /* On a big endian 32 bit ABI, floating point registers @@ -1647,15 +1647,15 @@ loop). */ if ((ireg & 1)) cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->fp0 + ireg] - .addr = reg_position - mips_saved_regsize (tdep); + .addr = reg_position - mips_abi_regsize (tdep); else cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->fp0 + ireg] - .addr = reg_position + mips_saved_regsize (tdep); + .addr = reg_position + mips_abi_regsize (tdep); } else cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->fp0 + ireg] .addr = reg_position; - reg_position -= mips_saved_regsize (tdep); + reg_position -= mips_abi_regsize (tdep); } cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->pc] @@ -2100,7 +2100,7 @@ { PROC_REG_MASK (&temp_proc_desc) |= 1 << reg; set_reg_offset (temp_saved_regs, reg, sp + offset); - offset += mips_saved_regsize (tdep); + offset += mips_abi_regsize (tdep); } /* Check if the ra register was pushed on the stack. */ @@ -2109,7 +2109,7 @@ { PROC_REG_MASK (&temp_proc_desc) |= 1 << RA_REGNUM; set_reg_offset (temp_saved_regs, RA_REGNUM, sp + offset); - offset -= mips_saved_regsize (tdep); + offset -= mips_abi_regsize (tdep); } /* Check if the s0 and s1 registers were pushed on the stack. */ @@ -2117,7 +2117,7 @@ { PROC_REG_MASK (&temp_proc_desc) |= 1 << reg; set_reg_offset (temp_saved_regs, reg, sp + offset); - offset -= mips_saved_regsize (tdep); + offset -= mips_abi_regsize (tdep); } } } @@ -2170,7 +2170,7 @@ for the saved register point to the lower 32 bits. */ PROC_REG_MASK (&temp_proc_desc) |= 1 << reg; set_reg_offset (temp_saved_regs, reg, - sp + low_word + 8 - mips_regsize (current_gdbarch)); + sp + low_word + 8 - mips_isa_regsize (current_gdbarch)); } else if (high_word == 0x27be) /* addiu $30,$sp,size */ { @@ -2675,22 +2675,22 @@ lo->reg = regnum + 0; hi->reg = regnum + 1; if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG - && len < mips_saved_regsize (tdep)) + && len < mips_abi_regsize (tdep)) { /* "un-left-justify" the value in the low register */ - lo->reg_offset = mips_saved_regsize (tdep) - len; + lo->reg_offset = mips_abi_regsize (tdep) - len; lo->len = len; hi->reg_offset = 0; hi->len = 0; } - else if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG && len > mips_saved_regsize (tdep) /* odd-size structs */ - && len < mips_saved_regsize (tdep) * 2 + else if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG && len > mips_abi_regsize (tdep) /* odd-size structs */ + && len < mips_abi_regsize (tdep) * 2 && (TYPE_CODE (valtype) == TYPE_CODE_STRUCT || TYPE_CODE (valtype) == TYPE_CODE_UNION)) { /* "un-left-justify" the value spread across two registers. */ - lo->reg_offset = 2 * mips_saved_regsize (tdep) - len; - lo->len = mips_saved_regsize (tdep) - lo->reg_offset; + lo->reg_offset = 2 * mips_abi_regsize (tdep) - len; + lo->len = mips_abi_regsize (tdep) - lo->reg_offset; hi->reg_offset = 0; hi->len = len - lo->len; } @@ -2699,10 +2699,10 @@ /* Only perform a partial copy of the second register. */ lo->reg_offset = 0; hi->reg_offset = 0; - if (len > mips_saved_regsize (tdep)) + if (len > mips_abi_regsize (tdep)) { - lo->len = mips_saved_regsize (tdep); - hi->len = len - mips_saved_regsize (tdep); + lo->len = mips_abi_regsize (tdep); + hi->len = len - mips_abi_regsize (tdep); } else { @@ -2712,7 +2712,7 @@ } if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG && register_size (current_gdbarch, regnum) == 8 - && mips_saved_regsize (tdep) == 4) + && mips_abi_regsize (tdep) == 4) { /* Account for the fact that only the least-signficant part of the register is being used */ @@ -2730,7 +2730,7 @@ mips_eabi_use_struct_convention (int gcc_p, struct type *type) { struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); - return (TYPE_LENGTH (type) > 2 * mips_saved_regsize (tdep)); + return (TYPE_LENGTH (type) > 2 * mips_abi_regsize (tdep)); } /* Should call_function pass struct by reference? @@ -2745,7 +2745,7 @@ struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION) - return (len > mips_saved_regsize (tdep)); + return (len > mips_abi_regsize (tdep)); return 0; } @@ -2826,13 +2826,13 @@ /* The EABI passes structures that do not fit in a register by reference. */ - if (len > mips_saved_regsize (tdep) + if (len > mips_abi_regsize (tdep) && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)) { - store_unsigned_integer (valbuf, mips_saved_regsize (tdep), + store_unsigned_integer (valbuf, mips_abi_regsize (tdep), VALUE_ADDRESS (arg)); typecode = TYPE_CODE_PTR; - len = mips_saved_regsize (tdep); + len = mips_abi_regsize (tdep); val = valbuf; if (mips_debug) fprintf_unfiltered (gdb_stdlog, " push"); @@ -2904,12 +2904,12 @@ register-sized pieces. Large arguments are split between registers and stack. */ /* Note: structs whose size is not a multiple of - mips_regsize() are treated specially: Irix cc passes them + mips_isa_regsize() are treated specially: Irix cc passes them in registers where gcc sometimes puts them on the stack. For maximum compatibility, we will put them in both places. */ - int odd_sized_struct = ((len > mips_saved_regsize (tdep)) - && (len % mips_saved_regsize (tdep) != 0)); + int odd_sized_struct = ((len > mips_abi_regsize (tdep)) + && (len % mips_abi_regsize (tdep) != 0)); /* Note: Floating-point values that didn't fit into an FP register are only written to memory. */ @@ -2917,8 +2917,8 @@ { /* Remember if the argument was written to the stack. */ int stack_used_p = 0; - int partial_len = (len < mips_saved_regsize (tdep) - ? len : mips_saved_regsize (tdep)); + int partial_len = (len < mips_abi_regsize (tdep) + ? len : mips_abi_regsize (tdep)); if (mips_debug) fprintf_unfiltered (gdb_stdlog, " -- partial=%d", @@ -2987,7 +2987,7 @@ fprintf_filtered (gdb_stdlog, " - reg=%d val=%s", argreg, phex (regval, - mips_saved_regsize (tdep))); + mips_abi_regsize (tdep))); write_register (argreg, regval); argreg++; } @@ -3165,20 +3165,20 @@ register-sized pieces. Large arguments are split between registers and stack. */ /* Note: structs whose size is not a multiple of - mips_regsize() are treated specially: Irix cc passes them + mips_isa_regsize() are treated specially: Irix cc passes them in registers where gcc sometimes puts them on the stack. For maximum compatibility, we will put them in both places. */ - int odd_sized_struct = ((len > mips_saved_regsize (tdep)) - && (len % mips_saved_regsize (tdep) != 0)); + int odd_sized_struct = ((len > mips_abi_regsize (tdep)) + && (len % mips_abi_regsize (tdep) != 0)); /* Note: Floating-point values that didn't fit into an FP register are only written to memory. */ while (len > 0) { /* Rememer if the argument was written to the stack. */ int stack_used_p = 0; - int partial_len = (len < mips_saved_regsize (tdep) - ? len : mips_saved_regsize (tdep)); + int partial_len = (len < mips_abi_regsize (tdep) + ? len : mips_abi_regsize (tdep)); if (mips_debug) fprintf_unfiltered (gdb_stdlog, " -- partial=%d", @@ -3249,10 +3249,10 @@ cagney/2001-07-23: gdb/179: Also, GCC, when outputting LE O32 with sizeof (struct) < - mips_saved_regsize(), generates a left shift as + mips_abi_regsize(), generates a left shift as part of storing the argument in a register a register (the left shift isn't generated when - sizeof (struct) >= mips_saved_regsize()). Since + sizeof (struct) >= mips_abi_regsize()). Since it is quite possible that this is GCC contradicting the LE/O32 ABI, GDB has not been adjusted to accommodate this. Either someone @@ -3262,17 +3262,17 @@ accordingly. */ if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG - && partial_len < mips_saved_regsize (tdep) + && partial_len < mips_abi_regsize (tdep) && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)) - regval <<= ((mips_saved_regsize (tdep) - partial_len) * + regval <<= ((mips_abi_regsize (tdep) - partial_len) * TARGET_CHAR_BIT); if (mips_debug) fprintf_filtered (gdb_stdlog, " - reg=%d val=%s", argreg, phex (regval, - mips_saved_regsize (tdep))); + mips_abi_regsize (tdep))); write_register (argreg, regval); argreg++; } @@ -3310,7 +3310,7 @@ if (TYPE_CODE (type) == TYPE_CODE_STRUCT || TYPE_CODE (type) == TYPE_CODE_UNION || TYPE_CODE (type) == TYPE_CODE_ARRAY - || TYPE_LENGTH (type) > 2 * mips_saved_regsize (tdep)) + || TYPE_LENGTH (type) > 2 * mips_abi_regsize (tdep)) return RETURN_VALUE_STRUCT_CONVENTION; else if (TYPE_CODE (type) == TYPE_CODE_FLT && tdep->mips_fpu_type != MIPS_FPU_NONE) @@ -3561,15 +3561,15 @@ register-sized pieces. Large arguments are split between registers and stack. */ /* Note: structs whose size is not a multiple of - mips_regsize() are treated specially: Irix cc passes them + mips_isa_regsize() are treated specially: Irix cc passes them in registers where gcc sometimes puts them on the stack. For maximum compatibility, we will put them in both places. */ - int odd_sized_struct = ((len > mips_saved_regsize (tdep)) - && (len % mips_saved_regsize (tdep) != 0)); + int odd_sized_struct = ((len > mips_abi_regsize (tdep)) + && (len % mips_abi_regsize (tdep) != 0)); /* Structures should be aligned to eight bytes (even arg registers) on MIPS_ABI_O32, if their first member has double precision. */ - if (mips_saved_regsize (tdep) < 8 + if (mips_abi_regsize (tdep) < 8 && mips_type_needs_double_align (arg_type)) { if ((argreg & 1)) @@ -3581,8 +3581,8 @@ { /* Remember if the argument was written to the stack. */ int stack_used_p = 0; - int partial_len = (len < mips_saved_regsize (tdep) - ? len : mips_saved_regsize (tdep)); + int partial_len = (len < mips_abi_regsize (tdep) + ? len : mips_abi_regsize (tdep)); if (mips_debug) fprintf_unfiltered (gdb_stdlog, " -- partial=%d", @@ -3641,7 +3641,7 @@ { LONGEST regval = extract_signed_integer (val, partial_len); /* Value may need to be sign extended, because - mips_regsize() != mips_saved_regsize(). */ + mips_isa_regsize() != mips_abi_regsize(). */ /* A non-floating-point argument being passed in a general register. If a struct or union, and if @@ -3656,10 +3656,10 @@ cagney/2001-07-23: gdb/179: Also, GCC, when outputting LE O32 with sizeof (struct) < - mips_saved_regsize(), generates a left shift as + mips_abi_regsize(), generates a left shift as part of storing the argument in a register a register (the left shift isn't generated when - sizeof (struct) >= mips_saved_regsize()). Since + sizeof (struct) >= mips_abi_regsize()). Since it is quite possible that this is GCC contradicting the LE/O32 ABI, GDB has not been adjusted to accommodate this. Either someone @@ -3668,19 +3668,19 @@ identified as such and GDB gets tweaked accordingly. */ - if (mips_saved_regsize (tdep) < 8 + if (mips_abi_regsize (tdep) < 8 && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG - && partial_len < mips_saved_regsize (tdep) + && partial_len < mips_abi_regsize (tdep) && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)) - regval <<= ((mips_saved_regsize (tdep) - partial_len) * + regval <<= ((mips_abi_regsize (tdep) - partial_len) * TARGET_CHAR_BIT); if (mips_debug) fprintf_filtered (gdb_stdlog, " - reg=%d val=%s", argreg, phex (regval, - mips_saved_regsize (tdep))); + mips_abi_regsize (tdep))); write_register (argreg, regval); argreg++; @@ -4013,15 +4013,15 @@ register-sized pieces. Large arguments are split between registers and stack. */ /* Note: structs whose size is not a multiple of - mips_regsize() are treated specially: Irix cc passes them + mips_isa_regsize() are treated specially: Irix cc passes them in registers where gcc sometimes puts them on the stack. For maximum compatibility, we will put them in both places. */ - int odd_sized_struct = ((len > mips_saved_regsize (tdep)) - && (len % mips_saved_regsize (tdep) != 0)); + int odd_sized_struct = ((len > mips_abi_regsize (tdep)) + && (len % mips_abi_regsize (tdep) != 0)); /* Structures should be aligned to eight bytes (even arg registers) on MIPS_ABI_O32, if their first member has double precision. */ - if (mips_saved_regsize (tdep) < 8 + if (mips_abi_regsize (tdep) < 8 && mips_type_needs_double_align (arg_type)) { if ((argreg & 1)) @@ -4033,8 +4033,8 @@ { /* Remember if the argument was written to the stack. */ int stack_used_p = 0; - int partial_len = (len < mips_saved_regsize (tdep) - ? len : mips_saved_regsize (tdep)); + int partial_len = (len < mips_abi_regsize (tdep) + ? len : mips_abi_regsize (tdep)); if (mips_debug) fprintf_unfiltered (gdb_stdlog, " -- partial=%d", @@ -4093,7 +4093,7 @@ { LONGEST regval = extract_signed_integer (val, partial_len); /* Value may need to be sign extended, because - mips_regsize() != mips_saved_regsize(). */ + mips_isa_regsize() != mips_abi_regsize(). */ /* A non-floating-point argument being passed in a general register. If a struct or union, and if @@ -4108,10 +4108,10 @@ cagney/2001-07-23: gdb/179: Also, GCC, when outputting LE O32 with sizeof (struct) < - mips_saved_regsize(), generates a left shift as + mips_abi_regsize(), generates a left shift as part of storing the argument in a register a register (the left shift isn't generated when - sizeof (struct) >= mips_saved_regsize()). Since + sizeof (struct) >= mips_abi_regsize()). Since it is quite possible that this is GCC contradicting the LE/O32 ABI, GDB has not been adjusted to accommodate this. Either someone @@ -4120,19 +4120,19 @@ identified as such and GDB gets tweaked accordingly. */ - if (mips_saved_regsize (tdep) < 8 + if (mips_abi_regsize (tdep) < 8 && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG - && partial_len < mips_saved_regsize (tdep) + && partial_len < mips_abi_regsize (tdep) && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)) - regval <<= ((mips_saved_regsize (tdep) - partial_len) * + regval <<= ((mips_abi_regsize (tdep) - partial_len) * TARGET_CHAR_BIT); if (mips_debug) fprintf_filtered (gdb_stdlog, " - reg=%d val=%s", argreg, phex (regval, - mips_saved_regsize (tdep))); + mips_abi_regsize (tdep))); write_register (argreg, regval); argreg++; @@ -4467,7 +4467,7 @@ struct gdbarch *gdbarch = get_frame_arch (frame); /* do values for GP (int) regs */ char raw_buffer[MAX_REGISTER_SIZE]; - int ncols = (mips_regsize (gdbarch) == 8 ? 4 : 8); /* display cols per row */ + int ncols = (mips_isa_regsize (gdbarch) == 8 ? 4 : 8); /* display cols per row */ int col, byte; int regnum; @@ -4482,7 +4482,7 @@ TYPE_CODE_FLT) break; /* end the row: reached FP register */ fprintf_filtered (file, - mips_regsize (current_gdbarch) == 8 ? "%17s" : "%9s", + mips_isa_regsize (current_gdbarch) == 8 ? "%17s" : "%9s", REGISTER_NAME (regnum)); col++; } @@ -4506,7 +4506,7 @@ error ("can't read register %d (%s)", regnum, REGISTER_NAME (regnum)); /* pad small registers */ for (byte = 0; - byte < (mips_regsize (current_gdbarch) + byte < (mips_isa_regsize (current_gdbarch) - register_size (current_gdbarch, regnum)); byte++) printf_filtered (" "); /* Now print the register value in hex, endian order. */ @@ -5614,7 +5614,7 @@ case MIPS_ABI_O32: set_gdbarch_push_dummy_call (gdbarch, mips_o32_push_dummy_call); set_gdbarch_return_value (gdbarch, mips_o32_return_value); - tdep->mips_default_saved_regsize = 4; + tdep->mips_default_abi_regsize = 4; tdep->mips_default_stack_argsize = 4; tdep->mips_fp_register_double = 0; tdep->mips_last_arg_regnum = A0_REGNUM + 4 - 1; @@ -5630,7 +5630,7 @@ mips_o64_store_return_value); set_gdbarch_deprecated_extract_return_value (gdbarch, mips_o64_extract_return_value); - tdep->mips_default_saved_regsize = 8; + tdep->mips_default_abi_regsize = 8; tdep->mips_default_stack_argsize = 8; tdep->mips_fp_register_double = 1; tdep->mips_last_arg_regnum = A0_REGNUM + 4 - 1; @@ -5648,7 +5648,7 @@ mips_eabi_store_return_value); set_gdbarch_deprecated_extract_return_value (gdbarch, mips_eabi_extract_return_value); - tdep->mips_default_saved_regsize = 4; + tdep->mips_default_abi_regsize = 4; tdep->mips_default_stack_argsize = 4; tdep->mips_fp_register_double = 0; tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1; @@ -5668,7 +5668,7 @@ mips_eabi_store_return_value); set_gdbarch_deprecated_extract_return_value (gdbarch, mips_eabi_extract_return_value); - tdep->mips_default_saved_regsize = 8; + tdep->mips_default_abi_regsize = 8; tdep->mips_default_stack_argsize = 8; tdep->mips_fp_register_double = 1; tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1; @@ -5685,7 +5685,7 @@ case MIPS_ABI_N32: set_gdbarch_push_dummy_call (gdbarch, mips_n32n64_push_dummy_call); set_gdbarch_return_value (gdbarch, mips_n32n64_return_value); - tdep->mips_default_saved_regsize = 8; + tdep->mips_default_abi_regsize = 8; tdep->mips_default_stack_argsize = 8; tdep->mips_fp_register_double = 1; tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1; @@ -5698,7 +5698,7 @@ case MIPS_ABI_N64: set_gdbarch_push_dummy_call (gdbarch, mips_n32n64_push_dummy_call); set_gdbarch_return_value (gdbarch, mips_n32n64_return_value); - tdep->mips_default_saved_regsize = 8; + tdep->mips_default_abi_regsize = 8; tdep->mips_default_stack_argsize = 8; tdep->mips_fp_register_double = 1; tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1; @@ -5986,8 +5986,8 @@ fprintf_unfiltered (file, "mips_dump_tdep: MIPS_NUMREGS = %d\n", MIPS_NUMREGS); fprintf_unfiltered (file, - "mips_dump_tdep: mips_saved_regsize() = %d\n", - mips_saved_regsize (tdep)); + "mips_dump_tdep: mips_abi_regsize() = %d\n", + mips_abi_regsize (tdep)); fprintf_unfiltered (file, "mips_dump_tdep: PRID_REGNUM = %d\n", PRID_REGNUM); fprintf_unfiltered (file, @@ -6121,7 +6121,7 @@ add_show_from_set (add_set_enum_cmd ("saved-gpreg-size", class_obscure, size_enums, - &mips_saved_regsize_string, "\ + &mips_abi_regsize_string, "\ Set size of general purpose registers saved on the stack.\n\ This option can be set to one of:\n\ 32 - Force GDB to treat saved GP registers as 32-bit\n\ Index: mips-tdep.h =================================================================== RCS file: /cvs/src/src/gdb/mips-tdep.h,v retrieving revision 1.6 diff -u -r1.6 mips-tdep.h --- mips-tdep.h 16 Nov 2003 22:46:49 -0000 1.6 +++ mips-tdep.h 29 Apr 2004 18:27:36 -0000 @@ -43,9 +43,9 @@ /* For wince :-(. */ extern CORE_ADDR mips_next_pc (CORE_ADDR pc); -/* Return the "MIPS" register size. Just a short cut to the BFD +/* Return the MIPS ISA's register size. Just a short cut to the BFD architecture's word size. */ -extern int mips_regsize (struct gdbarch *gdbarch); +extern int mips_isa_regsize (struct gdbarch *gdbarch); /* Return the current index for various MIPS registers. */ struct mips_regnum Index: mipsnbsd-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/mipsnbsd-tdep.c,v retrieving revision 1.11 diff -u -r1.11 mipsnbsd-tdep.c --- mipsnbsd-tdep.c 21 Apr 2004 17:47:10 -0000 1.11 +++ mipsnbsd-tdep.c 29 Apr 2004 18:27:36 -0000 @@ -47,7 +47,7 @@ if (CANNOT_FETCH_REGISTER (i)) supply_register (i, NULL); else - supply_register (i, regs + (i * mips_regsize (current_gdbarch))); + supply_register (i, regs + (i * mips_isa_regsize (current_gdbarch))); } } } @@ -59,7 +59,7 @@ for (i = 0; i <= PC_REGNUM; i++) if ((regno == i || regno == -1) && ! CANNOT_STORE_REGISTER (i)) - regcache_collect (i, regs + (i * mips_regsize (current_gdbarch))); + regcache_collect (i, regs + (i * mips_isa_regsize (current_gdbarch))); } void @@ -76,7 +76,7 @@ if (CANNOT_FETCH_REGISTER (i)) supply_register (i, NULL); else - supply_register (i, fpregs + ((i - FP0_REGNUM) * mips_regsize (current_gdbarch))); + supply_register (i, fpregs + ((i - FP0_REGNUM) * mips_isa_regsize (current_gdbarch))); } } } @@ -89,7 +89,7 @@ for (i = FP0_REGNUM; i <= mips_regnum (current_gdbarch)->fp_control_status; i++) if ((regno == i || regno == -1) && ! CANNOT_STORE_REGISTER (i)) - regcache_collect (i, fpregs + ((i - FP0_REGNUM) * mips_regsize (current_gdbarch))); + regcache_collect (i, fpregs + ((i - FP0_REGNUM) * mips_isa_regsize (current_gdbarch))); } static void @@ -236,7 +236,7 @@ success. */ #define NBSD_MIPS_JB_PC (2 * 4) -#define NBSD_MIPS_JB_ELEMENT_SIZE mips_regsize (current_gdbarch) +#define NBSD_MIPS_JB_ELEMENT_SIZE mips_isa_regsize (current_gdbarch) #define NBSD_MIPS_JB_OFFSET (NBSD_MIPS_JB_PC * \ NBSD_MIPS_JB_ELEMENT_SIZE) Index: mipsnbsd-tdep.h =================================================================== RCS file: /cvs/src/src/gdb/mipsnbsd-tdep.h,v retrieving revision 1.2 diff -u -r1.2 mipsnbsd-tdep.h --- mipsnbsd-tdep.h 15 Nov 2003 22:09:06 -0000 1.2 +++ mipsnbsd-tdep.h 29 Apr 2004 18:27:36 -0000 @@ -1,5 +1,6 @@ /* Common target dependent code for GDB on MIPS systems running NetBSD. - Copyright 2002 Free Software Foundation, Inc. + + Copyright 2002, 2004 Free Software Foundation, Inc. This file is part of GDB. @@ -27,7 +28,7 @@ void mipsnbsd_supply_fpreg (char *, int); void mipsnbsd_fill_fpreg (char *, int); -#define SIZEOF_STRUCT_REG (38 * mips_regsize (current_gdbarch)) -#define SIZEOF_STRUCT_FPREG (33 * mips_regsize (current_gdbarch)) +#define SIZEOF_STRUCT_REG (38 * mips_isa_regsize (current_gdbarch)) +#define SIZEOF_STRUCT_FPREG (33 * mips_isa_regsize (current_gdbarch)) #endif /* MIPSNBSD_TDEP_H */ ^ permalink raw reply [flat|nested] 17+ messages in thread
* [commit] compute abi regsize; Was: ... 2004-04-29 18:32 ` [commit] mips_isa_regsize, mips_abi_regsize; Was: " Andrew Cagney @ 2004-04-29 19:45 ` Andrew Cagney 0 siblings, 0 replies; 17+ messages in thread From: Andrew Cagney @ 2004-04-29 19:45 UTC (permalink / raw) To: Andrew Cagney; +Cc: Daniel Jacobowitz, Michael Snyder, gdb-patches, cagney [-- Attachment #1: Type: text/plain, Size: 241 bytes --] Hello, Here's a second cleanup. It computes mips_isa_regsize() and mips_stack_argsize() using mips_abi(). I'm actually tempted to delete mips_stack_argsize() and for that matter FP_REGISTER_DOUBLE as I think both are redundant. Andrew [-- Attachment #2: diffs --] [-- Type: text/plain, Size: 26658 bytes --] 2004-04-29 Andrew Cagney <cagney@redhat.com> * mips-tdep.c (mips_abi_regsize): Replace tdep parameter with gdbarch, use mips_abi, update callers. (mips_stack_argsize): Replace tdep parameter with gdbarch, use mips_abi_regsize, update callers. (struct gdbarch_tdep): Delete mips_default_stack_argsize and mips_default_abi_regsize. (mips_gdbarch_init): Do not set mips_default_stack_argsize and mips_default_abi_regsize. Index: mips-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/mips-tdep.c,v retrieving revision 1.289 diff -p -u -r1.289 mips-tdep.c --- mips-tdep.c 29 Apr 2004 18:28:42 -0000 1.289 +++ mips-tdep.c 29 Apr 2004 19:35:18 -0000 @@ -137,9 +137,7 @@ struct gdbarch_tdep enum mips_fpu_type mips_fpu_type; int mips_last_arg_regnum; int mips_last_fp_arg_regnum; - int mips_default_abi_regsize; int mips_fp_register_double; - int mips_default_stack_argsize; int default_mask_address_p; /* Is the target using 64-bit raw integer registers but only storing a left-aligned 32-bit value in each? */ @@ -244,10 +242,24 @@ mips_isa_regsize (struct gdbarch *gdbarc static const char *mips_abi_regsize_string = size_auto; static unsigned int -mips_abi_regsize (struct gdbarch_tdep *tdep) +mips_abi_regsize (struct gdbarch *gdbarch) { if (mips_abi_regsize_string == size_auto) - return tdep->mips_default_abi_regsize; + switch (mips_abi (gdbarch)) + { + case MIPS_ABI_EABI32: + case MIPS_ABI_O32: + return 4; + case MIPS_ABI_N32: + case MIPS_ABI_N64: + case MIPS_ABI_O64: + case MIPS_ABI_EABI64: + return 8; + case MIPS_ABI_UNKNOWN: + case MIPS_ABI_LAST: + default: + internal_error (__FILE__, __LINE__, "bad switch"); + } else if (mips_abi_regsize_string == size_64) return 8; else /* if (mips_abi_regsize_string == size_32) */ @@ -375,10 +387,10 @@ mips2_fp_compat (void) static const char *mips_stack_argsize_string = size_auto; static unsigned int -mips_stack_argsize (struct gdbarch_tdep *tdep) +mips_stack_argsize (struct gdbarch *gdbarch) { if (mips_stack_argsize_string == size_auto) - return tdep->mips_default_stack_argsize; + return mips_abi_regsize (gdbarch); else if (mips_stack_argsize_string == size_64) return 8; else /* if (mips_stack_argsize_string == size_32) */ @@ -1574,7 +1586,7 @@ mips_mdebug_frame_cache (struct frame_in if (gen_mask & 0x80000000) { cache->saved_regs[NUM_REGS + ireg].addr = reg_position; - reg_position -= mips_abi_regsize (tdep); + reg_position -= mips_abi_regsize (gdbarch); } } @@ -1595,7 +1607,7 @@ mips_mdebug_frame_cache (struct frame_in CORE_ADDR reg_position = (cache->base + PROC_REG_OFFSET (proc_desc)); if (inst & 0x20) - reg_position -= mips_abi_regsize (tdep); + reg_position -= mips_abi_regsize (gdbarch); /* Check if the s0 and s1 registers were pushed on the stack. */ @@ -1604,7 +1616,7 @@ mips_mdebug_frame_cache (struct frame_in for (reg = 16; reg < sreg_count + 16; reg++) { cache->saved_regs[NUM_REGS + reg].addr = reg_position; - reg_position -= mips_abi_regsize (tdep); + reg_position -= mips_abi_regsize (gdbarch); } } } @@ -1620,7 +1632,7 @@ mips_mdebug_frame_cache (struct frame_in for (ireg = MIPS_NUMREGS - 1; float_mask; --ireg, float_mask <<= 1) if (float_mask & 0x80000000) { - if (mips_abi_regsize (tdep) == 4 + if (mips_abi_regsize (gdbarch) == 4 && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) { /* On a big endian 32 bit ABI, floating point registers @@ -1647,15 +1659,15 @@ mips_mdebug_frame_cache (struct frame_in loop). */ if ((ireg & 1)) cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->fp0 + ireg] - .addr = reg_position - mips_abi_regsize (tdep); + .addr = reg_position - mips_abi_regsize (gdbarch); else cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->fp0 + ireg] - .addr = reg_position + mips_abi_regsize (tdep); + .addr = reg_position + mips_abi_regsize (gdbarch); } else cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->fp0 + ireg] .addr = reg_position; - reg_position -= mips_abi_regsize (tdep); + reg_position -= mips_abi_regsize (gdbarch); } cache->saved_regs[NUM_REGS + mips_regnum (current_gdbarch)->pc] @@ -2100,7 +2112,7 @@ mips16_heuristic_proc_desc (CORE_ADDR st { PROC_REG_MASK (&temp_proc_desc) |= 1 << reg; set_reg_offset (temp_saved_regs, reg, sp + offset); - offset += mips_abi_regsize (tdep); + offset += mips_abi_regsize (current_gdbarch); } /* Check if the ra register was pushed on the stack. */ @@ -2109,7 +2121,7 @@ mips16_heuristic_proc_desc (CORE_ADDR st { PROC_REG_MASK (&temp_proc_desc) |= 1 << RA_REGNUM; set_reg_offset (temp_saved_regs, RA_REGNUM, sp + offset); - offset -= mips_abi_regsize (tdep); + offset -= mips_abi_regsize (current_gdbarch); } /* Check if the s0 and s1 registers were pushed on the stack. */ @@ -2117,7 +2129,7 @@ mips16_heuristic_proc_desc (CORE_ADDR st { PROC_REG_MASK (&temp_proc_desc) |= 1 << reg; set_reg_offset (temp_saved_regs, reg, sp + offset); - offset -= mips_abi_regsize (tdep); + offset -= mips_abi_regsize (current_gdbarch); } } } @@ -2675,22 +2687,22 @@ return_value_location (struct type *valt lo->reg = regnum + 0; hi->reg = regnum + 1; if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG - && len < mips_abi_regsize (tdep)) + && len < mips_abi_regsize (current_gdbarch)) { /* "un-left-justify" the value in the low register */ - lo->reg_offset = mips_abi_regsize (tdep) - len; + lo->reg_offset = mips_abi_regsize (current_gdbarch) - len; lo->len = len; hi->reg_offset = 0; hi->len = 0; } - else if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG && len > mips_abi_regsize (tdep) /* odd-size structs */ - && len < mips_abi_regsize (tdep) * 2 + else if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG && len > mips_abi_regsize (current_gdbarch) /* odd-size structs */ + && len < mips_abi_regsize (current_gdbarch) * 2 && (TYPE_CODE (valtype) == TYPE_CODE_STRUCT || TYPE_CODE (valtype) == TYPE_CODE_UNION)) { /* "un-left-justify" the value spread across two registers. */ - lo->reg_offset = 2 * mips_abi_regsize (tdep) - len; - lo->len = mips_abi_regsize (tdep) - lo->reg_offset; + lo->reg_offset = 2 * mips_abi_regsize (current_gdbarch) - len; + lo->len = mips_abi_regsize (current_gdbarch) - lo->reg_offset; hi->reg_offset = 0; hi->len = len - lo->len; } @@ -2699,10 +2711,10 @@ return_value_location (struct type *valt /* Only perform a partial copy of the second register. */ lo->reg_offset = 0; hi->reg_offset = 0; - if (len > mips_abi_regsize (tdep)) + if (len > mips_abi_regsize (current_gdbarch)) { - lo->len = mips_abi_regsize (tdep); - hi->len = len - mips_abi_regsize (tdep); + lo->len = mips_abi_regsize (current_gdbarch); + hi->len = len - mips_abi_regsize (current_gdbarch); } else { @@ -2712,7 +2724,7 @@ return_value_location (struct type *valt } if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG && register_size (current_gdbarch, regnum) == 8 - && mips_abi_regsize (tdep) == 4) + && mips_abi_regsize (current_gdbarch) == 4) { /* Account for the fact that only the least-signficant part of the register is being used */ @@ -2730,7 +2742,7 @@ static int mips_eabi_use_struct_convention (int gcc_p, struct type *type) { struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); - return (TYPE_LENGTH (type) > 2 * mips_abi_regsize (tdep)); + return (TYPE_LENGTH (type) > 2 * mips_abi_regsize (current_gdbarch)); } /* Should call_function pass struct by reference? @@ -2745,7 +2757,7 @@ mips_eabi_reg_struct_has_addr (int gcc_p struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION) - return (len > mips_abi_regsize (tdep)); + return (len > mips_abi_regsize (current_gdbarch)); return 0; } @@ -2785,7 +2797,7 @@ mips_eabi_push_dummy_call (struct gdbarc passed in registers, but that's OK. */ for (argnum = 0; argnum < nargs; argnum++) len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])), - mips_stack_argsize (tdep)); + mips_stack_argsize (gdbarch)); sp -= align_up (len, 16); if (mips_debug) @@ -2826,13 +2838,13 @@ mips_eabi_push_dummy_call (struct gdbarc /* The EABI passes structures that do not fit in a register by reference. */ - if (len > mips_abi_regsize (tdep) + if (len > mips_abi_regsize (gdbarch) && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)) { - store_unsigned_integer (valbuf, mips_abi_regsize (tdep), + store_unsigned_integer (valbuf, mips_abi_regsize (gdbarch), VALUE_ADDRESS (arg)); typecode = TYPE_CODE_PTR; - len = mips_abi_regsize (tdep); + len = mips_abi_regsize (gdbarch); val = valbuf; if (mips_debug) fprintf_unfiltered (gdb_stdlog, " push"); @@ -2908,8 +2920,8 @@ mips_eabi_push_dummy_call (struct gdbarc in registers where gcc sometimes puts them on the stack. For maximum compatibility, we will put them in both places. */ - int odd_sized_struct = ((len > mips_abi_regsize (tdep)) - && (len % mips_abi_regsize (tdep) != 0)); + int odd_sized_struct = ((len > mips_abi_regsize (gdbarch)) + && (len % mips_abi_regsize (gdbarch) != 0)); /* Note: Floating-point values that didn't fit into an FP register are only written to memory. */ @@ -2917,8 +2929,8 @@ mips_eabi_push_dummy_call (struct gdbarc { /* Remember if the argument was written to the stack. */ int stack_used_p = 0; - int partial_len = (len < mips_abi_regsize (tdep) - ? len : mips_abi_regsize (tdep)); + int partial_len = (len < mips_abi_regsize (gdbarch) + ? len : mips_abi_regsize (gdbarch)); if (mips_debug) fprintf_unfiltered (gdb_stdlog, " -- partial=%d", @@ -2936,16 +2948,16 @@ mips_eabi_push_dummy_call (struct gdbarc stack_used_p = 1; if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) { - if (mips_stack_argsize (tdep) == 8 + if (mips_stack_argsize (gdbarch) == 8 && (typecode == TYPE_CODE_INT || typecode == TYPE_CODE_PTR || typecode == TYPE_CODE_FLT) && len <= 4) - longword_offset = mips_stack_argsize (tdep) - len; + longword_offset = mips_stack_argsize (gdbarch) - len; else if ((typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION) && (TYPE_LENGTH (arg_type) - < mips_stack_argsize (tdep))) - longword_offset = mips_stack_argsize (tdep) - len; + < mips_stack_argsize (gdbarch))) + longword_offset = mips_stack_argsize (gdbarch) - len; } if (mips_debug) @@ -2987,7 +2999,7 @@ mips_eabi_push_dummy_call (struct gdbarc fprintf_filtered (gdb_stdlog, " - reg=%d val=%s", argreg, phex (regval, - mips_abi_regsize (tdep))); + mips_abi_regsize (gdbarch))); write_register (argreg, regval); argreg++; } @@ -3003,7 +3015,7 @@ mips_eabi_push_dummy_call (struct gdbarc if (stack_used_p) stack_offset += align_up (partial_len, - mips_stack_argsize (tdep)); + mips_stack_argsize (gdbarch)); } } if (mips_debug) @@ -3100,7 +3112,7 @@ mips_n32n64_push_dummy_call (struct gdba /* Now make space on the stack for the args. */ for (argnum = 0; argnum < nargs; argnum++) len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])), - mips_stack_argsize (tdep)); + mips_stack_argsize (gdbarch)); sp -= align_up (len, 16); if (mips_debug) @@ -3169,16 +3181,16 @@ mips_n32n64_push_dummy_call (struct gdba in registers where gcc sometimes puts them on the stack. For maximum compatibility, we will put them in both places. */ - int odd_sized_struct = ((len > mips_abi_regsize (tdep)) - && (len % mips_abi_regsize (tdep) != 0)); + int odd_sized_struct = ((len > mips_abi_regsize (gdbarch)) + && (len % mips_abi_regsize (gdbarch) != 0)); /* Note: Floating-point values that didn't fit into an FP register are only written to memory. */ while (len > 0) { /* Rememer if the argument was written to the stack. */ int stack_used_p = 0; - int partial_len = (len < mips_abi_regsize (tdep) - ? len : mips_abi_regsize (tdep)); + int partial_len = (len < mips_abi_regsize (gdbarch) + ? len : mips_abi_regsize (gdbarch)); if (mips_debug) fprintf_unfiltered (gdb_stdlog, " -- partial=%d", @@ -3196,11 +3208,11 @@ mips_n32n64_push_dummy_call (struct gdba stack_used_p = 1; if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) { - if (mips_stack_argsize (tdep) == 8 + if (mips_stack_argsize (gdbarch) == 8 && (typecode == TYPE_CODE_INT || typecode == TYPE_CODE_PTR || typecode == TYPE_CODE_FLT) && len <= 4) - longword_offset = mips_stack_argsize (tdep) - len; + longword_offset = mips_stack_argsize (gdbarch) - len; } if (mips_debug) @@ -3262,17 +3274,17 @@ mips_n32n64_push_dummy_call (struct gdba accordingly. */ if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG - && partial_len < mips_abi_regsize (tdep) + && partial_len < mips_abi_regsize (gdbarch) && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)) - regval <<= ((mips_abi_regsize (tdep) - partial_len) * + regval <<= ((mips_abi_regsize (gdbarch) - partial_len) * TARGET_CHAR_BIT); if (mips_debug) fprintf_filtered (gdb_stdlog, " - reg=%d val=%s", argreg, phex (regval, - mips_abi_regsize (tdep))); + mips_abi_regsize (gdbarch))); write_register (argreg, regval); argreg++; } @@ -3288,7 +3300,7 @@ mips_n32n64_push_dummy_call (struct gdba if (stack_used_p) stack_offset += align_up (partial_len, - mips_stack_argsize (tdep)); + mips_stack_argsize (gdbarch)); } } if (mips_debug) @@ -3310,7 +3322,7 @@ mips_n32n64_return_value (struct gdbarch if (TYPE_CODE (type) == TYPE_CODE_STRUCT || TYPE_CODE (type) == TYPE_CODE_UNION || TYPE_CODE (type) == TYPE_CODE_ARRAY - || TYPE_LENGTH (type) > 2 * mips_abi_regsize (tdep)) + || TYPE_LENGTH (type) > 2 * mips_abi_regsize (gdbarch)) return RETURN_VALUE_STRUCT_CONVENTION; else if (TYPE_CODE (type) == TYPE_CODE_FLT && tdep->mips_fpu_type != MIPS_FPU_NONE) @@ -3438,7 +3450,7 @@ mips_o32_push_dummy_call (struct gdbarch /* Now make space on the stack for the args. */ for (argnum = 0; argnum < nargs; argnum++) len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])), - mips_stack_argsize (tdep)); + mips_stack_argsize (gdbarch)); sp -= align_up (len, 16); if (mips_debug) @@ -3458,7 +3470,7 @@ mips_o32_push_dummy_call (struct gdbarch "mips_o32_push_dummy_call: struct_return reg=%d 0x%s\n", argreg, paddr_nz (struct_addr)); write_register (argreg++, struct_addr); - stack_offset += mips_stack_argsize (tdep); + stack_offset += mips_stack_argsize (gdbarch); } /* Now load as many as possible of the first arguments into @@ -3553,7 +3565,7 @@ mips_o32_push_dummy_call (struct gdbarch argreg += FP_REGISTER_DOUBLE ? 1 : 2; } /* Reserve space for the FP register. */ - stack_offset += align_up (len, mips_stack_argsize (tdep)); + stack_offset += align_up (len, mips_stack_argsize (gdbarch)); } else { @@ -3565,11 +3577,11 @@ mips_o32_push_dummy_call (struct gdbarch in registers where gcc sometimes puts them on the stack. For maximum compatibility, we will put them in both places. */ - int odd_sized_struct = ((len > mips_abi_regsize (tdep)) - && (len % mips_abi_regsize (tdep) != 0)); + int odd_sized_struct = ((len > mips_abi_regsize (gdbarch)) + && (len % mips_abi_regsize (gdbarch) != 0)); /* Structures should be aligned to eight bytes (even arg registers) on MIPS_ABI_O32, if their first member has double precision. */ - if (mips_abi_regsize (tdep) < 8 + if (mips_abi_regsize (gdbarch) < 8 && mips_type_needs_double_align (arg_type)) { if ((argreg & 1)) @@ -3581,8 +3593,8 @@ mips_o32_push_dummy_call (struct gdbarch { /* Remember if the argument was written to the stack. */ int stack_used_p = 0; - int partial_len = (len < mips_abi_regsize (tdep) - ? len : mips_abi_regsize (tdep)); + int partial_len = (len < mips_abi_regsize (gdbarch) + ? len : mips_abi_regsize (gdbarch)); if (mips_debug) fprintf_unfiltered (gdb_stdlog, " -- partial=%d", @@ -3600,11 +3612,11 @@ mips_o32_push_dummy_call (struct gdbarch stack_used_p = 1; if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) { - if (mips_stack_argsize (tdep) == 8 + if (mips_stack_argsize (gdbarch) == 8 && (typecode == TYPE_CODE_INT || typecode == TYPE_CODE_PTR || typecode == TYPE_CODE_FLT) && len <= 4) - longword_offset = mips_stack_argsize (tdep) - len; + longword_offset = mips_stack_argsize (gdbarch) - len; } if (mips_debug) @@ -3668,19 +3680,19 @@ mips_o32_push_dummy_call (struct gdbarch identified as such and GDB gets tweaked accordingly. */ - if (mips_abi_regsize (tdep) < 8 + if (mips_abi_regsize (gdbarch) < 8 && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG - && partial_len < mips_abi_regsize (tdep) + && partial_len < mips_abi_regsize (gdbarch) && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)) - regval <<= ((mips_abi_regsize (tdep) - partial_len) * + regval <<= ((mips_abi_regsize (gdbarch) - partial_len) * TARGET_CHAR_BIT); if (mips_debug) fprintf_filtered (gdb_stdlog, " - reg=%d val=%s", argreg, phex (regval, - mips_abi_regsize (tdep))); + mips_abi_regsize (gdbarch))); write_register (argreg, regval); argreg++; @@ -3701,7 +3713,7 @@ mips_o32_push_dummy_call (struct gdbarch always allocated. */ stack_offset += align_up (partial_len, - mips_stack_argsize (tdep)); + mips_stack_argsize (gdbarch)); } } if (mips_debug) @@ -3838,9 +3850,9 @@ mips_o32_return_value (struct gdbarch *g int regnum; for (offset = 0, regnum = V0_REGNUM; offset < TYPE_LENGTH (type); - offset += mips_stack_argsize (tdep), regnum++) + offset += mips_stack_argsize (gdbarch), regnum++) { - int xfer = mips_stack_argsize (tdep); + int xfer = mips_stack_argsize (gdbarch); if (offset + xfer > TYPE_LENGTH (type)) xfer = TYPE_LENGTH (type) - offset; if (mips_debug) @@ -3890,7 +3902,7 @@ mips_o64_push_dummy_call (struct gdbarch /* Now make space on the stack for the args. */ for (argnum = 0; argnum < nargs; argnum++) len += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])), - mips_stack_argsize (tdep)); + mips_stack_argsize (gdbarch)); sp -= align_up (len, 16); if (mips_debug) @@ -3910,7 +3922,7 @@ mips_o64_push_dummy_call (struct gdbarch "mips_o64_push_dummy_call: struct_return reg=%d 0x%s\n", argreg, paddr_nz (struct_addr)); write_register (argreg++, struct_addr); - stack_offset += mips_stack_argsize (tdep); + stack_offset += mips_stack_argsize (gdbarch); } /* Now load as many as possible of the first arguments into @@ -4005,7 +4017,7 @@ mips_o64_push_dummy_call (struct gdbarch argreg += FP_REGISTER_DOUBLE ? 1 : 2; } /* Reserve space for the FP register. */ - stack_offset += align_up (len, mips_stack_argsize (tdep)); + stack_offset += align_up (len, mips_stack_argsize (gdbarch)); } else { @@ -4017,11 +4029,11 @@ mips_o64_push_dummy_call (struct gdbarch in registers where gcc sometimes puts them on the stack. For maximum compatibility, we will put them in both places. */ - int odd_sized_struct = ((len > mips_abi_regsize (tdep)) - && (len % mips_abi_regsize (tdep) != 0)); + int odd_sized_struct = ((len > mips_abi_regsize (gdbarch)) + && (len % mips_abi_regsize (gdbarch) != 0)); /* Structures should be aligned to eight bytes (even arg registers) on MIPS_ABI_O32, if their first member has double precision. */ - if (mips_abi_regsize (tdep) < 8 + if (mips_abi_regsize (gdbarch) < 8 && mips_type_needs_double_align (arg_type)) { if ((argreg & 1)) @@ -4033,8 +4045,8 @@ mips_o64_push_dummy_call (struct gdbarch { /* Remember if the argument was written to the stack. */ int stack_used_p = 0; - int partial_len = (len < mips_abi_regsize (tdep) - ? len : mips_abi_regsize (tdep)); + int partial_len = (len < mips_abi_regsize (gdbarch) + ? len : mips_abi_regsize (gdbarch)); if (mips_debug) fprintf_unfiltered (gdb_stdlog, " -- partial=%d", @@ -4052,11 +4064,11 @@ mips_o64_push_dummy_call (struct gdbarch stack_used_p = 1; if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) { - if (mips_stack_argsize (tdep) == 8 + if (mips_stack_argsize (gdbarch) == 8 && (typecode == TYPE_CODE_INT || typecode == TYPE_CODE_PTR || typecode == TYPE_CODE_FLT) && len <= 4) - longword_offset = mips_stack_argsize (tdep) - len; + longword_offset = mips_stack_argsize (gdbarch) - len; } if (mips_debug) @@ -4120,19 +4132,19 @@ mips_o64_push_dummy_call (struct gdbarch identified as such and GDB gets tweaked accordingly. */ - if (mips_abi_regsize (tdep) < 8 + if (mips_abi_regsize (gdbarch) < 8 && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG - && partial_len < mips_abi_regsize (tdep) + && partial_len < mips_abi_regsize (gdbarch) && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)) - regval <<= ((mips_abi_regsize (tdep) - partial_len) * + regval <<= ((mips_abi_regsize (gdbarch) - partial_len) * TARGET_CHAR_BIT); if (mips_debug) fprintf_filtered (gdb_stdlog, " - reg=%d val=%s", argreg, phex (regval, - mips_abi_regsize (tdep))); + mips_abi_regsize (gdbarch))); write_register (argreg, regval); argreg++; @@ -4153,7 +4165,7 @@ mips_o64_push_dummy_call (struct gdbarch always allocated. */ stack_offset += align_up (partial_len, - mips_stack_argsize (tdep)); + mips_stack_argsize (gdbarch)); } } if (mips_debug) @@ -5614,8 +5626,6 @@ mips_gdbarch_init (struct gdbarch_info i case MIPS_ABI_O32: set_gdbarch_push_dummy_call (gdbarch, mips_o32_push_dummy_call); set_gdbarch_return_value (gdbarch, mips_o32_return_value); - tdep->mips_default_abi_regsize = 4; - tdep->mips_default_stack_argsize = 4; tdep->mips_fp_register_double = 0; tdep->mips_last_arg_regnum = A0_REGNUM + 4 - 1; tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 4 - 1; @@ -5630,8 +5640,6 @@ mips_gdbarch_init (struct gdbarch_info i mips_o64_store_return_value); set_gdbarch_deprecated_extract_return_value (gdbarch, mips_o64_extract_return_value); - tdep->mips_default_abi_regsize = 8; - tdep->mips_default_stack_argsize = 8; tdep->mips_fp_register_double = 1; tdep->mips_last_arg_regnum = A0_REGNUM + 4 - 1; tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 4 - 1; @@ -5648,8 +5656,6 @@ mips_gdbarch_init (struct gdbarch_info i mips_eabi_store_return_value); set_gdbarch_deprecated_extract_return_value (gdbarch, mips_eabi_extract_return_value); - tdep->mips_default_abi_regsize = 4; - tdep->mips_default_stack_argsize = 4; tdep->mips_fp_register_double = 0; tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1; tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1; @@ -5668,8 +5674,6 @@ mips_gdbarch_init (struct gdbarch_info i mips_eabi_store_return_value); set_gdbarch_deprecated_extract_return_value (gdbarch, mips_eabi_extract_return_value); - tdep->mips_default_abi_regsize = 8; - tdep->mips_default_stack_argsize = 8; tdep->mips_fp_register_double = 1; tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1; tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1; @@ -5685,8 +5689,6 @@ mips_gdbarch_init (struct gdbarch_info i case MIPS_ABI_N32: set_gdbarch_push_dummy_call (gdbarch, mips_n32n64_push_dummy_call); set_gdbarch_return_value (gdbarch, mips_n32n64_return_value); - tdep->mips_default_abi_regsize = 8; - tdep->mips_default_stack_argsize = 8; tdep->mips_fp_register_double = 1; tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1; tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1; @@ -5698,8 +5700,6 @@ mips_gdbarch_init (struct gdbarch_info i case MIPS_ABI_N64: set_gdbarch_push_dummy_call (gdbarch, mips_n32n64_push_dummy_call); set_gdbarch_return_value (gdbarch, mips_n32n64_return_value); - tdep->mips_default_abi_regsize = 8; - tdep->mips_default_stack_argsize = 8; tdep->mips_fp_register_double = 1; tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1; tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1; @@ -5927,7 +5927,7 @@ mips_dump_tdep (struct gdbarch *current_ FP_REGISTER_DOUBLE); fprintf_unfiltered (file, "mips_dump_tdep: mips_stack_argsize() = %d\n", - mips_stack_argsize (tdep)); + mips_stack_argsize (current_gdbarch)); fprintf_unfiltered (file, "mips_dump_tdep: A0_REGNUM = %d\n", A0_REGNUM); fprintf_unfiltered (file, "mips_dump_tdep: ADDR_BITS_REMOVE # %s\n", @@ -5987,7 +5987,7 @@ mips_dump_tdep (struct gdbarch *current_ "mips_dump_tdep: MIPS_NUMREGS = %d\n", MIPS_NUMREGS); fprintf_unfiltered (file, "mips_dump_tdep: mips_abi_regsize() = %d\n", - mips_abi_regsize (tdep)); + mips_abi_regsize (current_gdbarch)); fprintf_unfiltered (file, "mips_dump_tdep: PRID_REGNUM = %d\n", PRID_REGNUM); fprintf_unfiltered (file, ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFA] mips 32/64 register/stack fix 2004-04-29 13:40 ` Andrew Cagney 2004-04-29 14:34 ` Daniel Jacobowitz @ 2004-04-29 17:58 ` Michael Snyder 2004-04-29 19:49 ` Andrew Cagney 1 sibling, 1 reply; 17+ messages in thread From: Michael Snyder @ 2004-04-29 17:58 UTC (permalink / raw) To: Andrew Cagney; +Cc: Daniel Jacobowitz, gdb-patches, cagney Andrew Cagney wrote: >> On Wed, Apr 28, 2004 at 05:45:22PM -0400, Andrew Cagney wrote: >> >>>>> >Here's your tdep info: >>>>> >{elf_flags = 1610625025, mips_abi = MIPS_ABI_EABI32, >>> >>> >>>> >>>> I was looking to see if anything like that was present -> it is >>>> clearly identified as a 32-bit ABI binary. >>>> >>>> I think the bug is in mips_register_type, the tail end should >>>> probably be changed to read something like: >>>> >>>> else if (regnum >= NUM_REGS >>>> && gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p) >>>> /* The target, while using a 64-bit raw register buffer, is only >>>> transfering 32-bits of each integer register. Reflect this in >>>> the cooked/pseudo register value. */ >>>> return builtin_type_int32; >>>> else if (regnum > NUM_REGS > > > >= NUM_REGS > >>>> && mips_saved_regsize (gdbarch) == 4) >>>> /* A 32-bit ABI such as o32 possibly running on a 64-bit ISA. */ >>>> return builtin_type_int32; >>>> else if (mips_regsize (gdbarch) == 8) >>>> /* 64-bit ISA. */ >>>> return builtin_type_int64; >>>> else >>>> /* 32-bit ISA. */ >>>> return builtin_type_int32; >> >> >> >> Would you mind clarifying the reason for having mips_regsize, which is >> used in a number of other places, return a regsize based on the ISA? > > > Hasn't this all come up before? > > It's the register size of the underlying ISA, on top of which the ABI is > implemented. I think I'll rename mips_regsize and mips_saved_regsize to > clarify this. > >> This change to mips_register_type conveys the fact that we've only got >> 32 bits of data. But we'll choose to print (in info registers) a >> 64-bit wide field for each GPR if the binary is tagged E_MIPS_ARCH_64 | >> E_MIPS_ABI_EABI32, and a 32-bit field if it's tagged E_MIPS_ARCH_2 | >> E_MIPS_ABI_EABI32. Conceptually, I think we're interested in some >> combination of the available register size (-> a property of the target) >> and the size of registers known to the inferior program (-> unclear mix >> of its ABI and ISA). > > > It does? With the above it should always print a 32-bit GPR reflecting > the 32-bit ABI. If you think it should display something else, look at > user-regs which lets you implement registers using the frame register > values (something psuedo registers can't handle). I've got a build -- I'll try your patch and let you know how it behaves. Are there any particular things you'd like me to check (eg. info reg), aside from the problem that got me on this in the first place? ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFA] mips 32/64 register/stack fix 2004-04-29 17:58 ` [RFA] mips 32/64 register/stack fix Michael Snyder @ 2004-04-29 19:49 ` Andrew Cagney 2004-04-29 21:15 ` Michael Snyder 0 siblings, 1 reply; 17+ messages in thread From: Andrew Cagney @ 2004-04-29 19:49 UTC (permalink / raw) To: Michael Snyder; +Cc: Daniel Jacobowitz, gdb-patches, cagney Note this tipo: >>>> else if (regnum > NUM_REGS >> >= NUM_REGS >>> This change to mips_register_type conveys the fact that we've only got >>> 32 bits of data. But we'll choose to print (in info registers) a >>> 64-bit wide field for each GPR if the binary is tagged E_MIPS_ARCH_64 | >>> E_MIPS_ABI_EABI32, and a 32-bit field if it's tagged E_MIPS_ARCH_2 | >>> E_MIPS_ABI_EABI32. Conceptually, I think we're interested in some >>> combination of the available register size (-> a property of the target) >>> and the size of registers known to the inferior program (-> unclear mix >>> of its ABI and ISA). >> >> >> >> It does? With the above it should always print a 32-bit GPR reflecting the 32-bit ABI. If you think it should display something else, look at user-regs which lets you implement registers using the frame register values (something psuedo registers can't handle). > > > I've got a build -- I'll try your patch and let you know how it behaves. > Are there any particular things you'd like me to check (eg. info reg), > aside from the problem that got me on this in the first place? See daniel's follow up: > It makes decisions based on mips_regsize. See print_gp_register_row. > So does mips32_heuristic_proc_desc; which has probably been converted > incorrectly at some point in the past, since it takes "8 - mips_regsize > (current_gdbarch)" and wants 4 for N32. I think that whole block of > code is bogus. > > Hmm, I was just using print_gp_register_row as an example - but it > turns out to be the only example. Only the two functions above and > mips_register_type reference mips_regsize now - and a bunch of NetBSD > specific code which is almost certainly wrong. With the functions > renamed, I guess it'll be much easier to spot the errors. Andrew ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFA] mips 32/64 register/stack fix 2004-04-29 19:49 ` Andrew Cagney @ 2004-04-29 21:15 ` Michael Snyder 2004-04-29 21:36 ` Andrew Cagney 0 siblings, 1 reply; 17+ messages in thread From: Michael Snyder @ 2004-04-29 21:15 UTC (permalink / raw) To: Andrew Cagney; +Cc: Daniel Jacobowitz, gdb-patches, cagney Andrew Cagney wrote: > See daniel's follow up: OK, well, FYI, I ran the testsuite with your revised patch, and it introduced a bunch of new fails in the whole callfuncs family, along with some other completely unexpected places (ptype???). I'm gonna step back and let you guys work it out. ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFA] mips 32/64 register/stack fix 2004-04-29 21:15 ` Michael Snyder @ 2004-04-29 21:36 ` Andrew Cagney 2004-04-30 0:40 ` Andrew Cagney 0 siblings, 1 reply; 17+ messages in thread From: Andrew Cagney @ 2004-04-29 21:36 UTC (permalink / raw) To: Michael Snyder; +Cc: Daniel Jacobowitz, gdb-patches, cagney > Andrew Cagney wrote: > >> See daniel's follow up: > > > OK, well, FYI, I ran the testsuite with your revised patch, and it > introduced a bunch of new fails in the whole callfuncs family, along > with some other completely unexpected places (ptype???). Remember, my patch was an un-tested guess. You'll want to debug it a little, but the theory is sound. Andrew ^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFA] mips 32/64 register/stack fix 2004-04-29 21:36 ` Andrew Cagney @ 2004-04-30 0:40 ` Andrew Cagney 0 siblings, 0 replies; 17+ messages in thread From: Andrew Cagney @ 2004-04-30 0:40 UTC (permalink / raw) To: Michael Snyder; +Cc: Daniel Jacobowitz, gdb-patches, cagney >> Andrew Cagney wrote: >> >>> See daniel's follow up: >> >> >> >> OK, well, FYI, I ran the testsuite with your revised patch, and it >> introduced a bunch of new fails in the whole callfuncs family, along >> with some other completely unexpected places (ptype???). > > > Remember, my patch was an un-tested guess. You'll want to debug it a little, but the theory is sound. I just tried a variation of it, and it worked for me (mips-elf and mips64-elf) so as I said the theory is sound. I'm not sure what is happening, but it sounds like more problems at your end -- the EABI code is seriously bitrotten :-/ Andrew ^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2004-04-30 0:40 UTC | newest] Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2004-04-22 18:49 [RFA] mips 32/64 register/stack fix Michael Snyder 2004-04-22 19:59 ` Andrew Cagney 2004-04-22 21:29 ` Daniel Jacobowitz 2004-04-22 21:43 ` Michael Snyder 2004-04-22 22:04 ` Andrew Cagney 2004-04-22 22:49 ` Michael Snyder 2004-04-28 21:45 ` Andrew Cagney 2004-04-29 3:12 ` Daniel Jacobowitz 2004-04-29 13:40 ` Andrew Cagney 2004-04-29 14:34 ` Daniel Jacobowitz 2004-04-29 18:32 ` [commit] mips_isa_regsize, mips_abi_regsize; Was: " Andrew Cagney 2004-04-29 19:45 ` [commit] compute abi regsize; Was: Andrew Cagney 2004-04-29 17:58 ` [RFA] mips 32/64 register/stack fix Michael Snyder 2004-04-29 19:49 ` Andrew Cagney 2004-04-29 21:15 ` Michael Snyder 2004-04-29 21:36 ` Andrew Cagney 2004-04-30 0:40 ` Andrew Cagney
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