From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 14700 invoked by alias); 29 Apr 2004 19:49:50 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 14674 invoked from network); 29 Apr 2004 19:49:42 -0000 Received: from unknown (HELO mx1.redhat.com) (66.187.233.31) by sources.redhat.com with SMTP; 29 Apr 2004 19:49:42 -0000 Received: from int-mx1.corp.redhat.com (int-mx1.corp.redhat.com [172.16.52.254]) by mx1.redhat.com (8.12.10/8.12.10) with ESMTP id i3TJneKI010988 for ; Thu, 29 Apr 2004 15:49:42 -0400 Received: from localhost.redhat.com (to-dhcp51.toronto.redhat.com [172.16.14.151]) by int-mx1.corp.redhat.com (8.11.6/8.11.6) with ESMTP id i3TJnev13458; Thu, 29 Apr 2004 15:49:40 -0400 Received: from gnu.org (localhost [127.0.0.1]) by localhost.redhat.com (Postfix) with ESMTP id C7C832B9D; Thu, 29 Apr 2004 15:49:41 -0400 (EDT) Message-ID: <40915C55.2050807@gnu.org> Date: Thu, 29 Apr 2004 19:49:00 -0000 From: Andrew Cagney User-Agent: Mozilla/5.0 (X11; U; NetBSD macppc; en-GB; rv:1.4.1) Gecko/20040217 MIME-Version: 1.0 To: Michael Snyder Cc: Daniel Jacobowitz , gdb-patches@sources.redhat.com, cagney Subject: Re: [RFA] mips 32/64 register/stack fix References: <408813A9.6000402@redhat.com> <4088242A.4070601@gnu.org> <40883C90.7030509@redhat.com> <40884155.2090205@gnu.org> <40884BEF.5070909@redhat.com> <409025F2.9080704@gnu.org> <20040429031240.GA12518@nevyn.them.org> <409105C7.1020502@gnu.org> <40914235.2040702@redhat.com> In-Reply-To: <40914235.2040702@redhat.com> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2004-04/txt/msg00691.txt.bz2 Note this tipo: >>>> else if (regnum > NUM_REGS >> >= NUM_REGS >>> This change to mips_register_type conveys the fact that we've only got >>> 32 bits of data. But we'll choose to print (in info registers) a >>> 64-bit wide field for each GPR if the binary is tagged E_MIPS_ARCH_64 | >>> E_MIPS_ABI_EABI32, and a 32-bit field if it's tagged E_MIPS_ARCH_2 | >>> E_MIPS_ABI_EABI32. Conceptually, I think we're interested in some >>> combination of the available register size (-> a property of the target) >>> and the size of registers known to the inferior program (-> unclear mix >>> of its ABI and ISA). >> >> >> >> It does? With the above it should always print a 32-bit GPR reflecting the 32-bit ABI. If you think it should display something else, look at user-regs which lets you implement registers using the frame register values (something psuedo registers can't handle). > > > I've got a build -- I'll try your patch and let you know how it behaves. > Are there any particular things you'd like me to check (eg. info reg), > aside from the problem that got me on this in the first place? See daniel's follow up: > It makes decisions based on mips_regsize. See print_gp_register_row. > So does mips32_heuristic_proc_desc; which has probably been converted > incorrectly at some point in the past, since it takes "8 - mips_regsize > (current_gdbarch)" and wants 4 for N32. I think that whole block of > code is bogus. > > Hmm, I was just using print_gp_register_row as an example - but it > turns out to be the only example. Only the two functions above and > mips_register_type reference mips_regsize now - and a bunch of NetBSD > specific code which is almost certainly wrong. With the functions > renamed, I guess it'll be much easier to spot the errors. Andrew