[PATCH 1/3] Add sp_regnum_from_eax and pc_regnum_from_eax

[PATCH 1/3] Add sp_regnum_from_eax and pc_regnum_from_eax

[H.J. Lu]

Hi,

Here are the first of the last 3 patches for x32 support in GDB.  This
patch maps $pc to $eip and $sp to $esp for x32.  OK to install?

Thanks.

H.J.
---
	* amd64-tdep.c (amd64_x32_init_abi): Set sp_regnum_from_eax to
	AMD64_RSP_REGNUM and pc_regnum_from_eax to AMD64_RIP_REGNUM.

	* i386-tdep.c (i386_gdbarch_init): Initialize sp_regnum_from_eax
	and pc_regnum_from_eax to -1.  Update SP regnum from
	sp_regnum_from_eax and PC regnum from pc_regnum_from_eax if
	needed.

	* i386-tdep.h (gdbarch_tdep): Add sp_regnum_from_eax and
	pc_regnum_from_eax.

---
 gdb/amd64-tdep.c |    3 +++
 gdb/i386-tdep.c  |   11 +++++++++++
 gdb/i386-tdep.h  |    8 ++++++++
 3 files changed, 22 insertions(+), 0 deletions(-)

diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index 8ae1142..5424926 100644
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -2946,6 +2946,9 @@ amd64_x32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
     tdesc = tdesc_x32;
   tdep->tdesc = tdesc;
 
+  tdep->sp_regnum_from_eax = AMD64_RSP_REGNUM;
+  tdep->pc_regnum_from_eax = AMD64_RIP_REGNUM;
+
   tdep->num_dword_regs = 17;
   set_tdesc_pseudo_register_type (gdbarch, amd64_x32_pseudo_register_type);
 
diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
index fd5969d..6a02906 100644
--- a/gdb/i386-tdep.c
+++ b/gdb/i386-tdep.c
@@ -7805,6 +7805,9 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   tdep->num_mmx_regs = 8;
   tdep->num_ymm_regs = 0;
 
+  tdep->sp_regnum_from_eax = -1;
+  tdep->pc_regnum_from_eax = -1;
+
   tdesc_data = tdesc_data_alloc ();
 
   set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction);
@@ -7849,6 +7852,14 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
       /* Support dword pseudo-register if it hasn't been disabled.  */
       tdep->eax_regnum = ymm0_regnum;
       ymm0_regnum += tdep->num_dword_regs;
+      if (tdep->sp_regnum_from_eax != -1)
+	set_gdbarch_sp_regnum (gdbarch,
+			       (tdep->eax_regnum
+				+ tdep->sp_regnum_from_eax));
+      if (tdep->pc_regnum_from_eax != -1)
+	set_gdbarch_pc_regnum (gdbarch,
+			       (tdep->eax_regnum
+				+ tdep->pc_regnum_from_eax));
     }
   else
     tdep->eax_regnum = -1;
diff --git a/gdb/i386-tdep.h b/gdb/i386-tdep.h
index 5f233f5..76afdce 100644
--- a/gdb/i386-tdep.h
+++ b/gdb/i386-tdep.h
@@ -149,6 +149,14 @@ struct gdbarch_tdep
      of pseudo dword register support.  */
   int eax_regnum;
 
+  /* Register number for SP, relative to %eax.  Set this to -1 to
+     indicate the absence of pseudo SP register support.  */
+  int sp_regnum_from_eax;
+
+  /* Register number for PC, relative to %eax.  Set this to -1 to
+     indicate the absence of pseudo PC register support.  */
+  int pc_regnum_from_eax;
+
   /* Number of core registers.  */
   int num_core_regs;
 
-- 
1.7.6.5

Re: [PATCH 1/3] Add sp_regnum_from_eax and pc_regnum_from_eax

[Mark Kettenis]

> Date: Thu, 21 Jun 2012 11:14:52 -0700
> From: "H.J. Lu" <hongjiu.lu@intel.com>
> 
> Hi,
> 
> Here are the first of the last 3 patches for x32 support in GDB.  This
> patch maps $pc to $eip and $sp to $esp for x32.  OK to install?

The pseudo register handling code is getting too complex :(.  I feel
that hiding the set_gdbarch_pc_regnum() and set_gdbarch_sp_regnum()
calls in i386-tdep.c isn't the right approach.  But I haven't found a
better one yet :(.

> ---
> 	* amd64-tdep.c (amd64_x32_init_abi): Set sp_regnum_from_eax to
> 	AMD64_RSP_REGNUM and pc_regnum_from_eax to AMD64_RIP_REGNUM.
> 
> 	* i386-tdep.c (i386_gdbarch_init): Initialize sp_regnum_from_eax
> 	and pc_regnum_from_eax to -1.  Update SP regnum from
> 	sp_regnum_from_eax and PC regnum from pc_regnum_from_eax if
> 	needed.
> 
> 	* i386-tdep.h (gdbarch_tdep): Add sp_regnum_from_eax and
> 	pc_regnum_from_eax.
> 
> ---
>  gdb/amd64-tdep.c |    3 +++
>  gdb/i386-tdep.c  |   11 +++++++++++
>  gdb/i386-tdep.h  |    8 ++++++++
>  3 files changed, 22 insertions(+), 0 deletions(-)
> 
> diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
> index 8ae1142..5424926 100644
> --- a/gdb/amd64-tdep.c
> +++ b/gdb/amd64-tdep.c
> @@ -2946,6 +2946,9 @@ amd64_x32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
>      tdesc = tdesc_x32;
>    tdep->tdesc = tdesc;
>  
> +  tdep->sp_regnum_from_eax = AMD64_RSP_REGNUM;
> +  tdep->pc_regnum_from_eax = AMD64_RIP_REGNUM;
> +
>    tdep->num_dword_regs = 17;
>    set_tdesc_pseudo_register_type (gdbarch, amd64_x32_pseudo_register_type);
>  
> diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
> index fd5969d..6a02906 100644
> --- a/gdb/i386-tdep.c
> +++ b/gdb/i386-tdep.c
> @@ -7805,6 +7805,9 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
>    tdep->num_mmx_regs = 8;
>    tdep->num_ymm_regs = 0;
>  
> +  tdep->sp_regnum_from_eax = -1;
> +  tdep->pc_regnum_from_eax = -1;
> +
>    tdesc_data = tdesc_data_alloc ();
>  
>    set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction);
> @@ -7849,6 +7852,14 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
>        /* Support dword pseudo-register if it hasn't been disabled.  */
>        tdep->eax_regnum = ymm0_regnum;
>        ymm0_regnum += tdep->num_dword_regs;
> +      if (tdep->sp_regnum_from_eax != -1)
> +	set_gdbarch_sp_regnum (gdbarch,
> +			       (tdep->eax_regnum
> +				+ tdep->sp_regnum_from_eax));
> +      if (tdep->pc_regnum_from_eax != -1)
> +	set_gdbarch_pc_regnum (gdbarch,
> +			       (tdep->eax_regnum
> +				+ tdep->pc_regnum_from_eax));
>      }
>    else
>      tdep->eax_regnum = -1;
> diff --git a/gdb/i386-tdep.h b/gdb/i386-tdep.h
> index 5f233f5..76afdce 100644
> --- a/gdb/i386-tdep.h
> +++ b/gdb/i386-tdep.h
> @@ -149,6 +149,14 @@ struct gdbarch_tdep
>       of pseudo dword register support.  */
>    int eax_regnum;
>  
> +  /* Register number for SP, relative to %eax.  Set this to -1 to
> +     indicate the absence of pseudo SP register support.  */
> +  int sp_regnum_from_eax;
> +
> +  /* Register number for PC, relative to %eax.  Set this to -1 to
> +     indicate the absence of pseudo PC register support.  */
> +  int pc_regnum_from_eax;
> +
>    /* Number of core registers.  */
>    int num_core_regs;
>  
> -- 
> 1.7.6.5
> 
> 

Re: [PATCH 1/3] Add sp_regnum_from_eax and pc_regnum_from_eax

[H.J. Lu]

On Tue, Jul 3, 2012 at 7:08 AM, Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>> Date: Thu, 21 Jun 2012 11:14:52 -0700
>> From: "H.J. Lu" <hongjiu.lu@intel.com>
>>
>> Hi,
>>
>> Here are the first of the last 3 patches for x32 support in GDB.  This
>> patch maps $pc to $eip and $sp to $esp for x32.  OK to install?
>
> The pseudo register handling code is getting too complex :(.  I feel
> that hiding the set_gdbarch_pc_regnum() and set_gdbarch_sp_regnum()
> calls in i386-tdep.c isn't the right approach.  But I haven't found a
> better one yet :(.
>

One possibility is to set pc/sp to register name instead of regnum.
i386_gdbarch_init can map them to regnum after all pseudo registers
are finalized.

-- 
H.J.

Re: [PATCH 1/3] Add sp_regnum_from_eax and pc_regnum_from_eax

[H.J. Lu]

On Tue, Jul 3, 2012 at 8:54 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Tue, Jul 3, 2012 at 7:08 AM, Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>>> Date: Thu, 21 Jun 2012 11:14:52 -0700
>>> From: "H.J. Lu" <hongjiu.lu@intel.com>
>>>
>>> Hi,
>>>
>>> Here are the first of the last 3 patches for x32 support in GDB.  This
>>> patch maps $pc to $eip and $sp to $esp for x32.  OK to install?
>>
>> The pseudo register handling code is getting too complex :(.  I feel
>> that hiding the set_gdbarch_pc_regnum() and set_gdbarch_sp_regnum()
>> calls in i386-tdep.c isn't the right approach.  But I haven't found a
>> better one yet :(.
>>
>
> One possibility is to set pc/sp to register name instead of regnum.
> i386_gdbarch_init can map them to regnum after all pseudo registers
> are finalized.
>
> --
> H.J.

How about this patch? I can also change amd64 and i386
to use "rsp/"rsp"/"esp"/"eip".

Thanks.

-- 
H.J.
---
	* amd64-tdep.c (amd64_x32_init_abi): Set sp_pseudo_reg to
	"esp" and pc_pseudo_reg to "eip".

	* i386-tdep.c (i386_gdbarch_init): Initialize sp_pseudo_reg
	and pc_pseudo_reg to NULL.  Update SP regnum from sp_pseudo_reg
	and PC regnum from pc_pseudo_reg if needed.

	* i386-tdep.h (gdbarch_tdep): Add sp_pseudo_reg and pc_pseudo_reg.

diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index 8ae1142..d59b8c1 100644
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -2946,6 +2946,9 @@ amd64_x32_init_abi (struct gdbarch_info info,
struct gdbarch *gdbarch)
     tdesc = tdesc_x32;
   tdep->tdesc = tdesc;

+  tdep->sp_pseudo_reg = "esp";
+  tdep->pc_pseudo_reg = "eip";
+
   tdep->num_dword_regs = 17;
   set_tdesc_pseudo_register_type (gdbarch, amd64_x32_pseudo_register_type);

diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
index fd5969d..a9fee8f 100644
--- a/gdb/i386-tdep.c
+++ b/gdb/i386-tdep.c
@@ -7610,6 +7610,7 @@ i386_gdbarch_init (struct gdbarch_info info,
struct gdbarch_list *arches)
   const struct target_desc *tdesc;
   int mm0_regnum;
   int ymm0_regnum;
+  int num_sp_pc_regs;

   /* If there is already a candidate, use it.  */
   arches = gdbarch_list_lookup_by_info (arches, &info);
@@ -7805,6 +7806,9 @@ i386_gdbarch_init (struct gdbarch_info info,
struct gdbarch_list *arches)
   tdep->num_mmx_regs = 8;
   tdep->num_ymm_regs = 0;

+  tdep->sp_pseudo_reg = NULL;
+  tdep->pc_pseudo_reg = NULL;
+
   tdesc_data = tdesc_data_alloc ();

   set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction);
@@ -7871,6 +7875,43 @@ i386_gdbarch_init (struct gdbarch_info info,
struct gdbarch_list *arches)
   else
     tdep->mm0_regnum = -1;

+  /* Check pseudo SP/PC register support.  */
+  num_sp_pc_regs = 0;
+  if (tdep->sp_pseudo_reg != NULL)
+    num_sp_pc_regs++;
+  if (tdep->pc_pseudo_reg != NULL)
+    num_sp_pc_regs++;
+
+  if (num_sp_pc_regs)
+    {
+      int num_regs = gdbarch_num_regs (gdbarch);
+      int num_pseudo_regs = gdbarch_num_pseudo_regs (gdbarch);
+      int regno, sp_pc_regs = 0;
+      const char *regname;
+
+      for (regno = num_regs;
+	   regno < num_regs + num_pseudo_regs;
+	   regno++)
+	{
+	  regname = tdesc_register_name (gdbarch, regno);
+	  if (regname && regname[0] != '\0')
+	    {
+	      if (strcmp (regname, tdep->sp_pseudo_reg) == 0)
+		{
+		  set_gdbarch_sp_regnum (gdbarch, regno);
+		  sp_pc_regs++;
+		}
+	      else if (strcmp (regname, tdep->pc_pseudo_reg) == 0)
+		{
+		  set_gdbarch_pc_regnum (gdbarch, regno);
+		  sp_pc_regs++;
+		}
+	    }
+	  if (sp_pc_regs == num_sp_pc_regs)
+	    break;
+	}
+    }
+
   /* Hook in the legacy prologue-based unwinders last (fallback).  */
   frame_unwind_append_unwinder (gdbarch, &i386_stack_tramp_frame_unwind);
   frame_unwind_append_unwinder (gdbarch, &i386_sigtramp_frame_unwind);
diff --git a/gdb/i386-tdep.h b/gdb/i386-tdep.h
index 5f233f5..6e53ff1 100644
--- a/gdb/i386-tdep.h
+++ b/gdb/i386-tdep.h
@@ -155,6 +155,14 @@ struct gdbarch_tdep
   /* Number of SSE registers.  */
   int num_xmm_regs;

+  /* Pseudo register name for SP.  Set this to NULL to disable pseudo SP
+     register support.  */
+  const char *sp_pseudo_reg;
+
+  /* Pseudo register name for PC.  Set this to NULL to disable pseudo PC
+     register support.  */
+  const char *pc_pseudo_reg;
+
   /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
      register), excluding the x87 bit, which are supported by this GDB.  */

Re: [PATCH 1/3] Add sp_regnum_from_eax and pc_regnum_from_eax

[H.J. Lu]

On Tue, Jul 3, 2012 at 10:35 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Tue, Jul 3, 2012 at 8:54 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
>> On Tue, Jul 3, 2012 at 7:08 AM, Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>>>> Date: Thu, 21 Jun 2012 11:14:52 -0700
>>>> From: "H.J. Lu" <hongjiu.lu@intel.com>
>>>>
>>>> Hi,
>>>>
>>>> Here are the first of the last 3 patches for x32 support in GDB.  This
>>>> patch maps $pc to $eip and $sp to $esp for x32.  OK to install?
>>>
>>> The pseudo register handling code is getting too complex :(.  I feel
>>> that hiding the set_gdbarch_pc_regnum() and set_gdbarch_sp_regnum()
>>> calls in i386-tdep.c isn't the right approach.  But I haven't found a
>>> better one yet :(.
>>>
>>
>> One possibility is to set pc/sp to register name instead of regnum.
>> i386_gdbarch_init can map them to regnum after all pseudo registers
>> are finalized.
>>
>> --
>> H.J.
>
> How about this patch? I can also change amd64 and i386
> to use "rsp/"rsp"/"esp"/"eip".
>

This patch sets SP?PC regnums from register names.


-- 
H.J.
---
	* amd64-tdep.c (amd64_init_abi): Set sp_reg to "rsp" and pc_reg
	to "rip".  Don't call set_gdbarch_sp_regnum nor
	set_gdbarch_pc_regnum here.
	(amd64_x32_init_abi): Set sp_reg to "esp" and pc_reg to "eip".

	* i386-tdep.c (i386_gdbarch_init): Set sp_reg to "esp" and
	pc_reg to "eip".  Set SP regnum from sp_reg and PC regnum from
	pc_reg.

	* i386-tdep.h (gdbarch_tdep): Add sp_reg and pc_reg.

diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index 8ae1142..eeb21c3 100644
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -2845,9 +2845,11 @@ amd64_init_abi (struct gdbarch_info info,
struct gdbarch *gdbarch)

   set_gdbarch_num_regs (gdbarch, AMD64_NUM_REGS);

+  /* Names of SP and PC registers.  */
+  tdep->sp_reg = "rsp";
+  tdep->pc_reg = "rip";
+
   /* Register numbers of various important registers.  */
-  set_gdbarch_sp_regnum (gdbarch, AMD64_RSP_REGNUM); /* %rsp */
-  set_gdbarch_pc_regnum (gdbarch, AMD64_RIP_REGNUM); /* %rip */
   set_gdbarch_ps_regnum (gdbarch, AMD64_EFLAGS_REGNUM); /* %eflags */
   set_gdbarch_fp0_regnum (gdbarch, AMD64_ST0_REGNUM); /* %st(0) */

@@ -2946,6 +2948,10 @@ amd64_x32_init_abi (struct gdbarch_info info,
struct gdbarch *gdbarch)
     tdesc = tdesc_x32;
   tdep->tdesc = tdesc;

+  /* Names of SP and PC registers.  */
+  tdep->sp_reg = "esp";
+  tdep->pc_reg = "eip";
+
   tdep->num_dword_regs = 17;
   set_tdesc_pseudo_register_type (gdbarch, amd64_x32_pseudo_register_type);

diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
index fd5969d..67805d3 100644
--- a/gdb/i386-tdep.c
+++ b/gdb/i386-tdep.c
@@ -7610,6 +7610,7 @@ i386_gdbarch_init (struct gdbarch_info info,
struct gdbarch_list *arches)
   const struct target_desc *tdesc;
   int mm0_regnum;
   int ymm0_regnum;
+  int num_regs, regno, sp_pc_regs;

   /* If there is already a candidate, use it.  */
   arches = gdbarch_list_lookup_by_info (arches, &info);
@@ -7670,9 +7671,11 @@ i386_gdbarch_init (struct gdbarch_info info,
struct gdbarch_list *arches)
      alignment.  */
   set_gdbarch_long_double_bit (gdbarch, 96);

+  /* Names of SP and PC registers.  */
+  tdep->sp_reg = "esp";
+  tdep->pc_reg = "eip";
+
   /* Register numbers of various important registers.  */
-  set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */
-  set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */
   set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */
   set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */

@@ -7871,6 +7874,32 @@ i386_gdbarch_init (struct gdbarch_info info,
struct gdbarch_list *arches)
   else
     tdep->mm0_regnum = -1;

+  /* Set up SP and PC register numbers.  */
+  num_regs = (gdbarch_num_regs (gdbarch)
+	      + gdbarch_num_pseudo_regs (gdbarch));
+  sp_pc_regs = 0;
+  for (regno = 0; regno < num_regs; regno++)
+    {
+      const char *regname = tdesc_register_name (gdbarch, regno);
+      if (regname && regname[0] != '\0')
+	{
+	  if ((sp_pc_regs & 0x1) == 0
+	      && strcmp (regname, tdep->sp_reg) == 0)
+	    {
+	      set_gdbarch_sp_regnum (gdbarch, regno);
+	      sp_pc_regs |= 0x1;
+	    }
+	  else if ((sp_pc_regs & 0x2) == 0
+		   && strcmp (regname, tdep->pc_reg) == 0)
+	    {
+	      set_gdbarch_pc_regnum (gdbarch, regno);
+	      sp_pc_regs |= 0x2;
+	    }
+	}
+      if (sp_pc_regs == 0x3)
+	break;
+    }
+
   /* Hook in the legacy prologue-based unwinders last (fallback).  */
   frame_unwind_append_unwinder (gdbarch, &i386_stack_tramp_frame_unwind);
   frame_unwind_append_unwinder (gdbarch, &i386_sigtramp_frame_unwind);
diff --git a/gdb/i386-tdep.h b/gdb/i386-tdep.h
index 5f233f5..831f544 100644
--- a/gdb/i386-tdep.h
+++ b/gdb/i386-tdep.h
@@ -155,6 +155,12 @@ struct gdbarch_tdep
   /* Number of SSE registers.  */
   int num_xmm_regs;

+  /* Name for SP register.  */
+  const char *sp_reg;
+
+  /* Name for PC register.  */
+  const char *pc_reg;
+
   /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
      register), excluding the x87 bit, which are supported by this GDB.  */

Re: [PATCH 1/3] Add sp_regnum_from_eax and pc_regnum_from_eax

[H.J. Lu]

On Tue, Jul 3, 2012 at 12:14 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Tue, Jul 3, 2012 at 10:35 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
>> On Tue, Jul 3, 2012 at 8:54 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
>>> On Tue, Jul 3, 2012 at 7:08 AM, Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>>>>> Date: Thu, 21 Jun 2012 11:14:52 -0700
>>>>> From: "H.J. Lu" <hongjiu.lu@intel.com>
>>>>>
>>>>> Hi,
>>>>>
>>>>> Here are the first of the last 3 patches for x32 support in GDB.  This
>>>>> patch maps $pc to $eip and $sp to $esp for x32.  OK to install?
>>>>
>>>> The pseudo register handling code is getting too complex :(.  I feel
>>>> that hiding the set_gdbarch_pc_regnum() and set_gdbarch_sp_regnum()
>>>> calls in i386-tdep.c isn't the right approach.  But I haven't found a
>>>> better one yet :(.
>>>>
>>>
>>> One possibility is to set pc/sp to register name instead of regnum.
>>> i386_gdbarch_init can map them to regnum after all pseudo registers
>>> are finalized.
>>>
>>> --
>>> H.J.
>>
>> How about this patch? I can also change amd64 and i386
>> to use "rsp/"rsp"/"esp"/"eip".
>>
>
> This patch sets SP?PC regnums from register names.
>
>

Here is another approach to set SP/PC regnums after
setting up pseudo registers.

-- 
H.J.
---
	* amd64-tdep.c (amd64_init_abi): Set sp_regnum to AMD64_RSP_REGNUM
	and set pc_regnum to AMD64_RIP_REGNUM.  Don't call
	set_gdbarch_sp_regnum nor set_gdbarch_pc_regnum here.
	(amd64_x32_init_abi): Set sp_regnum to -AMD64_RSP_REGNUM and set
	pc_regnum to -AMD64_RIP_REGNUM.

	* i386-tdep.c (i386_gdbarch_init): Set sp_regnum to I386_ESP_REGNUM
	and set pc_regnum to I386_EIP_REGNUM.  Call set_gdbarch_sp_regnum
	and set_gdbarch_pc_regnum after setting up pseudo registers.

	* i386-tdep.h (gdbarch_tdep): Add sp_regnum and pc_regnum.

diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index 8ae1142..df0df08 100644
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -2846,8 +2846,8 @@ amd64_init_abi (struct gdbarch_info info, struct
gdbarch *gdbarch)
   set_gdbarch_num_regs (gdbarch, AMD64_NUM_REGS);

   /* Register numbers of various important registers.  */
-  set_gdbarch_sp_regnum (gdbarch, AMD64_RSP_REGNUM); /* %rsp */
-  set_gdbarch_pc_regnum (gdbarch, AMD64_RIP_REGNUM); /* %rip */
+  tdep->sp_regnum = AMD64_RSP_REGNUM; /* %rsp */
+  tdep->pc_regnum = AMD64_RIP_REGNUM; /* %rip */
   set_gdbarch_ps_regnum (gdbarch, AMD64_EFLAGS_REGNUM); /* %eflags */
   set_gdbarch_fp0_regnum (gdbarch, AMD64_ST0_REGNUM); /* %st(0) */

@@ -2946,6 +2946,9 @@ amd64_x32_init_abi (struct gdbarch_info info,
struct gdbarch *gdbarch)
     tdesc = tdesc_x32;
   tdep->tdesc = tdesc;

+  tdep->sp_regnum = -AMD64_RSP_REGNUM; /* %esp */
+  tdep->pc_regnum = -AMD64_RIP_REGNUM; /* %eip */
+
   tdep->num_dword_regs = 17;
   set_tdesc_pseudo_register_type (gdbarch, amd64_x32_pseudo_register_type);

diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
index fd5969d..a287785 100644
--- a/gdb/i386-tdep.c
+++ b/gdb/i386-tdep.c
@@ -7671,8 +7671,8 @@ i386_gdbarch_init (struct gdbarch_info info,
struct gdbarch_list *arches)
   set_gdbarch_long_double_bit (gdbarch, 96);

   /* Register numbers of various important registers.  */
-  set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */
-  set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */
+  tdep->sp_regnum = I386_ESP_REGNUM; /* %esp */
+  tdep->pc_regnum = I386_EIP_REGNUM; /* %eip */
   set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */
   set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */

@@ -7871,6 +7871,16 @@ i386_gdbarch_init (struct gdbarch_info info,
struct gdbarch_list *arches)
   else
     tdep->mm0_regnum = -1;

+  /* Set up SP and PC register numbers.  */
+  set_gdbarch_sp_regnum (gdbarch,
+			 tdep->sp_regnum >= 0
+			 ? tdep->sp_regnum
+			 : tdep->eax_regnum - tdep->sp_regnum);
+  set_gdbarch_pc_regnum (gdbarch,
+			 tdep->pc_regnum >= 0
+			 ? tdep->pc_regnum
+			 : tdep->eax_regnum - tdep->pc_regnum);
+
   /* Hook in the legacy prologue-based unwinders last (fallback).  */
   frame_unwind_append_unwinder (gdbarch, &i386_stack_tramp_frame_unwind);
   frame_unwind_append_unwinder (gdbarch, &i386_sigtramp_frame_unwind);
diff --git a/gdb/i386-tdep.h b/gdb/i386-tdep.h
index 5f233f5..99b5f42 100644
--- a/gdb/i386-tdep.h
+++ b/gdb/i386-tdep.h
@@ -149,6 +149,14 @@ struct gdbarch_tdep
      of pseudo dword register support.  */
   int eax_regnum;

+  /* Register number for SP.  If it < 0, SP register number is
+     eax_regnum - sp_regnum.  */
+  int sp_regnum;
+
+  /* Register number for PC.  If it < 0, PC register number is
+     eax_regnum - pc_regnum.  */
+  int pc_regnum;
+
   /* Number of core registers.  */
   int num_core_regs;

Re: [PATCH 1/3] Add sp_regnum_from_eax and pc_regnum_from_eax

[Mark Kettenis]

> Date: Tue, 3 Jul 2012 16:55:59 -0700
> From: "H.J. Lu" <hjl.tools@gmail.com>
> 
> On Tue, Jul 3, 2012 at 12:14 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
> > On Tue, Jul 3, 2012 at 10:35 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
> >> On Tue, Jul 3, 2012 at 8:54 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
> >>> On Tue, Jul 3, 2012 at 7:08 AM, Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
> >>>>> Date: Thu, 21 Jun 2012 11:14:52 -0700
> >>>>> From: "H.J. Lu" <hongjiu.lu@intel.com>
> >>>>>
> >>>>> Hi,
> >>>>>
> >>>>> Here are the first of the last 3 patches for x32 support in GDB.  This
> >>>>> patch maps $pc to $eip and $sp to $esp for x32.  OK to install?
> >>>>
> >>>> The pseudo register handling code is getting too complex :(.  I feel
> >>>> that hiding the set_gdbarch_pc_regnum() and set_gdbarch_sp_regnum()
> >>>> calls in i386-tdep.c isn't the right approach.  But I haven't found a
> >>>> better one yet :(.
> >>>>
> >>>
> >>> One possibility is to set pc/sp to register name instead of regnum.
> >>> i386_gdbarch_init can map them to regnum after all pseudo registers
> >>> are finalized.
> >>>
> >>> --
> >>> H.J.
> >>
> >> How about this patch? I can also change amd64 and i386
> >> to use "rsp/"rsp"/"esp"/"eip".
> >>
> >
> > This patch sets SP?PC regnums from register names.
> >
> >
> 
> Here is another approach to set SP/PC regnums after
> setting up pseudo registers.

I've come to the conclusion that the speudo register handling in
i386/amd64 needs some serious surgery.  I think your origional diff:

http://sourceware.org/ml/gdb-patches/2012-06/msg00664.html

is the least invasive.  Can you commit that one?

> -- 
> H.J.
> ---
> 	* amd64-tdep.c (amd64_init_abi): Set sp_regnum to AMD64_RSP_REGNUM
> 	and set pc_regnum to AMD64_RIP_REGNUM.  Don't call
> 	set_gdbarch_sp_regnum nor set_gdbarch_pc_regnum here.
> 	(amd64_x32_init_abi): Set sp_regnum to -AMD64_RSP_REGNUM and set
> 	pc_regnum to -AMD64_RIP_REGNUM.
> 
> 	* i386-tdep.c (i386_gdbarch_init): Set sp_regnum to I386_ESP_REGNUM
> 	and set pc_regnum to I386_EIP_REGNUM.  Call set_gdbarch_sp_regnum
> 	and set_gdbarch_pc_regnum after setting up pseudo registers.
> 
> 	* i386-tdep.h (gdbarch_tdep): Add sp_regnum and pc_regnum.
> 
> diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
> index 8ae1142..df0df08 100644
> --- a/gdb/amd64-tdep.c
> +++ b/gdb/amd64-tdep.c
> @@ -2846,8 +2846,8 @@ amd64_init_abi (struct gdbarch_info info, struct
> gdbarch *gdbarch)
>    set_gdbarch_num_regs (gdbarch, AMD64_NUM_REGS);
> 
>    /* Register numbers of various important registers.  */
> -  set_gdbarch_sp_regnum (gdbarch, AMD64_RSP_REGNUM); /* %rsp */
> -  set_gdbarch_pc_regnum (gdbarch, AMD64_RIP_REGNUM); /* %rip */
> +  tdep->sp_regnum = AMD64_RSP_REGNUM; /* %rsp */
> +  tdep->pc_regnum = AMD64_RIP_REGNUM; /* %rip */
>    set_gdbarch_ps_regnum (gdbarch, AMD64_EFLAGS_REGNUM); /* %eflags */
>    set_gdbarch_fp0_regnum (gdbarch, AMD64_ST0_REGNUM); /* %st(0) */
> 
> @@ -2946,6 +2946,9 @@ amd64_x32_init_abi (struct gdbarch_info info,
> struct gdbarch *gdbarch)
>      tdesc = tdesc_x32;
>    tdep->tdesc = tdesc;
> 
> +  tdep->sp_regnum = -AMD64_RSP_REGNUM; /* %esp */
> +  tdep->pc_regnum = -AMD64_RIP_REGNUM; /* %eip */
> +
>    tdep->num_dword_regs = 17;
>    set_tdesc_pseudo_register_type (gdbarch, amd64_x32_pseudo_register_type);
> 
> diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
> index fd5969d..a287785 100644
> --- a/gdb/i386-tdep.c
> +++ b/gdb/i386-tdep.c
> @@ -7671,8 +7671,8 @@ i386_gdbarch_init (struct gdbarch_info info,
> struct gdbarch_list *arches)
>    set_gdbarch_long_double_bit (gdbarch, 96);
> 
>    /* Register numbers of various important registers.  */
> -  set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */
> -  set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */
> +  tdep->sp_regnum = I386_ESP_REGNUM; /* %esp */
> +  tdep->pc_regnum = I386_EIP_REGNUM; /* %eip */
>    set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */
>    set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */
> 
> @@ -7871,6 +7871,16 @@ i386_gdbarch_init (struct gdbarch_info info,
> struct gdbarch_list *arches)
>    else
>      tdep->mm0_regnum = -1;
> 
> +  /* Set up SP and PC register numbers.  */
> +  set_gdbarch_sp_regnum (gdbarch,
> +			 tdep->sp_regnum >= 0
> +			 ? tdep->sp_regnum
> +			 : tdep->eax_regnum - tdep->sp_regnum);
> +  set_gdbarch_pc_regnum (gdbarch,
> +			 tdep->pc_regnum >= 0
> +			 ? tdep->pc_regnum
> +			 : tdep->eax_regnum - tdep->pc_regnum);
> +
>    /* Hook in the legacy prologue-based unwinders last (fallback).  */
>    frame_unwind_append_unwinder (gdbarch, &i386_stack_tramp_frame_unwind);
>    frame_unwind_append_unwinder (gdbarch, &i386_sigtramp_frame_unwind);
> diff --git a/gdb/i386-tdep.h b/gdb/i386-tdep.h
> index 5f233f5..99b5f42 100644
> --- a/gdb/i386-tdep.h
> +++ b/gdb/i386-tdep.h
> @@ -149,6 +149,14 @@ struct gdbarch_tdep
>       of pseudo dword register support.  */
>    int eax_regnum;
> 
> +  /* Register number for SP.  If it < 0, SP register number is
> +     eax_regnum - sp_regnum.  */
> +  int sp_regnum;
> +
> +  /* Register number for PC.  If it < 0, PC register number is
> +     eax_regnum - pc_regnum.  */
> +  int pc_regnum;
> +
>    /* Number of core registers.  */
>    int num_core_regs;
> 

Re: [PATCH 1/3] Add sp_regnum_from_eax and pc_regnum_from_eax

[H.J. Lu]

On Wed, Jul 4, 2012 at 12:53 PM, Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>> Date: Tue, 3 Jul 2012 16:55:59 -0700
>> From: "H.J. Lu" <hjl.tools@gmail.com>
>>
>> On Tue, Jul 3, 2012 at 12:14 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
>> > On Tue, Jul 3, 2012 at 10:35 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
>> >> On Tue, Jul 3, 2012 at 8:54 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
>> >>> On Tue, Jul 3, 2012 at 7:08 AM, Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>> >>>>> Date: Thu, 21 Jun 2012 11:14:52 -0700
>> >>>>> From: "H.J. Lu" <hongjiu.lu@intel.com>
>> >>>>>
>> >>>>> Hi,
>> >>>>>
>> >>>>> Here are the first of the last 3 patches for x32 support in GDB.  This
>> >>>>> patch maps $pc to $eip and $sp to $esp for x32.  OK to install?
>> >>>>
>> >>>> The pseudo register handling code is getting too complex :(.  I feel
>> >>>> that hiding the set_gdbarch_pc_regnum() and set_gdbarch_sp_regnum()
>> >>>> calls in i386-tdep.c isn't the right approach.  But I haven't found a
>> >>>> better one yet :(.
>> >>>>
>> >>>
>> >>> One possibility is to set pc/sp to register name instead of regnum.
>> >>> i386_gdbarch_init can map them to regnum after all pseudo registers
>> >>> are finalized.
>> >>>
>> >>> --
>> >>> H.J.
>> >>
>> >> How about this patch? I can also change amd64 and i386
>> >> to use "rsp/"rsp"/"esp"/"eip".
>> >>
>> >
>> > This patch sets SP?PC regnums from register names.
>> >
>> >
>>
>> Here is another approach to set SP/PC regnums after
>> setting up pseudo registers.
>
> I've come to the conclusion that the speudo register handling in
> i386/amd64 needs some serious surgery.  I think your origional diff:
>
> http://sourceware.org/ml/gdb-patches/2012-06/msg00664.html
>
> is the least invasive.  Can you commit that one?
>

Done.  This is the last x32 patch for now.  I checked in
this patch to mention it in NEWS.

Thanks.

-- 
H.J.
--
Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/gdb/ChangeLog,v
retrieving revision 1.14431
diff -u -p -r1.14431 ChangeLog
--- ChangeLog	4 Jul 2012 20:46:18 -0000	1.14431
+++ ChangeLog	4 Jul 2012 20:49:14 -0000
@@ -1,5 +1,9 @@
 2012-07-04  H.J. Lu  <hongjiu.lu@intel.com>

+	* NEWS: Mention x32 ABI support.
+
+2012-07-04  H.J. Lu  <hongjiu.lu@intel.com>
+
 	* amd64-tdep.c (amd64_x32_init_abi): Set sp_regnum_from_eax to
 	AMD64_RSP_REGNUM and pc_regnum_from_eax to AMD64_RIP_REGNUM.

Index: NEWS
===================================================================
RCS file: /cvs/src/src/gdb/NEWS,v
retrieving revision 1.532
diff -u -p -r1.532 NEWS
--- NEWS	2 Jul 2012 15:29:33 -0000	1.532
+++ NEWS	4 Jul 2012 20:49:14 -0000
@@ -3,6 +3,9 @@

 *** Changes since GDB 7.4

+* GDB now supports x32 ABI.  Visit <http://sites.google.com/site/x32abi/>
+  for more x32 ABI info.
+
 * GDB now supports access to MIPS DSP registers on Linux targets.

 * GDB now supports debugging microMIPS binaries.