From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 20693 invoked by alias); 4 Jul 2012 19:53:34 -0000 Received: (qmail 20681 invoked by uid 22791); 4 Jul 2012 19:53:31 -0000 X-SWARE-Spam-Status: No, hits=-2.9 required=5.0 tests=AWL,BAYES_00,KHOP_THREADED,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from sibelius.xs4all.nl (HELO glazunov.sibelius.xs4all.nl) (83.163.83.176) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 04 Jul 2012 19:53:18 +0000 Received: from glazunov.sibelius.xs4all.nl (kettenis@localhost [127.0.0.1]) by glazunov.sibelius.xs4all.nl (8.14.5/8.14.3) with ESMTP id q64JrEAA024731; Wed, 4 Jul 2012 21:53:14 +0200 (CEST) Received: (from kettenis@localhost) by glazunov.sibelius.xs4all.nl (8.14.5/8.14.3/Submit) id q64JrCBG024384; Wed, 4 Jul 2012 21:53:12 +0200 (CEST) Date: Wed, 04 Jul 2012 19:53:00 -0000 Message-Id: <201207041953.q64JrCBG024384@glazunov.sibelius.xs4all.nl> From: Mark Kettenis To: hjl.tools@gmail.com CC: gdb-patches@sourceware.org In-reply-to: (hjl.tools@gmail.com) Subject: Re: [PATCH 1/3] Add sp_regnum_from_eax and pc_regnum_from_eax References: <20120621181452.GA23413@intel.com> <201207031408.q63E8DbR009742@glazunov.sibelius.xs4all.nl> Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2012-07/txt/msg00061.txt.bz2 > Date: Tue, 3 Jul 2012 16:55:59 -0700 > From: "H.J. Lu" > > On Tue, Jul 3, 2012 at 12:14 PM, H.J. Lu wrote: > > On Tue, Jul 3, 2012 at 10:35 AM, H.J. Lu wrote: > >> On Tue, Jul 3, 2012 at 8:54 AM, H.J. Lu wrote: > >>> On Tue, Jul 3, 2012 at 7:08 AM, Mark Kettenis wrote: > >>>>> Date: Thu, 21 Jun 2012 11:14:52 -0700 > >>>>> From: "H.J. Lu" > >>>>> > >>>>> Hi, > >>>>> > >>>>> Here are the first of the last 3 patches for x32 support in GDB. This > >>>>> patch maps $pc to $eip and $sp to $esp for x32. OK to install? > >>>> > >>>> The pseudo register handling code is getting too complex :(. I feel > >>>> that hiding the set_gdbarch_pc_regnum() and set_gdbarch_sp_regnum() > >>>> calls in i386-tdep.c isn't the right approach. But I haven't found a > >>>> better one yet :(. > >>>> > >>> > >>> One possibility is to set pc/sp to register name instead of regnum. > >>> i386_gdbarch_init can map them to regnum after all pseudo registers > >>> are finalized. > >>> > >>> -- > >>> H.J. > >> > >> How about this patch? I can also change amd64 and i386 > >> to use "rsp/"rsp"/"esp"/"eip". > >> > > > > This patch sets SP?PC regnums from register names. > > > > > > Here is another approach to set SP/PC regnums after > setting up pseudo registers. I've come to the conclusion that the speudo register handling in i386/amd64 needs some serious surgery. I think your origional diff: http://sourceware.org/ml/gdb-patches/2012-06/msg00664.html is the least invasive. Can you commit that one? > -- > H.J. > --- > * amd64-tdep.c (amd64_init_abi): Set sp_regnum to AMD64_RSP_REGNUM > and set pc_regnum to AMD64_RIP_REGNUM. Don't call > set_gdbarch_sp_regnum nor set_gdbarch_pc_regnum here. > (amd64_x32_init_abi): Set sp_regnum to -AMD64_RSP_REGNUM and set > pc_regnum to -AMD64_RIP_REGNUM. > > * i386-tdep.c (i386_gdbarch_init): Set sp_regnum to I386_ESP_REGNUM > and set pc_regnum to I386_EIP_REGNUM. Call set_gdbarch_sp_regnum > and set_gdbarch_pc_regnum after setting up pseudo registers. > > * i386-tdep.h (gdbarch_tdep): Add sp_regnum and pc_regnum. > > diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c > index 8ae1142..df0df08 100644 > --- a/gdb/amd64-tdep.c > +++ b/gdb/amd64-tdep.c > @@ -2846,8 +2846,8 @@ amd64_init_abi (struct gdbarch_info info, struct > gdbarch *gdbarch) > set_gdbarch_num_regs (gdbarch, AMD64_NUM_REGS); > > /* Register numbers of various important registers. */ > - set_gdbarch_sp_regnum (gdbarch, AMD64_RSP_REGNUM); /* %rsp */ > - set_gdbarch_pc_regnum (gdbarch, AMD64_RIP_REGNUM); /* %rip */ > + tdep->sp_regnum = AMD64_RSP_REGNUM; /* %rsp */ > + tdep->pc_regnum = AMD64_RIP_REGNUM; /* %rip */ > set_gdbarch_ps_regnum (gdbarch, AMD64_EFLAGS_REGNUM); /* %eflags */ > set_gdbarch_fp0_regnum (gdbarch, AMD64_ST0_REGNUM); /* %st(0) */ > > @@ -2946,6 +2946,9 @@ amd64_x32_init_abi (struct gdbarch_info info, > struct gdbarch *gdbarch) > tdesc = tdesc_x32; > tdep->tdesc = tdesc; > > + tdep->sp_regnum = -AMD64_RSP_REGNUM; /* %esp */ > + tdep->pc_regnum = -AMD64_RIP_REGNUM; /* %eip */ > + > tdep->num_dword_regs = 17; > set_tdesc_pseudo_register_type (gdbarch, amd64_x32_pseudo_register_type); > > diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c > index fd5969d..a287785 100644 > --- a/gdb/i386-tdep.c > +++ b/gdb/i386-tdep.c > @@ -7671,8 +7671,8 @@ i386_gdbarch_init (struct gdbarch_info info, > struct gdbarch_list *arches) > set_gdbarch_long_double_bit (gdbarch, 96); > > /* Register numbers of various important registers. */ > - set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */ > - set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */ > + tdep->sp_regnum = I386_ESP_REGNUM; /* %esp */ > + tdep->pc_regnum = I386_EIP_REGNUM; /* %eip */ > set_gdbarch_ps_regnum (gdbarch, I386_EFLAGS_REGNUM); /* %eflags */ > set_gdbarch_fp0_regnum (gdbarch, I386_ST0_REGNUM); /* %st(0) */ > > @@ -7871,6 +7871,16 @@ i386_gdbarch_init (struct gdbarch_info info, > struct gdbarch_list *arches) > else > tdep->mm0_regnum = -1; > > + /* Set up SP and PC register numbers. */ > + set_gdbarch_sp_regnum (gdbarch, > + tdep->sp_regnum >= 0 > + ? tdep->sp_regnum > + : tdep->eax_regnum - tdep->sp_regnum); > + set_gdbarch_pc_regnum (gdbarch, > + tdep->pc_regnum >= 0 > + ? tdep->pc_regnum > + : tdep->eax_regnum - tdep->pc_regnum); > + > /* Hook in the legacy prologue-based unwinders last (fallback). */ > frame_unwind_append_unwinder (gdbarch, &i386_stack_tramp_frame_unwind); > frame_unwind_append_unwinder (gdbarch, &i386_sigtramp_frame_unwind); > diff --git a/gdb/i386-tdep.h b/gdb/i386-tdep.h > index 5f233f5..99b5f42 100644 > --- a/gdb/i386-tdep.h > +++ b/gdb/i386-tdep.h > @@ -149,6 +149,14 @@ struct gdbarch_tdep > of pseudo dword register support. */ > int eax_regnum; > > + /* Register number for SP. If it < 0, SP register number is > + eax_regnum - sp_regnum. */ > + int sp_regnum; > + > + /* Register number for PC. If it < 0, PC register number is > + eax_regnum - pc_regnum. */ > + int pc_regnum; > + > /* Number of core registers. */ > int num_core_regs; >