Please fix regressions from your sim changes

Please fix regressions from your sim changes

[Hans-Peter Nilsson]

My autotester screams.  Please fix cris-elf and mips-elf.

For mips-elf, there's just
Running /tmp/hpautotest-sim/src/sim/testsuite/sim/mips/basic.exp ...
FAIL: mips1 hilo-hazard-1.s (execution)
FAIL: mips1 hilo-hazard-1.s (execution)
FAIL: mips1 hilo-hazard-1.s (execution)
FAIL: mips1 hilo-hazard-1.s (execution)
FAIL: mips1 hilo-hazard-1.s (execution)
FAIL: mips1 hilo-hazard-1.s (execution)
FAIL: mips1 hilo-hazard-1.s (execution)
FAIL: mips1 hilo-hazard-1.s (execution)
FAIL: mips1 hilo-hazard-1.s (execution)
FAIL: mips1 hilo-hazard-1.s (execution)
FAIL: mips1 hilo-hazard-1.s (execution)
FAIL: mips1 hilo-hazard-1.s (execution)

From sim.log it seems just some expected patterns need updating.

Executing on host: mips-elf-ld hilo-hazard-1.s.o -N -Ttext=0x80010000   -o hilo-hazard-1.s.x    (timeout = 300)
/tmp/hpautotest-sim/mips-elf/sim/mips/run     hilo-hazard-1.s.x 
HILO: MULT: OP at 0x80010048 too close to MF at 0x80010044

output:  HILO: MULT: OP at 0x80010048 too close to MF at 0x80010044


pattern: HILO: * too close to MF at *\
\
program stopped*\

FAIL: mips1 hilo-hazard-1.s (execution)


For cris-elf, there's quite a bit more, three variants AFAICT;
three "signals" lost.

Test Run By hp on Mon Mar 19 05:31:34 2012
Target is cris-axis-elf
Host   is x86_64-unknown-linux-gnu

		=== sim tests ===

Schedule of variations:
    cris-sim

Running target cris-sim
Using ~/dejagnuboards/cris-sim.exp as board description file for target.
Using /usr/share/dejagnu/config/sim.exp as generic interface file for target.
Using /usr/share/dejagnu/baseboards/basic-sim.exp as board description file for target.
Using /tmp/hpautotest-sim/src/sim/testsuite/config/default.exp as tool-and-target-specific interface file.
Running /tmp/hpautotest-sim/src/sim/testsuite/sim/arm/allinsn.exp ...
Running /tmp/hpautotest-sim/src/sim/testsuite/sim/arm/iwmmxt/iwmmxt.exp ...
Running /tmp/hpautotest-sim/src/sim/testsuite/sim/arm/misc.exp ...
Running /tmp/hpautotest-sim/src/sim/testsuite/sim/arm/thumb/allthumb.exp ...
Running /tmp/hpautotest-sim/src/sim/testsuite/sim/arm/xscale/xscale.exp ...
Running /tmp/hpautotest-sim/src/sim/testsuite/sim/bfin/allinsn.exp ...
Running /tmp/hpautotest-sim/src/sim/testsuite/sim/cr16/allinsn.exp ...
Running /tmp/hpautotest-sim/src/sim/testsuite/sim/cr16/misc.exp ...
Running /tmp/hpautotest-sim/src/sim/testsuite/sim/cris/asm/asm.exp ...
FAIL: crisv10 addqpc.ms (execution)
FAIL: crisv10 movecpc.ms (execution)
FAIL: crisv10 movempc.ms (execution)
FAIL: crisv10 movepcb.ms (execution)
FAIL: crisv10 movepcd.ms (execution)
FAIL: crisv10 movepcw.ms (execution)
FAIL: crisv10 moveqpc.ms (execution)
FAIL: crisv10 moverbpc.ms (execution)
FAIL: crisv10 moverdpc.ms (execution)
FAIL: crisv10 moverpcb.ms (execution)
FAIL: crisv10 moverpcw.ms (execution)
FAIL: crisv10 moverwpc.ms (execution)
FAIL: crisv10 movppc.ms (execution)
FAIL: crisv10 movscpc.ms (execution)
FAIL: crisv10 movsmpc.ms (execution)
FAIL: crisv10 movsrpc.ms (execution)
FAIL: crisv10 movucpc.ms (execution)
FAIL: crisv10 movumpc.ms (execution)
FAIL: crisv10 movurpc.ms (execution)
FAIL: crisv10 msteppc1.ms (execution)
FAIL: crisv10 msteppc2.ms (execution)
FAIL: crisv10 msteppc3.ms (execution)
FAIL: crisv10 sbfs.ms (execution)
FAIL: crisv10 subqpc.ms (execution)
FAIL: crisv32 boundmv32.ms (execution)
FAIL: crisv32 fidxd.ms (execution)
FAIL: crisv32 fidxi.ms (execution)
FAIL: crisv32 ftagd.ms (execution)
FAIL: crisv32 ftagi.ms (execution)
FAIL: crisv32 halt.ms (execution)
FAIL: crisv32 io6.ms (execution)
FAIL: crisv32 io7.ms (execution)
FAIL: crisv32 io8.ms (execution)
FAIL: crisv32 io9.ms (execution)
FAIL: crisv32 movrss.ms (execution)
FAIL: crisv32 movssr.ms (execution)
FAIL: crisv32 rfg.ms (execution)

In the sim.log, I see:
Executing on host: cris-elf-ld addqpc.ms.o     -o addqpc.ms.x    (timeout = 300)
/tmp/hpautotest-sim/cris-elf/sim/cris/run     addqpc.ms.x 
General register read of PC is not implemented.
output:  General register read of PC is not implemented.

pattern: General register read of PC is not implemented.
program stopped with signal 5.

FAIL: crisv10 addqpc.ms (execution)

Most failures are similar.  As the CRIS simulator just calls
cgen_rtx_error for these errors there's no need to provide a
specific faked signal number, but at least the test-suite needs
adjusting.  Still, see below.

Similarly the lost "SIGSEGV" messages:

Executing on host: cris-elf-as /tmp/hpautotest-sim/src/sim/testsuite/sim/cris/asm/io9.ms  -I/tmp/hpautotest-sim/src/sim/
testsuite/sim/cris/asm  --march=v32 -o io9.ms.o    (timeout = 300)
Executing on host: cris-elf-ld io9.ms.o --section-start=.text=0    -o io9.ms.x    (timeout = 300)
/tmp/hpautotest-sim/cris-elf/sim/cris/run     io9.ms.x 
ce11d0c
core: 4 byte write to unmapped address 0x90000004 at 0x16
output:  ce11d0c
core: 4 byte write to unmapped address 0x90000004 at 0x16

pattern: ce11d0c
core: 4 byte write to unmapped address 0x90000004 at 0x16
program stopped with signal 11.

FAIL: crisv32 io9.ms (execution)

I require not more than a test-suite tweak for these too.

For a few tests, matters are worse:
Executing on host: cris-elf-as /tmp/hpautotest-sim/src/sim/testsuite/sim/cris/asm/boundmv32.ms  -I/tmp/hpautotest-sim/sr
c/sim/testsuite/sim/cris/asm  --march=v32 -o boundmv32.ms.o    (timeout = 300)
Executing on host: cris-elf-ld boundmv32.ms.o     -o boundmv32.ms.x    (timeout = 300)
/tmp/hpautotest-sim/cris-elf/sim/cris/run     boundmv32.ms.x 
output:  
pattern: program stopped with signal 4.

FAIL: crisv32 boundmv32.ms (execution)

There, missing indication of cause.  Signal 4 is "always"
SIGILL, so the cause used to be unambiguous; now it just looks
like abort is called.  *Some* kind of indication that the CGEN
framework executed an illegal instruction is needed; it doesn't
have to be "signal 4".  The output needs to be fixed adding an
indication.

And really, why removing the "program stopped with signal"
common part?  I see no reason to not just adding it back.

Also, be more careful when testing your changes.

brgds, H-P

Re: Please fix regressions from your sim changes

[Mike Frysinger]

[-- Attachment #1.1: Type: Text/Plain, Size: 1117 bytes --]

On Monday 19 March 2012 02:28:49 Hans-Peter Nilsson wrote:
> For mips-elf, there's just

mips-elf is passing for me

> From sim.log it seems just some expected patterns need updating.
> 
> Executing on host: mips-elf-ld hilo-hazard-1.s.o -N -Ttext=0x80010000   -o
> hilo-hazard-1.s.x    (timeout = 300)
> /tmp/hpautotest-sim/mips-elf/sim/mips/run     hilo-hazard-1.s.x
> HILO: MULT: OP at 0x80010048 too close to MF at 0x80010044
> 
> output:  HILO: MULT: OP at 0x80010048 too close to MF at 0x80010044
> 
> 
> pattern: HILO: * too close to MF at *\
> \
> program stopped*\
> 
> FAIL: mips1 hilo-hazard-1.s (execution)

the glob should eat the new signal string

> For cris-elf, there's quite a bit more, three variants AFAICT;
> three "signals" lost.

patch attached should fix that

> And really, why removing the "program stopped with signal"
> common part?  I see no reason to not just adding it back.

it wasn't removed.  the signal is now additionally being decoded.

before: program stopped with signal 5.
after: program stopped with signal 5 (Trace/breakpoint trap).
-mike

[-- Attachment #1.2: sim-cris-testsuite.patch --]
[-- Type: text/x-patch, Size: 13526 bytes --]

--- sim/testsuite/sim/cris/asm/addqpc.ms
+++ sim/testsuite/sim/cris/asm/addqpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/boundmv32.ms
+++ sim/testsuite/sim/cris/asm/boundmv32.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: program stopped with signal 4.\n
+# output: program stopped with signal 4 (*).\n
  .include "testutils.inc"
 
 ; Check that bound with a memory operand is invalid.
--- sim/testsuite/sim/cris/asm/fidxd.ms
+++ sim/testsuite/sim/cris/asm/fidxd.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: FIDXD isn't implemented\nprogram stopped with signal 5.\n
+# output: FIDXD isn't implemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/fidxi.ms
+++ sim/testsuite/sim/cris/asm/fidxi.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: FIDXI isn't implemented\nprogram stopped with signal 5.\n
+# output: FIDXI isn't implemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/ftagd.ms
+++ sim/testsuite/sim/cris/asm/ftagd.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: FTAGD isn't implemented\nprogram stopped with signal 5.\n
+# output: FTAGD isn't implemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/ftagi.ms
+++ sim/testsuite/sim/cris/asm/ftagi.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: FTAGI isn't implemented\nprogram stopped with signal 5.\n
+# output: FTAGI isn't implemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/halt.ms
+++ sim/testsuite/sim/cris/asm/halt.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: HALT isn't implemented\nprogram stopped with signal 5.\n
+# output: HALT isn't implemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/io6.ms
+++ sim/testsuite/sim/cris/asm/io6.ms
@@ -4,7 +4,7 @@
 # xerror:
 # output: b1e\n
 # output: core: 4 byte write to unmapped address 0x90000008 at 0x16\n
-# output: program stopped with signal 11.\n
+# output: program stopped with signal 11 (*).\n
 
 ; Check that invalid access to the simulator area is recognized.
 ; "FAIL" area.
--- sim/testsuite/sim/cris/asm/io7.ms
+++ sim/testsuite/sim/cris/asm/io7.ms
@@ -4,7 +4,7 @@
 # xerror:
 # output: ce11d0c\n
 # output: core: 4 byte write to unmapped address 0x90000004 at 0x16\n
-# output: program stopped with signal 11.\n
+# output: program stopped with signal 11 (*).\n
 
 ; Check that invalid access to the simulator area is recognized.
 ; "PASS" area.
--- sim/testsuite/sim/cris/asm/io8.ms
+++ sim/testsuite/sim/cris/asm/io8.ms
@@ -3,7 +3,7 @@
 # xerror:
 # output: b1e\n
 # output: core: 4 byte write to unmapped address 0x90000008 at 0x16\n
-# output: program stopped with signal 11.\n
+# output: program stopped with signal 11 (*).\n
 
 ; Check invalid access valid with --cris-900000xx.
 ; "FAIL" area.
--- sim/testsuite/sim/cris/asm/io9.ms
+++ sim/testsuite/sim/cris/asm/io9.ms
@@ -3,7 +3,7 @@
 # xerror:
 # output: ce11d0c\n
 # output: core: 4 byte write to unmapped address 0x90000004 at 0x16\n
-# output: program stopped with signal 11.\n
+# output: program stopped with signal 11 (*).\n
 
 ; Check invalid access valid with --cris-900000xx.
 ; "PASS" area.
--- sim/testsuite/sim/cris/asm/movecpc.ms
+++ sim/testsuite/sim/cris/asm/movecpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register * PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register * PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
 # We deliberately match both "read from" and "write to" above.
 
--- sim/testsuite/sim/cris/asm/movempc.ms
+++ sim/testsuite/sim/cris/asm/movempc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/movepcb.ms
+++ sim/testsuite/sim/cris/asm/movepcb.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack
--- sim/testsuite/sim/cris/asm/movepcd.ms
+++ sim/testsuite/sim/cris/asm/movepcd.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register * PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register * PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
 # Both source and dest contain PC for "test.d r" (move.d r,r).  Ideally,
 # the output message should say "read" of PC, but we allow PC as source in
--- sim/testsuite/sim/cris/asm/movepcw.ms
+++ sim/testsuite/sim/cris/asm/movepcw.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack
--- sim/testsuite/sim/cris/asm/moveqpc.ms
+++ sim/testsuite/sim/cris/asm/moveqpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack
--- sim/testsuite/sim/cris/asm/moverbpc.ms
+++ sim/testsuite/sim/cris/asm/moverbpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack
--- sim/testsuite/sim/cris/asm/moverdpc.ms
+++ sim/testsuite/sim/cris/asm/moverdpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack
--- sim/testsuite/sim/cris/asm/moverpcb.ms
+++ sim/testsuite/sim/cris/asm/moverpcb.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack
--- sim/testsuite/sim/cris/asm/moverpcw.ms
+++ sim/testsuite/sim/cris/asm/moverpcw.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack
--- sim/testsuite/sim/cris/asm/moverwpc.ms
+++ sim/testsuite/sim/cris/asm/moverwpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack
--- sim/testsuite/sim/cris/asm/movppc.ms
+++ sim/testsuite/sim/cris/asm/movppc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/movrss.ms
+++ sim/testsuite/sim/cris/asm/movrss.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: Write to support register is unimplemented\nprogram stopped with signal 5.\n
+# output: Write to support register is unimplemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/movscpc.ms
+++ sim/testsuite/sim/cris/asm/movscpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/movsmpc.ms
+++ sim/testsuite/sim/cris/asm/movsmpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/movsrpc.ms
+++ sim/testsuite/sim/cris/asm/movsrpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/movssr.ms
+++ sim/testsuite/sim/cris/asm/movssr.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: Read of support register is unimplemented\nprogram stopped with signal 5.\n
+# output: Read of support register is unimplemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/movucpc.ms
+++ sim/testsuite/sim/cris/asm/movucpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/movumpc.ms
+++ sim/testsuite/sim/cris/asm/movumpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/movurpc.ms
+++ sim/testsuite/sim/cris/asm/movurpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/msteppc1.ms
+++ sim/testsuite/sim/cris/asm/msteppc1.ms
@@ -1,7 +1,7 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
 # output: General register read of PC is not implemented.\n
-# output: program stopped with signal 5.\n
+# output: program stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/msteppc2.ms
+++ sim/testsuite/sim/cris/asm/msteppc2.ms
@@ -1,7 +1,7 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
 # output: General register read of PC is not implemented.\n
-# output: program stopped with signal 5.\n
+# output: program stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/msteppc3.ms
+++ sim/testsuite/sim/cris/asm/msteppc3.ms
@@ -1,7 +1,7 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
 # output: General register read of PC is not implemented.\n
-# output: program stopped with signal 5.\n
+# output: program stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/rfg.ms
+++ sim/testsuite/sim/cris/asm/rfg.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: RFG isn't implemented\nprogram stopped with signal 5.\n
+# output: RFG isn't implemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/sbfs.ms
+++ sim/testsuite/sim/cris/asm/sbfs.ms
@@ -1,6 +1,6 @@
 # mach: crisv10
 # xerror:
-# output: SBFS isn't implemented\nprogram stopped with signal 5.\n
+# output: SBFS isn't implemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start
--- sim/testsuite/sim/cris/asm/subqpc.ms
+++ sim/testsuite/sim/cris/asm/subqpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

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Re: Please fix regressions from your sim changes

[Hans-Peter Nilsson]

> From: Mike Frysinger <vapier@gentoo.org>
> Date: Mon, 19 Mar 2012 18:22:39 +0100
(CC to the list disappeared much like the test-case output,
sorry Mike for getting this twice.)

> On Monday 19 March 2012 02:28:49 Hans-Peter Nilsson wrote:
> > For mips-elf, there's just
> 
> mips-elf is passing for me
> > FAIL: mips1 hilo-hazard-1.s (execution)
> 
> the glob should eat the new signal string
> 
> > For cris-elf, there's quite a bit more, three variants AFAICT;
> > three "signals" lost.
> 
> patch attached should fix that
> 
> > And really, why removing the "program stopped with signal"
> > common part?  I see no reason to not just adding it back.
> 
> it wasn't removed.  the signal is now additionally being decoded.
> 
> before: program stopped with signal 5.
> after: program stopped with signal 5 (Trace/breakpoint trap).

That's what you'd think (and that'd be an improvement), but the
message really is all gone.  Is it a host issue?  The tester
host is admittedly an aging installation, F 8 x86_64.

brgds, H-P

Re: Please fix regressions from your sim changes

[Mike Frysinger]

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On Monday 19 March 2012 19:50:42 Hans-Peter Nilsson wrote:
> From: Mike Frysinger <vapier@gentoo.org>
> > On Monday 19 March 2012 02:28:49 Hans-Peter Nilsson wrote:
> > > For mips-elf, there's just
> > 
> > mips-elf is passing for me
> > 
> > > FAIL: mips1 hilo-hazard-1.s (execution)
> > 
> > the glob should eat the new signal string
> > 
> > > And really, why removing the "program stopped with signal"
> > > common part?  I see no reason to not just adding it back.
> > 
> > it wasn't removed.  the signal is now additionally being decoded.
> > 
> > before: program stopped with signal 5.
> > after: program stopped with signal 5 (Trace/breakpoint trap).
> 
> That's what you'd think (and that'd be an improvement), but the
> message really is all gone.  Is it a host issue?  The tester
> host is admittedly an aging installation, F 8 x86_64.

if you run it manually, do you get the full string ?  it's passing on my side 
just fine:

spawn /usr/local/src/gnu/sourceware/build/build-mips/sim/testsuite/../mips/run 
hilo-hazard-1.s.x
HILO: MULT: OP at 0x80010048 too close to MF at 0x80010044

program stopped with signal 6 (Aborted).
PASS: mips1 hilo-hazard-1.s

you can see the commit in question clearly doesn't remove the msg:
--- a/sim/common/nrun.c
+++ b/sim/common/nrun.c
-	fprintf (stderr, "program stopped with signal %d.\n", sigrc);
+	fprintf (stderr, "program stopped with signal %d (%s).\n", sigrc,
+		strsignal (sigrc));

maybe strsignal() is crashing ?  what version of glibc ?
-mike

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Re: Please fix regressions from your sim changes

[Hans-Peter Nilsson]

> From: Mike Frysinger <vapier@gentoo.org>
> Date: Tue, 20 Mar 2012 03:30:20 +0100

> you can see the commit in question clearly doesn't remove the msg:
> --- a/sim/common/nrun.c
> +++ b/sim/common/nrun.c
> -	fprintf (stderr, "program stopped with signal %d.\n", sigrc);
> +	fprintf (stderr, "program stopped with signal %d (%s).\n", sigrc,
> +		strsignal (sigrc));

When paying attention, I see nrun.c:1.16 is missing an #include
to declare it.  See below.

> maybe strsignal() is crashing ?

Yes:
chimera-7:hp:/tmp/hpautotest-sim/cris-elf/sim/testsuite: /tmp/hpautotest-sim/cris-elf/sim/cris/run     addqpc.ms.x
General register read of PC is not implemented.
zsh: segmentation fault  /tmp/hpautotest-sim/cris-elf/sim/cris/run addqpc.ms.x

And in the build-log I see:
gcc -DHAVE_CONFIG_H   -DWITH_DEFAULT_MODEL='"crisv32"'  -DPROFILE=1 -DWITH_PROFILE=-1   -DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT   -DWITH_ENVIRONMENT=ALL_ENVIRONMENT  -DWITH_HW=0 -DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN     -DWITH_SCACHE=16384   -Wimplicit -Wreturn-type -Wcomment -Wtrigraphs -Wformat -Wparentheses -Wpointer-arith -Wuninitialized       -I. -I/tmp/r/sim/cris -I../common -I/tmp/r/sim/cris/../common -I../../include -I/tmp/r/sim/cris/../../include -I../../bfd -I/tmp/r/sim/cris/../../bfd -I../../opcodes -I/tmp/r/sim/cris/../../opcodes  -g -O2 -c -o nrun.o -MT nrun.o -MMD -MP -MF .deps/nrun.Tpo /tmp/r/sim/cris/../common/nrun.c
/tmp/r/sim/cris/../common/nrun.c: In function 'main':
/tmp/r/sim/cris/../common/nrun.c:206: warning: implicit declaration of function 'strsignal'
/tmp/r/sim/cris/../common/nrun.c:206: warning: format '%s' expects type 'char *', but argument 4 has type 'int'

Don't you see that warning?
Are you on a ILP32 host such as i686-linux-gnu, i.e.
sizeof (char *) == sizeof(int)?

It seems nowhere is there an include of string.h (just
pre-existing signal.h), see strerror(3). (TFM, not SIGQUIT :)
What was missing from your patch introducing the strsignal call,
is *not* the single obvious #define and #include.

Instead, to #define _GNU_SOURCE in the Right Way AFAIK, there
should be an AC_GNU_SOURCE (missing) in a configure.* used by
all src/sim/* (common/configure.ac AFAICT), and an #include
"cconfig.h" in nrun.c followed later by the mantra:

#ifdef HAVE_STRING_H
#include <string.h>
#else
#ifdef HAVE_STRINGS_H
#include <strings.h>
#endif
#endif

Or shorter, see run.c for how nrun.c needs to be.

And right, it's time to add -Wall -Werror to the sim compilation
options...

BTW, your testsuite fixes are both approved and obvious.

brgds, H-P

Re: Please fix regressions from your sim changes

[Mike Frysinger]

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On Tuesday 20 March 2012 01:54:27 Hans-Peter Nilsson wrote:
> From: Mike Frysinger <vapier@gentoo.org>
> > maybe strsignal() is crashing ?
> 
> Yes:
> chimera-7:hp:/tmp/hpautotest-sim/cris-elf/sim/testsuite:
> /tmp/hpautotest-sim/cris-elf/sim/cris/run     addqpc.ms.x General register
> read of PC is not implemented.
> zsh: segmentation fault  /tmp/hpautotest-sim/cris-elf/sim/cris/run
> addqpc.ms.x
> 
> And in the build-log I see:
> gcc -DHAVE_CONFIG_H   -DWITH_DEFAULT_MODEL='"crisv32"'  -DPROFILE=1
> -DWITH_PROFILE=-1   -DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT  
> -DWITH_ENVIRONMENT=ALL_ENVIRONMENT  -DWITH_HW=0
> -DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN     -DWITH_SCACHE=16384   -Wimplicit
> -Wreturn-type -Wcomment -Wtrigraphs -Wformat -Wparentheses -Wpointer-arith
> -Wuninitialized       -I. -I/tmp/r/sim/cris -I../common
> -I/tmp/r/sim/cris/../common -I../../include
> -I/tmp/r/sim/cris/../../include -I../../bfd -I/tmp/r/sim/cris/../../bfd
> -I../../opcodes -I/tmp/r/sim/cris/../../opcodes  -g -O2 -c -o nrun.o -MT
> nrun.o -MMD -MP -MF .deps/nrun.Tpo /tmp/r/sim/cris/../common/nrun.c
> /tmp/r/sim/cris/../common/nrun.c: In function 'main':
> /tmp/r/sim/cris/../common/nrun.c:206: warning: implicit declaration of
> function 'strsignal' /tmp/r/sim/cris/../common/nrun.c:206: warning: format
> '%s' expects type 'char *', but argument 4 has type 'int'
> 
> Don't you see that warning?

the code compiles warning free for me

> Are you on a ILP32 host such as i686-linux-gnu, i.e.
> sizeof (char *) == sizeof(int)?

no, x86_64-pc-linux-gnu

> It seems nowhere is there an include of string.h (just
> pre-existing signal.h), see strerror(3). (TFM, not SIGQUIT :)
> What was missing from your patch introducing the strsignal call,
> is *not* the single obvious #define and #include.

the mips' sim-main.h code eventually includes string.h for me.  the file should 
have a string.h include for the strsignal prototype, so i'll update that.

> Instead, to #define _GNU_SOURCE in the Right Way AFAIK, there
> should be an AC_GNU_SOURCE (missing) in a configure.* used by
> all src/sim/* (common/configure.ac AFAICT), and an #include
> "cconfig.h" in nrun.c followed later by the mantra:

not entirely the right way.  my guess is that your older glibc does not 
conform to the newer POSIX spec.  strsignal() was added in the 2008 spec, but 
old glibc's provided it only when _GNU_SOURCE was defined.

> And right, it's time to add -Wall -Werror to the sim compilation
> options...

i posted a patch to improve that plumbing already.  however, -Werror won't be 
enabled by default because all the sim code and ports have problems, and even 
if it was, it'd still pass on my side.
-mike

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Re: Please fix regressions from your sim changes

[Hans-Peter Nilsson]

> From: Mike Frysinger <vapier@gentoo.org>
> Date: Tue, 20 Mar 2012 17:15:55 +0100

> On Tuesday 20 March 2012 01:54:27 Hans-Peter Nilsson wrote:
> > nrun.o -MMD -MP -MF .deps/nrun.Tpo /tmp/r/sim/cris/../common/nrun.c
> > /tmp/r/sim/cris/../common/nrun.c: In function 'main':
> > /tmp/r/sim/cris/../common/nrun.c:206: warning: implicit declaration of
> > function 'strsignal' /tmp/r/sim/cris/../common/nrun.c:206: warning: format
> > '%s' expects type 'char *', but argument 4 has type 'int'
> > Don't you see that warning?
> 
> the code compiles warning free for me

>  the file should have a string.h include for the strsignal prototype, so i'll update that.
> 
> > Instead, to #define _GNU_SOURCE in the Right Way AFAIK, there
> > should be an AC_GNU_SOURCE (missing) in a configure.* used by
> > all src/sim/* (common/configure.ac AFAICT), and an #include
> > "cconfig.h" in nrun.c followed later by the mantra:
> 
> not entirely the right way.  my guess is that your older glibc does not
> conform to the newer POSIX spec.  strsignal() was added in the 2008 spec, but
> old glibc's provided it only when _GNU_SOURCE was defined.

It's be the right way to maintain interoperability even with old
systems not-fully-conformant-in-every-corner that *used* to
work, if there's a known way, like here, that doesn't introduce
a maintenance burden.

Please.

brgds, H-P

Re: Please fix regressions from your sim changes

[Mike Frysinger]

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On Tuesday 20 March 2012 12:30:10 Hans-Peter Nilsson wrote:
> From: Mike Frysinger <vapier@gentoo.org>:
> > On Tuesday 20 March 2012 01:54:27 Hans-Peter Nilsson wrote:
> > > nrun.o -MMD -MP -MF .deps/nrun.Tpo /tmp/r/sim/cris/../common/nrun.c
> > > /tmp/r/sim/cris/../common/nrun.c: In function 'main':
> > > /tmp/r/sim/cris/../common/nrun.c:206: warning: implicit declaration of
> > > function 'strsignal' /tmp/r/sim/cris/../common/nrun.c:206: warning:
> > > format '%s' expects type 'char *', but argument 4 has type 'int'
> > > Don't you see that warning?
> > 
> > the code compiles warning free for me
> > 
> >  the file should have a string.h include for the strsignal prototype, so
> >  i'll update that.
> >  
> > > Instead, to #define _GNU_SOURCE in the Right Way AFAIK, there
> > > should be an AC_GNU_SOURCE (missing) in a configure.* used by
> > > all src/sim/* (common/configure.ac AFAICT), and an #include
> > 
> > > "cconfig.h" in nrun.c followed later by the mantra:
> > not entirely the right way.  my guess is that your older glibc does not
> > conform to the newer POSIX spec.  strsignal() was added in the 2008 spec,
> > but old glibc's provided it only when _GNU_SOURCE was defined.
> 
> It's be the right way to maintain interoperability even with old
> systems not-fully-conformant-in-every-corner that *used* to
> work,

that's not what i meant.  but it doesn't really matter.  patch posted.
-mike

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Re: Please fix regressions from your sim changes

[Mike Frysinger]

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On Monday 19 March 2012 13:22:39 Mike Frysinger wrote:
> On Monday 19 March 2012 02:28:49 Hans-Peter Nilsson wrote:
> > For cris-elf, there's quite a bit more, three variants AFAICT;
> > three "signals" lost.
> 
> patch attached should fix that

committed after the changelog split
-mike

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