[PATCH-ppc 5/5] Add VSX doc bits

[PATCH-ppc 5/5] Add VSX doc bits

[Luis Machado]

Last, but not the least, this adds some documentation about the new
register set. It's not very descriptive, but as the patches may change a
bit, i'll leave this one to the end. It'll probably require a NEWS entry
as well.

---
2008-07-25  Luis Machado  <luisgpm@br.ibm.com>

	* doc/gdb.texinfo: Updated documentation with new support info.	

Index: gdb/doc/gdb.texinfo
===================================================================
--- gdb.orig/doc/gdb.texinfo	2008-07-23 09:28:06.000000000 -0700
+++ gdb/doc/gdb.texinfo	2008-07-23 09:31:44.000000000 -0700
@@ -16210,6 +16210,9 @@
 by joining the even/odd register pairs @code{f0} and @code{f1} for @code{$dl0},
 @code{f2} and @code{f3} for @code{$dl1} and so on.
 
+For POWER7 processors, GDB provides a new set of pseudo-registers, the 64-bit
+wide Extended Floating Point Registers (@samp{f32} through @samp{f63}).
+
 
 @node Controlling GDB
 @chapter Controlling @value{GDBN}
@@ -27406,6 +27409,13 @@
 contain registers @samp{vr0} through @samp{vr31}, @samp{vscr},
 and @samp{vrsave}.
 
+The @samp{org.gnu.gdb.power.vsx} feature is optional.  It should
+contain registers @samp{vs0h} through @samp{vs31h}.  @value{GDBN}
+will combine these registers with the floating point registers
+(@samp{f0} through @samp{f31}) and the altivec registers (@samp{vr0}
+through @samp{vr31}} to present the 128-bit wide registers @samp{vs0}
+through @samp{vs63}, the new set of vector registers for POWER7.
+
 The @samp{org.gnu.gdb.power.spe} feature is optional.  It should
 contain registers @samp{ev0h} through @samp{ev31h}, @samp{acc}, and
 @samp{spefscr}.  SPE targets should provide 32-bit registers in

Re: [PATCH-ppc 5/5] Add VSX doc bits

[Luis Machado]

Hi Eli,

What do you think about the doc bits for this one?

Regards,
Luis

On Fri, 2008-07-25 at 17:15 -0300, Luis Machado wrote:
> Last, but not the least, this adds some documentation about the new
> register set. It's not very descriptive, but as the patches may change a
> bit, i'll leave this one to the end. It'll probably require a NEWS entry
> as well.
> 
> ---
> 2008-07-25  Luis Machado  <luisgpm@br.ibm.com>
> 
> 	* doc/gdb.texinfo: Updated documentation with new support info.	
> 
> Index: gdb/doc/gdb.texinfo
> ===================================================================
> --- gdb.orig/doc/gdb.texinfo	2008-07-23 09:28:06.000000000 -0700
> +++ gdb/doc/gdb.texinfo	2008-07-23 09:31:44.000000000 -0700
> @@ -16210,6 +16210,9 @@
>  by joining the even/odd register pairs @code{f0} and @code{f1} for @code{$dl0},
>  @code{f2} and @code{f3} for @code{$dl1} and so on.
> 
> +For POWER7 processors, GDB provides a new set of pseudo-registers, the 64-bit
> +wide Extended Floating Point Registers (@samp{f32} through @samp{f63}).
> +
> 
>  @node Controlling GDB
>  @chapter Controlling @value{GDBN}
> @@ -27406,6 +27409,13 @@
>  contain registers @samp{vr0} through @samp{vr31}, @samp{vscr},
>  and @samp{vrsave}.
> 
> +The @samp{org.gnu.gdb.power.vsx} feature is optional.  It should
> +contain registers @samp{vs0h} through @samp{vs31h}.  @value{GDBN}
> +will combine these registers with the floating point registers
> +(@samp{f0} through @samp{f31}) and the altivec registers (@samp{vr0}
> +through @samp{vr31}} to present the 128-bit wide registers @samp{vs0}
> +through @samp{vs63}, the new set of vector registers for POWER7.
> +
>  The @samp{org.gnu.gdb.power.spe} feature is optional.  It should
>  contain registers @samp{ev0h} through @samp{ev31h}, @samp{acc}, and
>  @samp{spefscr}.  SPE targets should provide 32-bit registers in
> 
> 

Re: [PATCH-ppc 5/5] Add VSX doc bits

[Stan Shebs]

Luis Machado wrote:
>> +For POWER7 processors, GDB provides a new set of pseudo-registers, the 64-bit
>> +wide Extended Floating Point Registers (@samp{f32} through @samp{f63}).
>>     
Ten years from now, this sentence will likely still be in the manual, 
but the register set won't really seem "new" anymore. :-)

Stan

Re: [PATCH-ppc 5/5] Add VSX doc bits

[Luis Machado]

On Fri, 2008-08-15 at 08:38 -0700, Stan Shebs wrote:
> Luis Machado wrote:
> >> +For POWER7 processors, GDB provides a new set of pseudo-registers, the 64-bit
> >> +wide Extended Floating Point Registers (@samp{f32} through @samp{f63}).
> >>     
> Ten years from now, this sentence will likely still be in the manual, 
> but the register set won't really seem "new" anymore. :-)
> 
> Stan

Good point. Fixed that. :-)

Luis

Re: [PATCH-ppc 5/5] Add VSX doc bits

[Eli Zaretskii]

> From: Luis Machado <luisgpm@linux.vnet.ibm.com>
> Cc: Eli Zaretskii <eliz@gnu.org>
> Date: Fri, 15 Aug 2008 12:28:16 -0300
> 
> What do you think about the doc bits for this one?
> 
> Regards,
> > 2008-07-25  Luis Machado  <luisgpm@br.ibm.com>
> > 
> > 	* doc/gdb.texinfo: Updated documentation with new support info.	

This needs to state the node name where the changes are made.

> > 
> > Index: gdb/doc/gdb.texinfo
> > ===================================================================
> > --- gdb.orig/doc/gdb.texinfo	2008-07-23 09:28:06.000000000 -0700
> > +++ gdb/doc/gdb.texinfo	2008-07-23 09:31:44.000000000 -0700
> > @@ -16210,6 +16210,9 @@
> >  by joining the even/odd register pairs @code{f0} and @code{f1} for @code{$dl0},
> >  @code{f2} and @code{f3} for @code{$dl1} and so on.
> > 
> > +For POWER7 processors, GDB provides a new set of pseudo-registers, the 64-bit
> > +wide Extended Floating Point Registers (@samp{f32} through @samp{f63}).
> > +
> > 
> >  @node Controlling GDB
> >  @chapter Controlling @value{GDBN}
> > @@ -27406,6 +27409,13 @@
> >  contain registers @samp{vr0} through @samp{vr31}, @samp{vscr},
> >  and @samp{vrsave}.
> > 
> > +The @samp{org.gnu.gdb.power.vsx} feature is optional.  It should
> > +contain registers @samp{vs0h} through @samp{vs31h}.  @value{GDBN}
> > +will combine these registers with the floating point registers
> > +(@samp{f0} through @samp{f31}) and the altivec registers (@samp{vr0}
> > +through @samp{vr31}} to present the 128-bit wide registers @samp{vs0}
> > +through @samp{vs63}, the new set of vector registers for POWER7.
> > +

This is OK, modulo Stan's comments on using "new".

Re: [PATCH-ppc 5/5] Add VSX doc bits

[Luis Machado]

On Fri, 2008-08-15 at 20:06 +0300, Eli Zaretskii wrote:
> This needs to state the node name where the changes are made.

> This is OK, modulo Stan's comments on using "new".

Both should be addressed in the patch below.

Thanks,
Luis

---
2008-08-15  Luis Machado  <luisgpm@br.ibm.com>

	* doc/gdb.texinfo (PowerPC): Mention Extended FPR's for POWER7.
	(PowerPC features): Mention feature set for VSX registers.

Index: gdb/doc/gdb.texinfo
===================================================================
--- gdb.orig/doc/gdb.texinfo	2008-08-15 07:02:10.000000000 -0700
+++ gdb/doc/gdb.texinfo	2008-08-15 08:50:00.000000000 -0700
@@ -16427,6 +16427,9 @@
 by joining the even/odd register pairs @code{f0} and @code{f1} for @code{$dl0},
 @code{f2} and @code{f3} for @code{$dl1} and so on.
 
+For POWER7 processors, GDB provides a set of pseudo-registers, the 64-bit
+wide Extended Floating Point Registers (@samp{f32} through @samp{f63}).
+
 
 @node Controlling GDB
 @chapter Controlling @value{GDBN}
@@ -27865,6 +27868,13 @@
 contain registers @samp{vr0} through @samp{vr31}, @samp{vscr},
 and @samp{vrsave}.
 
+The @samp{org.gnu.gdb.power.vsx} feature is optional.  It should
+contain registers @samp{vs0h} through @samp{vs31h}.  @value{GDBN}
+will combine these registers with the floating point registers
+(@samp{f0} through @samp{f31}) and the altivec registers (@samp{vr0}
+through @samp{vr31}} to present the 128-bit wide registers @samp{vs0}
+through @samp{vs63}, the set of vector registers for POWER7.
+
 The @samp{org.gnu.gdb.power.spe} feature is optional.  It should
 contain registers @samp{ev0h} through @samp{ev31h}, @samp{acc}, and
 @samp{spefscr}.  SPE targets should provide 32-bit registers in

Re: [PATCH-ppc 5/5] Add VSX doc bits

[Eli Zaretskii]

> From: Luis Machado <luisgpm@linux.vnet.ibm.com>
> Cc: gdb-patches@sourceware.org
> Date: Fri, 15 Aug 2008 15:12:56 -0300
> 
> On Fri, 2008-08-15 at 20:06 +0300, Eli Zaretskii wrote:
> > This needs to state the node name where the changes are made.
> 
> > This is OK, modulo Stan's comments on using "new".
> 
> Both should be addressed in the patch below.

Yes, but...

> +For POWER7 processors, GDB provides a set of pseudo-registers, the 64-bit
                          ^^^
Literal "GDB".  Sorry for not catching this the first time.

Re: [PATCH-ppc 5/5] Add VSX doc bits

[Luis Machado]

On Fri, 2008-08-15 at 21:19 +0300, Eli Zaretskii wrote:
> > From: Luis Machado <luisgpm@linux.vnet.ibm.com>
> > Cc: gdb-patches@sourceware.org
> > Date: Fri, 15 Aug 2008 15:12:56 -0300
> > 
> > On Fri, 2008-08-15 at 20:06 +0300, Eli Zaretskii wrote:
> > > This needs to state the node name where the changes are made.
> > 
> > > This is OK, modulo Stan's comments on using "new".
> > 
> > Both should be addressed in the patch below.
> 
> Yes, but...
> 
> > +For POWER7 processors, GDB provides a set of pseudo-registers, the 64-bit
>                           ^^^
> Literal "GDB".  Sorry for not catching this the first time.
> 

Fixed and checked in.

Thanks.

Luis