* [ltt-dev] [PATCH 01/12] use kernel style makefile output
2010-02-19 19:22 [ltt-dev] [PATCH 00/12] provide generic version of uatomic and other per-arch defs Paolo Bonzini
@ 2010-02-19 19:22 ` Paolo Bonzini
2010-02-19 19:22 ` [ltt-dev] [PATCH 02/12] use autoconf symbolic linking Paolo Bonzini
` (10 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Paolo Bonzini @ 2010-02-19 19:22 UTC (permalink / raw)
A breath of fresh air. Requires Automake 1.11, but the
patch degrades gracefully.
Signed-off-by: Paolo Bonzini <pbonzini at redhat.com>
Acked-by: Mathieu Desnoyers <mathieu.desnoyers at efficios.com>
---
configure.ac | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/configure.ac b/configure.ac
index 48f906d..c797831 100644
--- a/configure.ac
+++ b/configure.ac
@@ -7,6 +7,8 @@ AC_CONFIG_AUX_DIR([config])
AC_CANONICAL_TARGET
AC_CANONICAL_HOST
AM_INIT_AUTOMAKE([foreign dist-bzip2 no-dist-gzip])
+m4_ifdef([AM_SILENT_RULES], [AM_SILENT_RULES([yes])])
+
AC_CONFIG_SRCDIR([urcu.h])
AM_PROG_MKDIR_P
--
1.6.6
^ permalink raw reply [flat|nested] 19+ messages in thread* [ltt-dev] [PATCH 02/12] use autoconf symbolic linking
2010-02-19 19:22 [ltt-dev] [PATCH 00/12] provide generic version of uatomic and other per-arch defs Paolo Bonzini
2010-02-19 19:22 ` [ltt-dev] [PATCH 01/12] use kernel style makefile output Paolo Bonzini
@ 2010-02-19 19:22 ` Paolo Bonzini
2010-02-19 19:22 ` [ltt-dev] [PATCH 03/12] add urcu/arch_generic.h Paolo Bonzini
` (9 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Paolo Bonzini @ 2010-02-19 19:22 UTC (permalink / raw)
Instead of copying. This is less error-prone while developing and
lets Automake handle more stuff.
Signed-off-by: Paolo Bonzini <pbonzini at redhat.com>
Acked-by: Mathieu Desnoyers <mathieu.desnoyers at efficios.com>
---
Makefile.am | 13 -------------
configure.ac | 15 +++++++++++++--
tests/Makefile.am | 12 ------------
3 files changed, 13 insertions(+), 27 deletions(-)
diff --git a/Makefile.am b/Makefile.am
index 4f915e1..2ede9e0 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -38,16 +38,3 @@ liburcu_signal_la_CFLAGS = -DRCU_SIGNAL
liburcu_bp_la_SOURCES = urcu-bp.c urcu-pointer.c $(COMPAT)
liburcu_defer_la_SOURCES = urcu-defer.c $(COMPAT)
-
-$(top_srcdir)/*.h $(top_srcdir)/*.c: urcu/arch.h urcu/uatomic_arch.h
-
-urcu/arch.h: $(top_srcdir)/urcu/arch_ at ARCHTYPE@.h
- $(mkdir_p) $(top_builddir)/urcu
- cp -f $(top_srcdir)/urcu/arch_ at ARCHTYPE@.h $(top_builddir)/urcu/arch.h
-
-urcu/uatomic_arch.h: $(top_srcdir)/urcu/uatomic_arch_ at ARCHTYPE@.h
- $(mkdir_p) $(top_builddir)/urcu
- cp -f $(top_srcdir)/urcu/uatomic_arch_ at ARCHTYPE@.h $(top_builddir)/urcu/uatomic_arch.h
-
-clean-local:
- rm -f urcu/arch.h urcu/uatomic_arch.h
diff --git a/configure.ac b/configure.ac
index c797831..ab6f3a2 100644
--- a/configure.ac
+++ b/configure.ac
@@ -56,6 +56,14 @@ esac
if test "$ARCHTYPE" = "unknown"; then
AC_MSG_ERROR([Unable to detect the architecture.])
fi
+UATOMICSRC=urcu/uatomic_arch_$ARCHTYPE.h
+ARCHSRC=urcu/arch_$ARCHTYPE.h
+if test "x$ARCHTYPE" != xx86 -a "x$ARCHTYPE" != xppc; then
+ APISRC=tests/api_gcc.h
+else
+ APISRC=tests/api_$ARCHTYPE.h
+fi
+
AC_SUBST(ARCHTYPE)
AC_SUBST(SUBARCHTYPE)
@@ -95,8 +103,6 @@ AC_TRY_COMPILE(
AM_CONDITIONAL([COMPAT_FUTEX], [ test "x$compat_futex_test" = "x1" ])
-AM_CONDITIONAL([GCC_API], [test "x$ARCHTYPE" != xx86 -a "x$ARCHTYPE" != xppc])
-
AM_CONDITIONAL([COMPAT_ARCH], [test "x$SUBARCHTYPE" = xx86compat ])
[
@@ -204,6 +210,11 @@ AC_CHECK_FUNCS(
CFLAGS=$saved_CFLAGS
+AC_CONFIG_LINKS([
+ urcu/arch.h:$ARCHSRC
+ urcu/uatomic_arch.h:$UATOMICSRC
+ tests/api.h:$APISRC
+])
AC_CONFIG_FILES([
Makefile
tests/Makefile
diff --git a/tests/Makefile.am b/tests/Makefile.am
index 02e0583..17b89db 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -40,12 +40,6 @@ URCU_MB_LIB=$(top_builddir)/liburcu-mb.la
URCU_SIGNAL_LIB=$(top_builddir)/liburcu-signal.la
URCU_BP_LIB=$(top_builddir)/liburcu-bp.la
-if GCC_API
-APIHEADER=api_gcc.h
-else
-APIHEADER=api_ at ARCHTYPE@.h
-endif
-
EXTRA_DIST = $(top_srcdir)/tests/api_*.h
@@ -156,9 +150,3 @@ test_urcu_bp_dynamic_link_SOURCES = test_urcu_bp.c $(URCU_BP)
test_urcu_bp_dynamic_link_CFLAGS = -DDYNAMIC_LINK_TEST $(AM_CFLAGS)
urcutorture.c: api.h
-
-api.h: $(APIHEADER)
- cp -f $(srcdir)/$(APIHEADER) api.h
-
-clean-local:
- rm -f api.h
--
1.6.6
^ permalink raw reply [flat|nested] 19+ messages in thread* [ltt-dev] [PATCH 03/12] add urcu/arch_generic.h
2010-02-19 19:22 [ltt-dev] [PATCH 00/12] provide generic version of uatomic and other per-arch defs Paolo Bonzini
2010-02-19 19:22 ` [ltt-dev] [PATCH 01/12] use kernel style makefile output Paolo Bonzini
2010-02-19 19:22 ` [ltt-dev] [PATCH 02/12] use autoconf symbolic linking Paolo Bonzini
@ 2010-02-19 19:22 ` Paolo Bonzini
2010-02-19 19:22 ` [ltt-dev] [PATCH 04/12] define sync_core for x86 PIC Paolo Bonzini
` (8 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Paolo Bonzini @ 2010-02-19 19:22 UTC (permalink / raw)
Most of the memory barrier definitions are shared between all
architectures, especially smp_* and mc/rmc/wmc. Put them in
a common file.
Signed-off-by: Paolo Bonzini <pbonzini at redhat.com>
---
urcu/arch_generic.h | 132 +++++++++++++++++++++++++++++++++++++++++++++++++++
urcu/arch_ppc.h | 50 +------------------
urcu/arch_s390.h | 38 +--------------
urcu/arch_sparc64.h | 51 +-------------------
urcu/arch_x86.h | 64 ++----------------------
5 files changed, 145 insertions(+), 190 deletions(-)
create mode 100644 urcu/arch_generic.h
diff --git a/urcu/arch_generic.h b/urcu/arch_generic.h
new file mode 100644
index 0000000..f0be0f2
--- /dev/null
+++ b/urcu/arch_generic.h
@@ -0,0 +1,132 @@
+#ifndef _URCU_ARCH_GENERIC_H
+#define _URCU_ARCH_GENERIC_H
+
+/*
+ * arch_defaults.h: common definitions for multiple architectures.
+ *
+ * Copyright (c) 2010 Paolo Bonzini <pbonzini at redhat.com>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+*
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <urcu/compiler.h>
+#include <urcu/config.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef CACHE_LINE_SIZE
+#define CACHE_LINE_SIZE 64
+#endif
+
+#if !defined(mc) && !defined(rmc) && !defined(wmc)
+#define CONFIG_HAVE_MEM_COHERENCY
+/*
+ * Architectures with cache coherency must _not_ define mc/rmc/wmc.
+ *
+ * For them, mc/rmc/wmc are implemented with a * simple compiler barrier;
+ * in addition, we provide defaults for mb (using GCC builtins) as well as
+ * rmb and wmb (defaulting to mb).
+ */
+
+#ifndef mb
+#define mb() __sync_synchronize()
+#endif
+
+#ifndef rmb
+#define rmb() mb()
+#endif
+
+#ifndef wmb
+#define wmb() mb()
+#endif
+
+#define mc() barrier()
+#define rmc() barrier()
+#define wmc() barrier()
+#else
+/*
+ * Architectures without cache coherency need something like the following:
+ *
+ * #define mc() arch_cache_flush()
+ * #define rmc() arch_cache_flush_read()
+ * #define wmc() arch_cache_flush_write()
+ *
+ * Of these, only mc is mandatory. rmc and wmc default to mc. mb/rmb/wmb
+ * use these definitions by default:
+ *
+ * #define mb() mc()
+ * #define rmb() rmc()
+ * #define wmb() wmc()
+ */
+
+#ifndef mb
+#define mb() mc()
+#endif
+
+#ifndef rmb
+#define rmb() rmc()
+#endif
+
+#ifndef wmb
+#define wmb() wmc()
+#endif
+
+#ifndef rmc
+#define rmc() mc()
+#endif
+
+#ifndef wmc
+#define wmc() mc()
+#endif
+#endif
+
+/* Nop everywhere except on alpha. */
+#ifndef read_barrier_depends
+#define read_barrier_depends()
+#endif
+
+#ifdef CONFIG_RCU_SMP
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
+#define smp_mc() mc()
+#define smp_rmc() rmc()
+#define smp_wmc() wmc()
+#define smp_read_barrier_depends() read_barrier_depends()
+#else
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define smp_mc() barrier()
+#define smp_rmc() barrier()
+#define smp_wmc() barrier()
+#define smp_read_barrier_depends()
+#endif
+
+#ifndef cpu_relax
+#define cpu_relax() barrier()
+#endif
+
+#ifndef sync_core
+#define sync_core() mb()
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _URCU_ARCH_GENERIC_H */
diff --git a/urcu/arch_ppc.h b/urcu/arch_ppc.h
index c1762ae..1e096db 100644
--- a/urcu/arch_ppc.h
+++ b/urcu/arch_ppc.h
@@ -29,8 +29,6 @@
extern "C" {
#endif
-#define CONFIG_HAVE_MEM_COHERENCY
-
/* Include size of POWER5+ L3 cache lines: 256 bytes */
#define CACHE_LINE_SIZE 256
@@ -39,55 +37,11 @@ extern "C" {
#endif
#define mb() asm volatile("sync":::"memory")
-#define rmb() asm volatile("sync":::"memory")
-#define wmb() asm volatile("sync"::: "memory")
-
-/*
- * Architectures without cache coherency need something like the following:
- *
- * #define mb() mc()
- * #define rmb() rmc()
- * #define wmb() wmc()
- * #define mc() arch_cache_flush()
- * #define rmc() arch_cache_flush_read()
- * #define wmc() arch_cache_flush_write()
- */
-
-#define mc() barrier()
-#define rmc() barrier()
-#define wmc() barrier()
-
-#ifdef CONFIG_RCU_SMP
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#define smp_mc() mc()
-#define smp_rmc() rmc()
-#define smp_wmc() wmc()
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_mc() barrier()
-#define smp_rmc() barrier()
-#define smp_wmc() barrier()
-#endif
-
-/* Nop everywhere except on alpha. */
-#define smp_read_barrier_depends()
-
-static inline void cpu_relax(void)
-{
- barrier();
-}
/*
* Serialize core instruction execution. Also acts as a compiler barrier.
*/
-static inline void sync_core()
-{
- asm volatile("isync" : : : "memory");
-}
+#define sync_core() asm volatile("isync" : : : "memory")
#define mftbl() \
({ \
@@ -123,4 +77,6 @@ static inline cycles_t get_cycles (void)
}
#endif
+#include <urcu/arch_generic.h>
+
#endif /* _URCU_ARCH_PPC_H */
diff --git a/urcu/arch_s390.h b/urcu/arch_s390.h
index 22a1853..4ad3ee8 100644
--- a/urcu/arch_s390.h
+++ b/urcu/arch_s390.h
@@ -35,8 +35,6 @@
extern "C" {
#endif
-#define CONFIG_HAVE_MEM_COHERENCY
-
#define CACHE_LINE_SIZE 128
#ifndef __SIZEOF_LONG__
@@ -52,40 +50,6 @@ extern "C" {
#endif
#define mb() __asm__ __volatile__("bcr 15,0" : : : "memory")
-#define rmb() __asm__ __volatile__("bcr 15,0" : : : "memory")
-#define wmb() __asm__ __volatile__("bcr 15,0" : : : "memory")
-#define mc() barrier()
-#define rmc() barrier()
-#define wmc() barrier()
-
-#ifdef CONFIG_RCU_SMP
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#define smp_mc() mc()
-#define smp_rmc() rmc()
-#define smp_wmc() wmc()
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_mc() barrier()
-#define smp_rmc() barrier()
-#define smp_wmc() barrier()
-#endif
-
-/* Nop everywhere except on alpha. */
-#define smp_read_barrier_depends()
-
-static inline void cpu_relax(void)
-{
- barrier();
-}
-
-static inline void sync_core()
-{
- __asm__ __volatile__("bcr 15,0" : : : "memory");
-}
typedef unsigned long long cycles_t;
@@ -102,4 +66,6 @@ static inline cycles_t get_cycles (void)
}
#endif
+#include <urcu/arch_generic.h>
+
#endif /* _URCU_ARCH_S390_H */
diff --git a/urcu/arch_sparc64.h b/urcu/arch_sparc64.h
index 54c4c3c..4d08d55 100644
--- a/urcu/arch_sparc64.h
+++ b/urcu/arch_sparc64.h
@@ -29,8 +29,6 @@
extern "C" {
#endif
-#define CONFIG_HAVE_MEM_COHERENCY
-
#define CACHE_LINE_SIZE 256
#ifndef BITS_PER_LONG
@@ -50,53 +48,6 @@ __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
#define rmb() membar_safe("#LoadLoad")
#define wmb() membar_safe("#StoreStore")
-/*
- * Architectures without cache coherency need something like the following:
- *
- * #define mb() mc()
- * #define rmb() rmc()
- * #define wmb() wmc()
- * #define mc() arch_cache_flush()
- * #define rmc() arch_cache_flush_read()
- * #define wmc() arch_cache_flush_write()
- */
-
-#define mc() barrier()
-#define rmc() barrier()
-#define wmc() barrier()
-
-#ifdef CONFIG_RCU_SMP
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#define smp_mc() mc()
-#define smp_rmc() rmc()
-#define smp_wmc() wmc()
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_mc() barrier()
-#define smp_rmc() barrier()
-#define smp_wmc() barrier()
-#endif
-
-/* Nop everywhere except on alpha. */
-#define smp_read_barrier_depends()
-
-static inline void cpu_relax(void)
-{
- barrier();
-}
-
-/*
- * Serialize core instruction execution. Also acts as a compiler barrier.
- */
-static inline void sync_core()
-{
- mb();
-}
-
typedef unsigned long long cycles_t;
static inline cycles_t get_cycles (void)
@@ -108,4 +59,6 @@ static inline cycles_t get_cycles (void)
}
#endif
+#include <urcu/arch_generic.h>
+
#endif /* _URCU_ARCH_SPARC64_H */
diff --git a/urcu/arch_x86.h b/urcu/arch_x86.h
index 4abac2b..c4674de 100644
--- a/urcu/arch_x86.h
+++ b/urcu/arch_x86.h
@@ -29,8 +29,6 @@
extern "C" {
#endif
-#define CONFIG_HAVE_MEM_COHERENCY
-
#define CACHE_LINE_SIZE 128
#ifdef CONFIG_RCU_HAVE_FENCE
@@ -47,68 +45,16 @@ extern "C" {
#define wmb() asm volatile("lock; addl $0,0(%%esp)"::: "memory")
#endif
-/*
- * Architectures without cache coherency need something like the following:
- *
- * #define mb() mc()
- * #define rmb() rmc()
- * #define wmb() wmc()
- * #define mc() arch_cache_flush()
- * #define rmc() arch_cache_flush_read()
- * #define wmc() arch_cache_flush_write()
- */
-
-#define mc() barrier()
-#define rmc() barrier()
-#define wmc() barrier()
-
-#ifdef CONFIG_RCU_SMP
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#define smp_mc() mc()
-#define smp_rmc() rmc()
-#define smp_wmc() wmc()
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_mc() barrier()
-#define smp_rmc() barrier()
-#define smp_wmc() barrier()
-#endif
-
-/* Nop everywhere except on alpha. */
-#define smp_read_barrier_depends()
-
-static inline void rep_nop(void)
-{
- asm volatile("rep; nop" : : : "memory");
-}
-
-static inline void cpu_relax(void)
-{
- rep_nop();
-}
+#define cpu_relax() asm volatile("rep; nop" : : : "memory");
/*
* Serialize core instruction execution. Also acts as a compiler barrier.
- */
-#ifdef __PIC__
-/*
- * Cannot use cpuid because it clobbers the ebx register and clashes
- * with -fPIC :
+ * Cannot use cpuid on PIC because it clobbers the ebx register;
* error: PIC register 'ebx' clobbered in 'asm'
*/
-static inline void sync_core(void)
-{
- mb();
-}
-#else
-static inline void sync_core(void)
-{
+#ifndef __PIC__
+#define sync_core() \
asm volatile("cpuid" : : : "memory", "eax", "ebx", "ecx", "edx");
-}
#endif
#define rdtscll(val) \
@@ -133,4 +79,6 @@ static inline cycles_t get_cycles(void)
}
#endif
+#include <urcu/arch_generic.h>
+
#endif /* _URCU_ARCH_X86_H */
--
1.6.6
^ permalink raw reply [flat|nested] 19+ messages in thread* [ltt-dev] [PATCH 04/12] define sync_core for x86 PIC
2010-02-19 19:22 [ltt-dev] [PATCH 00/12] provide generic version of uatomic and other per-arch defs Paolo Bonzini
` (2 preceding siblings ...)
2010-02-19 19:22 ` [ltt-dev] [PATCH 03/12] add urcu/arch_generic.h Paolo Bonzini
@ 2010-02-19 19:22 ` Paolo Bonzini
2010-02-19 19:22 ` [ltt-dev] [PATCH 05/12] remove compat_uatomic_cmpxchg #define from non-x86 Paolo Bonzini
` (7 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Paolo Bonzini @ 2010-02-19 19:22 UTC (permalink / raw)
Pushing/popping the reserved ebx register is surely less expensive
than a memory barrier.
Note that since ebx is a callee-save register, this is even safe for
signals (i.e. it would be safe even if we needed the value that cpuid
puts in %%ebx).
Signed-off-by: Paolo Bonzini <pbonzini at redhat.com>
Acked-by: Mathieu Desnoyers <mathieu.desnoyers at efficios.com>
---
urcu/arch_x86.h | 8 ++++++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/urcu/arch_x86.h b/urcu/arch_x86.h
index c4674de..64cc026 100644
--- a/urcu/arch_x86.h
+++ b/urcu/arch_x86.h
@@ -49,9 +49,13 @@ extern "C" {
/*
* Serialize core instruction execution. Also acts as a compiler barrier.
- * Cannot use cpuid on PIC because it clobbers the ebx register;
- * error: PIC register 'ebx' clobbered in 'asm'
+ * On PIC ebx cannot be clobbered
*/
+#ifdef __PIC__
+#define sync_core() \
+ asm volatile("push %%ebx; cpuid; pop %%ebx" \
+ : : : "memory", "eax", "ecx", "edx");
+#endif
#ifndef __PIC__
#define sync_core() \
asm volatile("cpuid" : : : "memory", "eax", "ebx", "ecx", "edx");
--
1.6.6
^ permalink raw reply [flat|nested] 19+ messages in thread* [ltt-dev] [PATCH 05/12] remove compat_uatomic_cmpxchg #define from non-x86
2010-02-19 19:22 [ltt-dev] [PATCH 00/12] provide generic version of uatomic and other per-arch defs Paolo Bonzini
` (3 preceding siblings ...)
2010-02-19 19:22 ` [ltt-dev] [PATCH 04/12] define sync_core for x86 PIC Paolo Bonzini
@ 2010-02-19 19:22 ` Paolo Bonzini
2010-02-19 19:22 ` [ltt-dev] [PATCH 06/12] add uatomic_generic.h, use it for common definitions Paolo Bonzini
` (6 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Paolo Bonzini @ 2010-02-19 19:22 UTC (permalink / raw)
This is unused everywhere except on x86.
Signed-off-by: Paolo Bonzini <pbonzini at redhat.com>
Acked-by: Mathieu Desnoyers <mathieu.desnoyers at efficios.com>
---
urcu/uatomic_arch_ppc.h | 2 --
urcu/uatomic_arch_s390.h | 2 --
urcu/uatomic_arch_sparc64.h | 2 --
3 files changed, 0 insertions(+), 6 deletions(-)
diff --git a/urcu/uatomic_arch_ppc.h b/urcu/uatomic_arch_ppc.h
index 2322c97..8da192e 100644
--- a/urcu/uatomic_arch_ppc.h
+++ b/urcu/uatomic_arch_ppc.h
@@ -235,8 +235,6 @@ unsigned long _uatomic_add_return(void *addr, unsigned long val,
#define uatomic_inc(addr) uatomic_add((addr), 1)
#define uatomic_dec(addr) uatomic_add((addr), -1)
-#define compat_uatomic_cmpxchg(ptr, old, _new) uatomic_cmpxchg(ptr, old, _new)
-
#ifdef __cplusplus
}
#endif
diff --git a/urcu/uatomic_arch_s390.h b/urcu/uatomic_arch_s390.h
index fdfabfd..614867f 100644
--- a/urcu/uatomic_arch_s390.h
+++ b/urcu/uatomic_arch_s390.h
@@ -218,8 +218,6 @@ unsigned long _uatomic_add_return(void *addr, unsigned long val, int len)
#define uatomic_inc(addr) uatomic_add((addr), 1)
#define uatomic_dec(addr) uatomic_add((addr), -1)
-#define compat_uatomic_cmpxchg(ptr, old, _new) uatomic_cmpxchg(ptr, old, _new)
-
#ifdef __cplusplus
}
#endif
diff --git a/urcu/uatomic_arch_sparc64.h b/urcu/uatomic_arch_sparc64.h
index 3aa3b7d..d443d4f 100644
--- a/urcu/uatomic_arch_sparc64.h
+++ b/urcu/uatomic_arch_sparc64.h
@@ -179,8 +179,6 @@ unsigned long _uatomic_add_return(void *addr, unsigned long val, int len)
#define uatomic_inc(addr) uatomic_add((addr), 1)
#define uatomic_dec(addr) uatomic_add((addr), -1)
-#define compat_uatomic_cmpxchg(ptr, old, _new) uatomic_cmpxchg(ptr, old, _new)
-
#ifdef __cplusplus
}
#endif
--
1.6.6
^ permalink raw reply [flat|nested] 19+ messages in thread* [ltt-dev] [PATCH 06/12] add uatomic_generic.h, use it for common definitions
2010-02-19 19:22 [ltt-dev] [PATCH 00/12] provide generic version of uatomic and other per-arch defs Paolo Bonzini
` (4 preceding siblings ...)
2010-02-19 19:22 ` [ltt-dev] [PATCH 05/12] remove compat_uatomic_cmpxchg #define from non-x86 Paolo Bonzini
@ 2010-02-19 19:22 ` Paolo Bonzini
2010-02-19 19:22 ` [ltt-dev] [PATCH 07/12] use uatomic_generic.h for common fallback implementations Paolo Bonzini
` (5 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Paolo Bonzini @ 2010-02-19 19:22 UTC (permalink / raw)
uatomic_generic.h can be included by uatomic_arch_*.h to provide useful
default definitions. uatomic_arch_*.h can define whatever builtins
it wants to override, then uatomic_generic.h will provide what is not
already defined, as follows:
- uatomic_cmpxchg will use __sync_val_compare_and_swap builtins;
- uatomic_add_return will use __sync_fetch_and_add if uatomic_arch_*.h
did not provide a definition of uatomic_cmpxchg. If it did, we assume
__sync builtins are buggy or otherwise undesirable on this platform,
so uatomic_generic.h will implement uatomic_add_return in terms of
uatomic_cmpxchg too.
- uatomic_xchg is like uatomic_add_return. However, since GCC does
not provide an adequate builtin, it needs to use a compare-and-swap
loop using __sync_bool_compare_and_swap if uatomic_cmpxchg is not
provided.
- uatomic_sub_return/uatomic_add/uatomic_sub will be implemented
in terms of uatomic_add_return;
- uatomic_inc/uatomic_dec will be implemented in terms of uatomic_add.
After this patch, uatomic_generic.h is already used for the latter two
categories. The next patch will use uatomic_generic.h whenever there is
no assembly code involved, or otherwise it makes no difference to use
uatomic_generic.h. We keep custom per-arch macros to provide support for
compilers back to early GCC 3.x versions; however future ports may
not have this limitation.
The hunk in tests/test_uatomic.c is only needed for bisectability
and will be removed later.
Signed-off-by: Paolo Bonzini <pbonzini at redhat.com>
---
Makefile.am | 2 +-
tests/test_uatomic.c | 2 +
urcu/uatomic_arch_ppc.h | 15 +--
urcu/uatomic_arch_s390.h | 15 +--
urcu/uatomic_arch_sparc64.h | 15 +--
urcu/uatomic_arch_x86.h | 24 +---
urcu/uatomic_generic.h | 263 +++++++++++++++++++++++++++++++++++++++++++
7 files changed, 279 insertions(+), 57 deletions(-)
create mode 100644 urcu/uatomic_generic.h
diff --git a/Makefile.am b/Makefile.am
index 2ede9e0..f05f477 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -6,7 +6,7 @@ SUBDIRS = . tests
include_HEADERS = urcu.h $(top_srcdir)/urcu-*.h
nobase_dist_include_HEADERS = urcu/compiler.h urcu/hlist.h urcu/list.h \
- urcu/rculist.h urcu/system.h urcu/urcu-futex.h
+ urcu/rculist.h urcu/system.h urcu/urcu-futex.h urcu/uatomic_generic.h
nobase_nodist_include_HEADERS = urcu/arch.h urcu/uatomic_arch.h urcu/config.h
EXTRA_DIST = $(top_srcdir)/urcu/arch_*.h $(top_srcdir)/urcu/uatomic_arch_*.h \
diff --git a/tests/test_uatomic.c b/tests/test_uatomic.c
index 68cb6df..c0f36fe 100644
--- a/tests/test_uatomic.c
+++ b/tests/test_uatomic.c
@@ -1,5 +1,7 @@
#include <stdio.h>
#include <assert.h>
+
+#define UATOMIC_NO_LINK_ERROR
#include <urcu/uatomic_arch.h>
#if (defined(__i386__) || defined(__x86_64__))
diff --git a/urcu/uatomic_arch_ppc.h b/urcu/uatomic_arch_ppc.h
index 8da192e..39c4c24 100644
--- a/urcu/uatomic_arch_ppc.h
+++ b/urcu/uatomic_arch_ppc.h
@@ -47,9 +47,6 @@ extern "C" {
#define ILLEGAL_INSTR ".long 0xd00d00"
-#define uatomic_set(addr, v) STORE_SHARED(*(addr), (v))
-#define uatomic_read(addr) LOAD_SHARED(*(addr))
-
/*
* Using a isync as second barrier for exchange to provide acquire semantic.
* According to uatomic_ops/sysdeps/gcc/powerpc.h, the documentation is "fairly
@@ -225,18 +222,10 @@ unsigned long _uatomic_add_return(void *addr, unsigned long val,
(unsigned long)(v), \
sizeof(*(addr))))
-/* uatomic_sub_return, uatomic_add, uatomic_sub, uatomic_inc, uatomic_dec */
-
-#define uatomic_sub_return(addr, v) uatomic_add_return((addr), -(v))
-
-#define uatomic_add(addr, v) (void)uatomic_add_return((addr), (v))
-#define uatomic_sub(addr, v) (void)uatomic_sub_return((addr), (v))
-
-#define uatomic_inc(addr) uatomic_add((addr), 1)
-#define uatomic_dec(addr) uatomic_add((addr), -1)
-
#ifdef __cplusplus
}
#endif
+#include <urcu/uatomic_generic.h>
+
#endif /* _URCU_ARCH_UATOMIC_PPC_H */
diff --git a/urcu/uatomic_arch_s390.h b/urcu/uatomic_arch_s390.h
index 614867f..2378ebd 100644
--- a/urcu/uatomic_arch_s390.h
+++ b/urcu/uatomic_arch_s390.h
@@ -78,9 +78,6 @@ struct __uatomic_dummy {
};
#define __hp(x) ((struct __uatomic_dummy *)(x))
-#define uatomic_set(addr, v) STORE_SHARED(*(addr), (v))
-#define uatomic_read(addr) LOAD_SHARED(*(addr))
-
/* xchg */
static inline __attribute__((always_inline))
@@ -208,18 +205,10 @@ unsigned long _uatomic_add_return(void *addr, unsigned long val, int len)
(unsigned long)(v), \
sizeof(*(addr))))
-/* uatomic_sub_return, uatomic_add, uatomic_sub, uatomic_inc, uatomic_dec */
-
-#define uatomic_sub_return(addr, v) uatomic_add_return((addr), -(v))
-
-#define uatomic_add(addr, v) (void)uatomic_add_return((addr), (v))
-#define uatomic_sub(addr, v) (void)uatomic_sub_return((addr), (v))
-
-#define uatomic_inc(addr) uatomic_add((addr), 1)
-#define uatomic_dec(addr) uatomic_add((addr), -1)
-
#ifdef __cplusplus
}
#endif
+#include <urcu/uatomic_generic.h>
+
#endif /* _URCU_UATOMIC_ARCH_S390_H */
diff --git a/urcu/uatomic_arch_sparc64.h b/urcu/uatomic_arch_sparc64.h
index d443d4f..ec9d8e8 100644
--- a/urcu/uatomic_arch_sparc64.h
+++ b/urcu/uatomic_arch_sparc64.h
@@ -39,9 +39,6 @@ extern "C" {
#define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
#endif
-#define uatomic_set(addr, v) STORE_SHARED(*(addr), (v))
-#define uatomic_read(addr) LOAD_SHARED(*(addr))
-
/* cmpxchg */
static inline __attribute__((always_inline))
@@ -169,18 +166,10 @@ unsigned long _uatomic_add_return(void *addr, unsigned long val, int len)
(unsigned long)(v), \
sizeof(*(addr))))
-/* uatomic_sub_return, uatomic_add, uatomic_sub, uatomic_inc, uatomic_dec */
-
-#define uatomic_sub_return(addr, v) uatomic_add_return((addr), -(v))
-
-#define uatomic_add(addr, v) (void)uatomic_add_return((addr), (v))
-#define uatomic_sub(addr, v) (void)uatomic_sub_return((addr), (v))
-
-#define uatomic_inc(addr) uatomic_add((addr), 1)
-#define uatomic_dec(addr) uatomic_add((addr), -1)
-
#ifdef __cplusplus
}
#endif
+#include <urcu/uatomic_generic.h>
+
#endif /* _URCU_ARCH_UATOMIC_PPC_H */
diff --git a/urcu/uatomic_arch_x86.h b/urcu/uatomic_arch_x86.h
index 3bfe86d..e358be3 100644
--- a/urcu/uatomic_arch_x86.h
+++ b/urcu/uatomic_arch_x86.h
@@ -49,7 +49,6 @@ struct __uatomic_dummy {
#define __hp(x) ((struct __uatomic_dummy *)(x))
#define _uatomic_set(addr, v) STORE_SHARED(*(addr), (v))
-#define _uatomic_read(addr) LOAD_SHARED(*(addr))
/* cmpxchg */
@@ -176,7 +175,7 @@ unsigned long __uatomic_exchange(void *addr, unsigned long val, int len)
((__typeof__(*(addr))) __uatomic_exchange((addr), (unsigned long)(v), \
sizeof(*(addr))))
-/* uatomic_add_return, uatomic_sub_return */
+/* uatomic_add_return */
static inline __attribute__((always_inline))
unsigned long __uatomic_add_return(void *addr, unsigned long val,
@@ -241,9 +240,7 @@ unsigned long __uatomic_add_return(void *addr, unsigned long val,
(unsigned long)(v), \
sizeof(*(addr))))
-#define _uatomic_sub_return(addr, v) _uatomic_add_return((addr), -(v))
-
-/* uatomic_add, uatomic_sub */
+/* uatomic_add */
static inline __attribute__((always_inline))
void __uatomic_add(void *addr, unsigned long val, int len)
@@ -297,8 +294,6 @@ void __uatomic_add(void *addr, unsigned long val, int len)
#define _uatomic_add(addr, v) \
(__uatomic_add((addr), (unsigned long)(v), sizeof(*(addr))))
-#define _uatomic_sub(addr, v) _uatomic_add((addr), -(v))
-
/* uatomic_inc */
@@ -449,36 +444,29 @@ extern unsigned long _compat_uatomic_xchg(void *addr,
(unsigned long)(v), \
sizeof(*(addr))))
-#define compat_uatomic_sub_return(addr, v) \
- compat_uatomic_add_return((addr), -(v))
#define compat_uatomic_add(addr, v) \
((void)compat_uatomic_add_return((addr), (v)))
-#define compat_uatomic_sub(addr, v) \
- ((void)compat_uatomic_sub_return((addr), (v)))
#define compat_uatomic_inc(addr) \
(compat_uatomic_add((addr), 1))
#define compat_uatomic_dec(addr) \
- (compat_uatomic_sub((addr), 1))
+ (compat_uatomic_add((addr), -1))
#else
#define UATOMIC_COMPAT(insn) (_uatomic_##insn)
#endif
/* Read is atomic even in compat mode */
-#define uatomic_read(addr) _uatomic_read(addr)
-
#define uatomic_set(addr, v) \
UATOMIC_COMPAT(set(addr, v))
+
#define uatomic_cmpxchg(addr, old, _new) \
UATOMIC_COMPAT(cmpxchg(addr, old, _new))
#define uatomic_xchg(addr, v) \
UATOMIC_COMPAT(xchg(addr, v))
#define uatomic_add_return(addr, v) \
UATOMIC_COMPAT(add_return(addr, v))
-#define uatomic_sub_return(addr, v) \
- UATOMIC_COMPAT(sub_return(addr, v))
+
#define uatomic_add(addr, v) UATOMIC_COMPAT(add(addr, v))
-#define uatomic_sub(addr, v) UATOMIC_COMPAT(sub(addr, v))
#define uatomic_inc(addr) UATOMIC_COMPAT(inc(addr))
#define uatomic_dec(addr) UATOMIC_COMPAT(dec(addr))
@@ -486,4 +474,6 @@ extern unsigned long _compat_uatomic_xchg(void *addr,
}
#endif
+#include <urcu/uatomic_generic.h>
+
#endif /* _URCU_ARCH_UATOMIC_X86_H */
diff --git a/urcu/uatomic_generic.h b/urcu/uatomic_generic.h
new file mode 100644
index 0000000..4697ca9
--- /dev/null
+++ b/urcu/uatomic_generic.h
@@ -0,0 +1,263 @@
+#ifndef _URCU_UATOMIC_GENERIC_H
+#define _URCU_UATOMIC_GENERIC_H
+
+/*
+ * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved.
+ * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved.
+ * Copyright (c) 1999-2004 Hewlett-Packard Development Company, L.P.
+ * Copyright (c) 2009 Mathieu Desnoyers
+ * Copyright (c) 2010 Paolo Bonzini
+ *
+ * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
+ * OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
+ *
+ * Permission is hereby granted to use or copy this program
+ * for any purpose, provided the above notices are retained on all copies.
+ * Permission to modify the code and to distribute modified code is granted,
+ * provided the above notices are retained, and a notice that the code was
+ * modified is included with the above copyright notice.
+ *
+ * Code inspired from libuatomic_ops-1.2, inherited in part from the
+ * Boehm-Demers-Weiser conservative garbage collector.
+ */
+
+#include <urcu/compiler.h>
+#include <urcu/system.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef BITS_PER_LONG
+#define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
+#endif
+
+#ifndef uatomic_set
+#define uatomic_set(addr, v) STORE_SHARED(*(addr), (v))
+#endif
+
+#ifndef uatomic_read
+#define uatomic_read(addr) LOAD_SHARED(*(addr))
+#endif
+
+#if !defined __OPTIMIZE__ || defined UATOMIC_NO_LINK_ERROR
+static inline __attribute__((always_inline))
+void _uatomic_link_error()
+{
+#ifdef ILLEGAL_INSTR
+ /* generate an illegal instruction. Cannot catch this with linker tricks
+ * when optimizations are disabled. */
+ __asm__ __volatile__(ILLEGAL_INSTR);
+#else
+ __builtin_trap ();
+#endif
+}
+
+#else /* #if !defined __OPTIMIZE__ || defined UATOMIC_NO_LINK_ERROR */
+extern void _uatomic_link_error ();
+#endif /* #else #if !defined __OPTIMIZE__ || defined UATOMIC_NO_LINK_ERROR */
+
+/* cmpxchg */
+
+#ifndef uatomic_cmpxchg
+static inline __attribute__((always_inline))
+unsigned long _uatomic_cmpxchg(void *addr, unsigned long old,
+ unsigned long _new, int len)
+{
+ switch (len) {
+ case 4:
+ return __sync_val_compare_and_swap_4(addr, old, _new);
+#if (BITS_PER_LONG == 64)
+ case 8:
+ return __sync_val_compare_and_swap_8(addr, old, _new);
+#endif
+ }
+ _uatomic_link_error();
+ return 0;
+}
+
+
+#define uatomic_cmpxchg(addr, old, _new) \
+ ((__typeof__(*(addr))) _uatomic_cmpxchg((addr), (unsigned long)(old),\
+ (unsigned long)(_new), \
+ sizeof(*(addr))))
+
+
+/* uatomic_add_return */
+
+#ifndef uatomic_add_return
+static inline __attribute__((always_inline))
+unsigned long _uatomic_add_return(void *addr, unsigned long val,
+ int len)
+{
+ switch (len) {
+ case 4:
+ return __sync_add_and_fetch_4(addr, val);
+#if (BITS_PER_LONG == 64)
+ case 8:
+ return __sync_add_and_fetch_8(addr, val);
+#endif
+ }
+ _uatomic_link_error();
+ return 0;
+}
+
+
+#define uatomic_add_return(addr, v) \
+ ((__typeof__(*(addr))) _uatomic_add_return((addr), \
+ (unsigned long)(v), \
+ sizeof(*(addr))))
+#endif /* #ifndef uatomic_add_return */
+
+#ifndef uatomic_xchg
+/* xchg */
+
+static inline __attribute__((always_inline))
+unsigned long _uatomic_exchange(void *addr, unsigned long val, int len)
+{
+ switch (len) {
+ case 4:
+ {
+ unsigned int old;
+
+ do {
+ old = uatomic_read((unsigned int *)addr);
+ while (!__sync_bool_compare_and_swap_4(addr, old, val));
+
+ } return old;
+ }
+#if (BITS_PER_LONG == 64)
+ case 8:
+ {
+ unsigned long old;
+
+ do {
+ old = uatomic_read((unsigned long *)addr);
+ } while (!__sync_bool_compare_and_swap_8(addr, old, val));
+
+ return old;
+ }
+#endif
+ }
+ _uatomic_link_error();
+ return 0;
+}
+
+#define uatomic_xchg(addr, v) \
+ ((__typeof__(*(addr))) _uatomic_exchange((addr), (unsigned long)(v), \
+ sizeof(*(addr))))
+#endif /* #ifndef uatomic_xchg */
+
+#else /* #ifndef uatomic_cmpxchg */
+
+#ifndef uatomic_add_return
+/* uatomic_add_return */
+
+static inline __attribute__((always_inline))
+unsigned long _uatomic_add_return(void *addr, unsigned long val, int len)
+{
+ switch (len) {
+ case 4:
+ {
+ unsigned int old, oldt;
+
+ oldt = uatomic_read((unsigned int *)addr);
+ do {
+ old = oldt;
+ oldt = _uatomic_cmpxchg(addr, old, old + val, 4);
+ } while (oldt != old);
+
+ return old + val;
+ }
+#if (BITS_PER_LONG == 64)
+ case 8:
+ {
+ unsigned long old, oldt;
+
+ oldt = uatomic_read((unsigned long *)addr);
+ do {
+ old = oldt;
+ oldt = _uatomic_cmpxchg(addr, old, old + val, 8);
+ } while (oldt != old);
+
+ return old + val;
+ }
+#endif
+ }
+ _uatomic_link_error();
+ return 0;
+}
+
+#define uatomic_add_return(addr, v) \
+ ((__typeof__(*(addr))) _uatomic_add_return((addr), \
+ (unsigned long)(v), \
+ sizeof(*(addr))))
+#endif /* #ifndef uatomic_add_return */
+
+#ifndef uatomic_xchg
+/* xchg */
+
+static inline __attribute__((always_inline))
+unsigned long _uatomic_exchange(void *addr, unsigned long val, int len)
+{
+ switch (len) {
+ case 4:
+ {
+ unsigned int old, oldt;
+
+ oldt = uatomic_read((unsigned int *)addr);
+ do {
+ old = oldt;
+ oldt = _uatomic_cmpxchg(addr, old, val, 4);
+ } while (oldt != old);
+
+ return old;
+ }
+#if (BITS_PER_LONG == 64)
+ case 8:
+ {
+ unsigned long old, oldt;
+
+ oldt = uatomic_read((unsigned long *)addr);
+ do {
+ old = oldt;
+ oldt = _uatomic_cmpxchg(addr, old, val, 8);
+ } while (oldt != old);
+
+ return old;
+ }
+#endif
+ }
+ _uatomic_link_error();
+ return 0;
+}
+
+#define uatomic_xchg(addr, v) \
+ ((__typeof__(*(addr))) _uatomic_exchange((addr), (unsigned long)(v), \
+ sizeof(*(addr))))
+#endif /* #ifndef uatomic_xchg */
+
+#endif /* #else #ifndef uatomic_cmpxchg */
+
+/* uatomic_sub_return, uatomic_add, uatomic_sub, uatomic_inc, uatomic_dec */
+
+#ifndef uatomic_add
+#define uatomic_add(addr, v) (void)uatomic_add_return((addr), (v))
+#endif
+
+#define uatomic_sub_return(addr, v) uatomic_add_return((addr), -(v))
+#define uatomic_sub(addr, v) uatomic_add((addr), -(v))
+
+#ifndef uatomic_inc
+#define uatomic_inc(addr) uatomic_add((addr), 1)
+#endif
+
+#ifndef uatomic_dec
+#define uatomic_dec(addr) uatomic_add((addr), -1)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _URCU_UATOMIC_GENERIC_H */
--
1.6.6
^ permalink raw reply [flat|nested] 19+ messages in thread* [ltt-dev] [PATCH 07/12] use uatomic_generic.h for common fallback implementations
2010-02-19 19:22 [ltt-dev] [PATCH 00/12] provide generic version of uatomic and other per-arch defs Paolo Bonzini
` (5 preceding siblings ...)
2010-02-19 19:22 ` [ltt-dev] [PATCH 06/12] add uatomic_generic.h, use it for common definitions Paolo Bonzini
@ 2010-02-19 19:22 ` Paolo Bonzini
2010-02-19 19:22 ` [ltt-dev] [PATCH 08/12] move whether atomic byte/short exists to uatomic_arch_*.h Paolo Bonzini
` (4 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Paolo Bonzini @ 2010-02-19 19:22 UTC (permalink / raw)
And now, really remove the code for S390/SPARC, using the fallback
implementation of uatomic_generic.h
Signed-off-by: Paolo Bonzini <pbonzini at redhat.com>
---
urcu/uatomic_arch_s390.h | 42 ----------------------
urcu/uatomic_arch_sparc64.h | 83 -------------------------------------------
2 files changed, 0 insertions(+), 125 deletions(-)
diff --git a/urcu/uatomic_arch_s390.h b/urcu/uatomic_arch_s390.h
index 2378ebd..5942ffe 100644
--- a/urcu/uatomic_arch_s390.h
+++ b/urcu/uatomic_arch_s390.h
@@ -163,48 +163,6 @@ unsigned long _uatomic_cmpxchg(void *addr, unsigned long old,
(unsigned long)(_new), \
sizeof(*(addr)))
-/* uatomic_add_return */
-
-static inline __attribute__((always_inline))
-unsigned long _uatomic_add_return(void *addr, unsigned long val, int len)
-{
- switch (len) {
- case 4:
- {
- unsigned int old, oldt;
-
- oldt = uatomic_read((unsigned int *)addr);
- do {
- old = oldt;
- oldt = _uatomic_cmpxchg(addr, old, old + val, 4);
- } while (oldt != old);
-
- return old + val;
- }
-#if (BITS_PER_LONG == 64)
- case 8:
- {
- unsigned long old, oldt;
-
- oldt = uatomic_read((unsigned long *)addr);
- do {
- old = oldt;
- oldt = _uatomic_cmpxchg(addr, old, old + val, 8);
- } while (oldt != old);
-
- return old + val;
- }
-#endif
- }
- __builtin_trap();
- return 0;
-}
-
-#define uatomic_add_return(addr, v) \
- ((__typeof__(*(addr))) _uatomic_add_return((addr), \
- (unsigned long)(v), \
- sizeof(*(addr))))
-
#ifdef __cplusplus
}
#endif
diff --git a/urcu/uatomic_arch_sparc64.h b/urcu/uatomic_arch_sparc64.h
index ec9d8e8..81f95cb 100644
--- a/urcu/uatomic_arch_sparc64.h
+++ b/urcu/uatomic_arch_sparc64.h
@@ -83,89 +83,6 @@ unsigned long _uatomic_cmpxchg(void *addr, unsigned long old,
(unsigned long)(_new), \
sizeof(*(addr))))
-/* xchg */
-
-static inline __attribute__((always_inline))
-unsigned long _uatomic_exchange(void *addr, unsigned long val, int len)
-{
- switch (len) {
- case 4:
- {
- unsigned int old, oldt;
-
- oldt = uatomic_read((unsigned int *)addr);
- do {
- old = oldt;
- oldt = _uatomic_cmpxchg(addr, old, val, 4);
- } while (oldt != old);
-
- return old;
- }
-#if (BITS_PER_LONG == 64)
- case 8:
- {
- unsigned long old, oldt;
-
- oldt = uatomic_read((unsigned long *)addr);
- do {
- old = oldt;
- oldt = _uatomic_cmpxchg(addr, old, val, 8);
- } while (oldt != old);
-
- return old;
- }
-#endif
- }
- __builtin_trap();
- return 0;
-}
-
-#define uatomic_xchg(addr, v) \
- ((__typeof__(*(addr))) _uatomic_exchange((addr), (unsigned long)(v), \
- sizeof(*(addr))))
-
-/* uatomic_add_return */
-
-static inline __attribute__((always_inline))
-unsigned long _uatomic_add_return(void *addr, unsigned long val, int len)
-{
- switch (len) {
- case 4:
- {
- unsigned int old, oldt;
-
- oldt = uatomic_read((unsigned int *)addr);
- do {
- old = oldt;
- oldt = _uatomic_cmpxchg(addr, old, old + val, 4);
- } while (oldt != old);
-
- return old + val;
- }
-#if (BITS_PER_LONG == 64)
- case 8:
- {
- unsigned long old, oldt;
-
- oldt = uatomic_read((unsigned long *)addr);
- do {
- old = oldt;
- oldt = _uatomic_cmpxchg(addr, old, old + val, 8);
- } while (oldt != old);
-
- return old + val;
- }
-#endif
- }
- __builtin_trap();
- return 0;
-}
-
-#define uatomic_add_return(addr, v) \
- ((__typeof__(*(addr))) _uatomic_add_return((addr), \
- (unsigned long)(v), \
- sizeof(*(addr))))
-
#ifdef __cplusplus
}
#endif
--
1.6.6
^ permalink raw reply [flat|nested] 19+ messages in thread* [ltt-dev] [PATCH 08/12] move whether atomic byte/short exists to uatomic_arch_*.h
2010-02-19 19:22 [ltt-dev] [PATCH 00/12] provide generic version of uatomic and other per-arch defs Paolo Bonzini
` (6 preceding siblings ...)
2010-02-19 19:22 ` [ltt-dev] [PATCH 07/12] use uatomic_generic.h for common fallback implementations Paolo Bonzini
@ 2010-02-19 19:22 ` Paolo Bonzini
2010-02-19 19:22 ` [ltt-dev] [PATCH 09/12] add Alpha support Paolo Bonzini
` (3 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Paolo Bonzini @ 2010-02-19 19:22 UTC (permalink / raw)
And add more generic implementations to uatomic_defaults.h.
Signed-off-by: Paolo Bonzini <pbonzini at redhat.com>
---
tests/test_uatomic.c | 15 +------
urcu/uatomic_arch_x86.h | 3 +
urcu/uatomic_generic.h | 96 +++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 101 insertions(+), 13 deletions(-)
diff --git a/tests/test_uatomic.c b/tests/test_uatomic.c
index c0f36fe..5682655 100644
--- a/tests/test_uatomic.c
+++ b/tests/test_uatomic.c
@@ -1,21 +1,10 @@
#include <stdio.h>
#include <assert.h>
-
-#define UATOMIC_NO_LINK_ERROR
#include <urcu/uatomic_arch.h>
-#if (defined(__i386__) || defined(__x86_64__))
-#define HAS_ATOMIC_BYTE
-#define HAS_ATOMIC_SHORT
-#endif
-
struct testvals {
-#ifdef HAS_ATOMIC_BYTE
unsigned char c;
-#endif
-#ifdef HAS_ATOMIC_SHORT
unsigned short s;
-#endif
unsigned int i;
unsigned long l;
};
@@ -54,10 +43,10 @@ do { \
int main(int argc, char **argv)
{
-#ifdef HAS_ATOMIC_BYTE
+#ifdef UATOMIC_HAS_ATOMIC_BYTE
do_test(&vals.c);
#endif
-#ifdef HAS_ATOMIC_SHORT
+#ifdef UATOMIC_HAS_ATOMIC_SHORT
do_test(&vals.s);
#endif
do_test(&vals.i);
diff --git a/urcu/uatomic_arch_x86.h b/urcu/uatomic_arch_x86.h
index e358be3..666e498 100644
--- a/urcu/uatomic_arch_x86.h
+++ b/urcu/uatomic_arch_x86.h
@@ -23,6 +23,9 @@
#include <urcu/compiler.h>
#include <urcu/system.h>
+#define UATOMIC_HAS_ATOMIC_BYTE
+#define UATOMIC_HAS_ATOMIC_SHORT
+
#ifdef __cplusplus
extern "C" {
#endif
diff --git a/urcu/uatomic_generic.h b/urcu/uatomic_generic.h
index 4697ca9..ea2dfbf 100644
--- a/urcu/uatomic_generic.h
+++ b/urcu/uatomic_generic.h
@@ -65,6 +65,14 @@ unsigned long _uatomic_cmpxchg(void *addr, unsigned long old,
unsigned long _new, int len)
{
switch (len) {
+#ifdef UATOMIC_HAS_ATOMIC_BYTE
+ case 1:
+ return __sync_val_compare_and_swap_1(addr, old, _new);
+#endif
+#ifdef UATOMIC_HAS_ATOMIC_SHORT
+ case 2:
+ return __sync_val_compare_and_swap_2(addr, old, _new);
+#endif
case 4:
return __sync_val_compare_and_swap_4(addr, old, _new);
#if (BITS_PER_LONG == 64)
@@ -91,6 +99,14 @@ unsigned long _uatomic_add_return(void *addr, unsigned long val,
int len)
{
switch (len) {
+#ifdef UATOMIC_HAS_ATOMIC_BYTE
+ case 1:
+ return __sync_add_and_fetch_1(addr, val);
+#endif
+#ifdef UATOMIC_HAS_ATOMIC_SHORT
+ case 2:
+ return __sync_add_and_fetch_2(addr, val);
+#endif
case 4:
return __sync_add_and_fetch_4(addr, val);
#if (BITS_PER_LONG == 64)
@@ -116,6 +132,30 @@ static inline __attribute__((always_inline))
unsigned long _uatomic_exchange(void *addr, unsigned long val, int len)
{
switch (len) {
+#ifdef UATOMIC_HAS_ATOMIC_BYTE
+ case 1:
+ {
+ unsigned char old;
+
+ do {
+ old = uatomic_read((unsigned char *)addr);
+ } while (!__sync_bool_compare_and_swap_1(addr, old, val));
+
+ return old;
+ }
+#endif
+#ifdef UATOMIC_HAS_ATOMIC_SHORT
+ case 2:
+ {
+ unsigned short old;
+
+ do {
+ old = uatomic_read((unsigned short *)addr);
+ } while (!__sync_bool_compare_and_swap_2(addr, old, val));
+
+ return old;
+ }
+#endif
case 4:
{
unsigned int old;
@@ -157,6 +197,34 @@ static inline __attribute__((always_inline))
unsigned long _uatomic_add_return(void *addr, unsigned long val, int len)
{
switch (len) {
+#ifdef UATOMIC_HAS_ATOMIC_BYTE
+ case 1:
+ {
+ unsigned char old, oldt;
+
+ oldt = uatomic_read((unsigned char *)addr);
+ do {
+ old = oldt;
+ oldt = _uatomic_cmpxchg(addr, old, old + val, 1);
+ } while (oldt != old);
+
+ return old + val;
+ }
+#endif
+#ifdef UATOMIC_HAS_ATOMIC_SHORT
+ case 2:
+ {
+ unsigned short old, oldt;
+
+ oldt = uatomic_read((unsigned short *)addr);
+ do {
+ old = oldt;
+ oldt = _uatomic_cmpxchg(addr, old, old + val, 2);
+ } while (oldt != old);
+
+ return old + val;
+ }
+#endif
case 4:
{
unsigned int old, oldt;
@@ -201,6 +269,34 @@ static inline __attribute__((always_inline))
unsigned long _uatomic_exchange(void *addr, unsigned long val, int len)
{
switch (len) {
+#ifdef UATOMIC_HAS_ATOMIC_BYTE
+ case 1:
+ {
+ unsigned char old, oldt;
+
+ oldt = uatomic_read((unsigned char *)addr);
+ do {
+ old = oldt;
+ oldt = _uatomic_cmpxchg(addr, old, val, 1);
+ } while (oldt != old);
+
+ return old;
+ }
+#endif
+#ifdef UATOMIC_HAS_ATOMIC_SHORT
+ case 2:
+ {
+ unsigned short old, oldt;
+
+ oldt = uatomic_read((unsigned short *)addr);
+ do {
+ old = oldt;
+ oldt = _uatomic_cmpxchg(addr, old, val, 2);
+ } while (oldt != old);
+
+ return old;
+ }
+#endif
case 4:
{
unsigned int old, oldt;
--
1.6.6
^ permalink raw reply [flat|nested] 19+ messages in thread* [ltt-dev] [PATCH 09/12] add Alpha support
2010-02-19 19:22 [ltt-dev] [PATCH 00/12] provide generic version of uatomic and other per-arch defs Paolo Bonzini
` (7 preceding siblings ...)
2010-02-19 19:22 ` [ltt-dev] [PATCH 08/12] move whether atomic byte/short exists to uatomic_arch_*.h Paolo Bonzini
@ 2010-02-19 19:22 ` Paolo Bonzini
2010-02-19 19:22 ` [ltt-dev] [PATCH 10/12] support compiling on unknown architectures Paolo Bonzini
` (2 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Paolo Bonzini @ 2010-02-19 19:22 UTC (permalink / raw)
And you already know what needs to be special-cased for Alpha...
Signed-off-by: Paolo Bonzini <pbonzini at redhat.com>
---
configure.ac | 1 +
urcu/arch_alpha.h | 48 +++++++++++++++++++++++++++++++++++++++++++++
urcu/uatomic_arch_alpha.h | 32 ++++++++++++++++++++++++++++++
3 files changed, 81 insertions(+), 0 deletions(-)
create mode 100644 urcu/arch_alpha.h
create mode 100644 urcu/uatomic_arch_alpha.h
diff --git a/configure.ac b/configure.ac
index ab6f3a2..1ce19d0 100644
--- a/configure.ac
+++ b/configure.ac
@@ -50,6 +50,7 @@ case $host_cpu in
s390) ARCHTYPE="s390" ;;
s390x) ARCHTYPE="s390" ;;
sparc64) ARCHTYPE="sparc64" ;;
+ alpha*) ARCHTYPE="alpha" ;;
*) ARCHTYPE="unknown";;
esac
diff --git a/urcu/arch_alpha.h b/urcu/arch_alpha.h
new file mode 100644
index 0000000..f684701
--- /dev/null
+++ b/urcu/arch_alpha.h
@@ -0,0 +1,48 @@
+#ifndef _URCU_ARCH_ALPHA_H
+#define _URCU_ARCH_ALPHA_H
+
+/*
+ * arch_alpha.h: trivial definitions for the Alpha architecture.
+ *
+ * Copyright (c) 2010 Paolo Bonzini <pbonzini at redhat.com>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+*
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <urcu/compiler.h>
+#include <urcu/config.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define mb() asm volatile("mb":::"memory")
+#define wmb() asm volatile("wmb":::"memory")
+#define read_barrier_depends() asm volatile("mb":::"memory")
+
+typedef unsigned long long cycles_t;
+
+static inline cycles_t get_cycles (void)
+{
+ return 0; /* not supported */
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#include <urcu/arch_defaults.h>
+
+#endif /* _URCU_ARCH_ALPHA_H */
diff --git a/urcu/uatomic_arch_alpha.h b/urcu/uatomic_arch_alpha.h
new file mode 100644
index 0000000..6d002cb
--- /dev/null
+++ b/urcu/uatomic_arch_alpha.h
@@ -0,0 +1,32 @@
+#ifndef _URCU_UATOMIC_ARCH_ALPHA_H
+#define _URCU_UATOMIC_ARCH_ALPHA_H
+
+/*
+ * Atomic exchange operations for the Alpha architecture. Let GCC do it.
+ *
+ * Copyright (c) 2010 Paolo Bonzini <pbonzini at redhat.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include <urcu/compiler.h>
+#include <urcu/system.h>
+#include <urcu/uatomic_defaults.h>
+
+#endif /* _URCU_UATOMIC_ARCH_ALPHA_H */
--
1.6.6
^ permalink raw reply [flat|nested] 19+ messages in thread* [ltt-dev] [PATCH 10/12] support compiling on unknown architectures
2010-02-19 19:22 [ltt-dev] [PATCH 00/12] provide generic version of uatomic and other per-arch defs Paolo Bonzini
` (8 preceding siblings ...)
2010-02-19 19:22 ` [ltt-dev] [PATCH 09/12] add Alpha support Paolo Bonzini
@ 2010-02-19 19:22 ` Paolo Bonzini
2010-02-19 19:22 ` [ltt-dev] [PATCH 11/12] avoid multiple evaluation of STORE_SHARED argument Paolo Bonzini
2010-02-19 19:22 ` [ltt-dev] [PATCH 12/12] centralize definition of BITS_PER_LONG Paolo Bonzini
11 siblings, 0 replies; 19+ messages in thread
From: Paolo Bonzini @ 2010-02-19 19:22 UTC (permalink / raw)
The new defaults mean that, for example, ia64 support comes for free.
Signed-off-by: Paolo Bonzini <pbonzini at redhat.com>
Acked-by: Mathieu Desnoyers <mathieu.desnoyers at efficios.com>
---
configure.ac | 10 ++++++----
1 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/configure.ac b/configure.ac
index 1ce19d0..871e600 100644
--- a/configure.ac
+++ b/configure.ac
@@ -54,11 +54,13 @@ case $host_cpu in
*) ARCHTYPE="unknown";;
esac
-if test "$ARCHTYPE" = "unknown"; then
- AC_MSG_ERROR([Unable to detect the architecture.])
+if test "$ARCHTYPE" != "unknown"; then
+ UATOMICSRC=urcu/uatomic_arch_$ARCHTYPE.h
+ ARCHSRC=urcu/arch_$ARCHTYPE.h
+else
+ UATOMICSRC=urcu/uatomic_defaults.h
+ ARCHSRC=urcu/arch_defaults.h
fi
-UATOMICSRC=urcu/uatomic_arch_$ARCHTYPE.h
-ARCHSRC=urcu/arch_$ARCHTYPE.h
if test "x$ARCHTYPE" != xx86 -a "x$ARCHTYPE" != xppc; then
APISRC=tests/api_gcc.h
else
--
1.6.6
^ permalink raw reply [flat|nested] 19+ messages in thread* [ltt-dev] [PATCH 11/12] avoid multiple evaluation of STORE_SHARED argument
2010-02-19 19:22 [ltt-dev] [PATCH 00/12] provide generic version of uatomic and other per-arch defs Paolo Bonzini
` (9 preceding siblings ...)
2010-02-19 19:22 ` [ltt-dev] [PATCH 10/12] support compiling on unknown architectures Paolo Bonzini
@ 2010-02-19 19:22 ` Paolo Bonzini
2010-02-19 19:22 ` [ltt-dev] [PATCH 12/12] centralize definition of BITS_PER_LONG Paolo Bonzini
11 siblings, 0 replies; 19+ messages in thread
From: Paolo Bonzini @ 2010-02-19 19:22 UTC (permalink / raw)
Acked-by: Mathieu Desnoyers <mathieu.desnoyers at efficios.com>
---
urcu/system.h | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/urcu/system.h b/urcu/system.h
index e36a13b..0c3152f 100644
--- a/urcu/system.h
+++ b/urcu/system.h
@@ -46,9 +46,9 @@
*/
#define STORE_SHARED(x, v) \
({ \
- _STORE_SHARED(x, v); \
+ typeof(x) _v = _STORE_SHARED(x, v); \
smp_wmc(); \
- (v); \
+ _v; \
})
#endif /* _URCU_SYSTEM_H */
--
1.6.6
^ permalink raw reply [flat|nested] 19+ messages in thread* [ltt-dev] [PATCH 12/12] centralize definition of BITS_PER_LONG
2010-02-19 19:22 [ltt-dev] [PATCH 00/12] provide generic version of uatomic and other per-arch defs Paolo Bonzini
` (10 preceding siblings ...)
2010-02-19 19:22 ` [ltt-dev] [PATCH 11/12] avoid multiple evaluation of STORE_SHARED argument Paolo Bonzini
@ 2010-02-19 19:22 ` Paolo Bonzini
11 siblings, 0 replies; 19+ messages in thread
From: Paolo Bonzini @ 2010-02-19 19:22 UTC (permalink / raw)
Use __SIZEOF_LONG__, defined by GCC 4.3 or later, or _LP64, defined
by GCC 3.4 or later.
Signed-off-by: Paolo Bonzini <pbonzini at redhat.com>
---
urcu/arch_ppc.h | 4 ----
urcu/arch_s390.h | 12 ------------
urcu/arch_sparc64.h | 4 ----
urcu/compiler.h | 8 ++++++++
urcu/uatomic_arch_ppc.h | 12 ------------
urcu/uatomic_arch_s390.h | 12 ------------
urcu/uatomic_arch_sparc64.h | 12 ------------
urcu/uatomic_arch_x86.h | 12 ------------
urcu/uatomic_generic.h | 4 ----
9 files changed, 8 insertions(+), 72 deletions(-)
diff --git a/urcu/arch_ppc.h b/urcu/arch_ppc.h
index 1e096db..eeeb753 100644
--- a/urcu/arch_ppc.h
+++ b/urcu/arch_ppc.h
@@ -32,10 +32,6 @@ extern "C" {
/* Include size of POWER5+ L3 cache lines: 256 bytes */
#define CACHE_LINE_SIZE 256
-#ifndef BITS_PER_LONG
-#define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
-#endif
-
#define mb() asm volatile("sync":::"memory")
/*
diff --git a/urcu/arch_s390.h b/urcu/arch_s390.h
index 4ad3ee8..1a55e0d 100644
--- a/urcu/arch_s390.h
+++ b/urcu/arch_s390.h
@@ -37,18 +37,6 @@ extern "C" {
#define CACHE_LINE_SIZE 128
-#ifndef __SIZEOF_LONG__
-#ifdef __s390x__
-#define __SIZEOF_LONG__ 8
-#else
-#define __SIZEOF_LONG__ 4
-#endif
-#endif
-
-#ifndef BITS_PER_LONG
-#define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
-#endif
-
#define mb() __asm__ __volatile__("bcr 15,0" : : : "memory")
typedef unsigned long long cycles_t;
diff --git a/urcu/arch_sparc64.h b/urcu/arch_sparc64.h
index 4d08d55..9d85b5e 100644
--- a/urcu/arch_sparc64.h
+++ b/urcu/arch_sparc64.h
@@ -31,10 +31,6 @@ extern "C" {
#define CACHE_LINE_SIZE 256
-#ifndef BITS_PER_LONG
-#define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
-#endif
-
/*
* Inspired from the Linux kernel. Workaround Spitfire bug #51.
*/
diff --git a/urcu/compiler.h b/urcu/compiler.h
index aab2c5c..5b7bb30 100644
--- a/urcu/compiler.h
+++ b/urcu/compiler.h
@@ -47,4 +47,12 @@
#define min(a,b) ((a)<(b)?(a):(b))
#endif
+#if defined(__SIZEOF_LONG__)
+#define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
+#elif defined(_LP64)
+#define BITS_PER_LONG 64
+#else
+#define BITS_PER_LONG 32
+#endif
+
#endif /* _URCU_COMPILER_H */
diff --git a/urcu/uatomic_arch_ppc.h b/urcu/uatomic_arch_ppc.h
index 39c4c24..4db7007 100644
--- a/urcu/uatomic_arch_ppc.h
+++ b/urcu/uatomic_arch_ppc.h
@@ -27,24 +27,12 @@
extern "C" {
#endif
-#ifndef __SIZEOF_LONG__
-#ifdef __powerpc64__
-#define __SIZEOF_LONG__ 8
-#else
-#define __SIZEOF_LONG__ 4
-#endif
-#endif
-
#ifdef __NO_LWSYNC__
#define LWSYNC_OPCODE "sync\n"
#else
#define LWSYNC_OPCODE "lwsync\n"
#endif
-#ifndef BITS_PER_LONG
-#define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
-#endif
-
#define ILLEGAL_INSTR ".long 0xd00d00"
/*
diff --git a/urcu/uatomic_arch_s390.h b/urcu/uatomic_arch_s390.h
index 5942ffe..0a0f238 100644
--- a/urcu/uatomic_arch_s390.h
+++ b/urcu/uatomic_arch_s390.h
@@ -36,18 +36,6 @@
extern "C" {
#endif
-#ifndef __SIZEOF_LONG__
-#ifdef __s390x__
-#define __SIZEOF_LONG__ 8
-#else
-#define __SIZEOF_LONG__ 4
-#endif
-#endif
-
-#ifndef BITS_PER_LONG
-#define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
-#endif
-
#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
#define COMPILER_HAVE_SHORT_MEM_OPERAND
#endif
diff --git a/urcu/uatomic_arch_sparc64.h b/urcu/uatomic_arch_sparc64.h
index 81f95cb..399ac12 100644
--- a/urcu/uatomic_arch_sparc64.h
+++ b/urcu/uatomic_arch_sparc64.h
@@ -27,18 +27,6 @@
extern "C" {
#endif
-#ifndef __SIZEOF_LONG__
-#ifdef __LP64__
-#define __SIZEOF_LONG__ 8
-#else
-#define __SIZEOF_LONG__ 4
-#endif
-#endif
-
-#ifndef BITS_PER_LONG
-#define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
-#endif
-
/* cmpxchg */
static inline __attribute__((always_inline))
diff --git a/urcu/uatomic_arch_x86.h b/urcu/uatomic_arch_x86.h
index 666e498..043e616 100644
--- a/urcu/uatomic_arch_x86.h
+++ b/urcu/uatomic_arch_x86.h
@@ -30,18 +30,6 @@
extern "C" {
#endif
-#ifndef __SIZEOF_LONG__
-#if defined(__x86_64__) || defined(__amd64__)
-#define __SIZEOF_LONG__ 8
-#else
-#define __SIZEOF_LONG__ 4
-#endif
-#endif
-
-#ifndef BITS_PER_LONG
-#define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
-#endif
-
/*
* Derived from AO_compare_and_swap() and AO_test_and_set_full().
*/
diff --git a/urcu/uatomic_generic.h b/urcu/uatomic_generic.h
index ea2dfbf..8ab0947 100644
--- a/urcu/uatomic_generic.h
+++ b/urcu/uatomic_generic.h
@@ -28,10 +28,6 @@
extern "C" {
#endif
-#ifndef BITS_PER_LONG
-#define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
-#endif
-
#ifndef uatomic_set
#define uatomic_set(addr, v) STORE_SHARED(*(addr), (v))
#endif
--
1.6.6
^ permalink raw reply [flat|nested] 19+ messages in thread