From mboxrd@z Thu Jan 1 00:00:00 1970 From: compudj@krystal.dyndns.org (Mathieu Desnoyers) Date: Wed, 17 Feb 2010 22:25:54 -0500 Subject: [ltt-dev] [PATCH 12/12] centralize definition of BITS_PER_LONG In-Reply-To: <1266260686-17588-13-git-send-email-pbonzini@redhat.com> References: <1266260686-17588-1-git-send-email-pbonzini@redhat.com> <1266260686-17588-13-git-send-email-pbonzini@redhat.com> Message-ID: <20100218032554.GG11338@Krystal> * Paolo Bonzini (pbonzini at redhat.com) wrote: > Use __SIZEOF_LONG__, defined by GCC 4.3 or later, or _LP64, defined > by GCC 3.4 or later. The GCC 3.4 requirement is only for 64-bit > systems. > > Signed-off-by: Paolo Bonzini > --- > urcu/arch_ppc.h | 4 ---- > urcu/arch_s390.h | 12 ------------ > urcu/arch_sparc64.h | 4 ---- > urcu/compiler.h | 8 ++++++++ > urcu/uatomic_arch_ppc.h | 12 ------------ > urcu/uatomic_arch_s390.h | 12 ------------ > urcu/uatomic_arch_sparc64.h | 12 ------------ > urcu/uatomic_arch_x86.h | 12 ------------ > urcu/uatomic_defaults.h | 4 ---- > 9 files changed, 8 insertions(+), 72 deletions(-) > > diff --git a/urcu/arch_ppc.h b/urcu/arch_ppc.h > index f925d07..41e6a7c 100644 > --- a/urcu/arch_ppc.h > +++ b/urcu/arch_ppc.h > @@ -32,10 +32,6 @@ extern "C" { > /* Include size of POWER5+ L3 cache lines: 256 bytes */ > #define CACHE_LINE_SIZE 256 > > -#ifndef BITS_PER_LONG > -#define BITS_PER_LONG (__SIZEOF_LONG__ * 8) > -#endif > - > #define mb() asm volatile("sync":::"memory") > > /* > diff --git a/urcu/arch_s390.h b/urcu/arch_s390.h > index 0982112..889fc0d 100644 > --- a/urcu/arch_s390.h > +++ b/urcu/arch_s390.h > @@ -37,18 +37,6 @@ extern "C" { > > #define CACHE_LINE_SIZE 128 > > -#ifndef __SIZEOF_LONG__ > -#ifdef __s390x__ > -#define __SIZEOF_LONG__ 8 > -#else > -#define __SIZEOF_LONG__ 4 > -#endif > -#endif > - > -#ifndef BITS_PER_LONG > -#define BITS_PER_LONG (__SIZEOF_LONG__ * 8) > -#endif > - > #define mb() __asm__ __volatile__("bcr 15,0" : : : "memory") > > typedef unsigned long long cycles_t; > diff --git a/urcu/arch_sparc64.h b/urcu/arch_sparc64.h > index c906168..c10afeb 100644 > --- a/urcu/arch_sparc64.h > +++ b/urcu/arch_sparc64.h > @@ -31,10 +31,6 @@ extern "C" { > > #define CACHE_LINE_SIZE 256 > > -#ifndef BITS_PER_LONG > -#define BITS_PER_LONG (__SIZEOF_LONG__ * 8) > -#endif > - > /* > * Inspired from the Linux kernel. Workaround Spitfire bug #51. > */ > diff --git a/urcu/compiler.h b/urcu/compiler.h > index aab2c5c..5b7bb30 100644 > --- a/urcu/compiler.h > +++ b/urcu/compiler.h > @@ -47,4 +47,12 @@ > #define min(a,b) ((a)<(b)?(a):(b)) > #endif > > +#if defined(__SIZEOF_LONG__) > +#define BITS_PER_LONG (__SIZEOF_LONG__ * 8) > +#elif defined(_LP64) How about _LLP64 and _ILP64 ? (not sure exactly which architectures would fit in this category nowadays though). Thanks, Mathieu > +#define BITS_PER_LONG 64 > +#else > +#define BITS_PER_LONG 32 > +#endif > + > #endif /* _URCU_COMPILER_H */ > diff --git a/urcu/uatomic_arch_ppc.h b/urcu/uatomic_arch_ppc.h > index b42bfdb..801c41c 100644 > --- a/urcu/uatomic_arch_ppc.h > +++ b/urcu/uatomic_arch_ppc.h > @@ -27,24 +27,12 @@ > extern "C" { > #endif > > -#ifndef __SIZEOF_LONG__ > -#ifdef __powerpc64__ > -#define __SIZEOF_LONG__ 8 > -#else > -#define __SIZEOF_LONG__ 4 > -#endif > -#endif > - > #ifdef __NO_LWSYNC__ > #define LWSYNC_OPCODE "sync\n" > #else > #define LWSYNC_OPCODE "lwsync\n" > #endif > > -#ifndef BITS_PER_LONG > -#define BITS_PER_LONG (__SIZEOF_LONG__ * 8) > -#endif > - > #define ILLEGAL_INSTR ".long 0xd00d00" > > /* > diff --git a/urcu/uatomic_arch_s390.h b/urcu/uatomic_arch_s390.h > index 2f9b532..44bcb97 100644 > --- a/urcu/uatomic_arch_s390.h > +++ b/urcu/uatomic_arch_s390.h > @@ -36,18 +36,6 @@ > extern "C" { > #endif > > -#ifndef __SIZEOF_LONG__ > -#ifdef __s390x__ > -#define __SIZEOF_LONG__ 8 > -#else > -#define __SIZEOF_LONG__ 4 > -#endif > -#endif > - > -#ifndef BITS_PER_LONG > -#define BITS_PER_LONG (__SIZEOF_LONG__ * 8) > -#endif > - > #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2) > #define COMPILER_HAVE_SHORT_MEM_OPERAND > #endif > diff --git a/urcu/uatomic_arch_sparc64.h b/urcu/uatomic_arch_sparc64.h > index ef6572e..df66cd1 100644 > --- a/urcu/uatomic_arch_sparc64.h > +++ b/urcu/uatomic_arch_sparc64.h > @@ -27,18 +27,6 @@ > extern "C" { > #endif > > -#ifndef __SIZEOF_LONG__ > -#ifdef __LP64__ > -#define __SIZEOF_LONG__ 8 > -#else > -#define __SIZEOF_LONG__ 4 > -#endif > -#endif > - > -#ifndef BITS_PER_LONG > -#define BITS_PER_LONG (__SIZEOF_LONG__ * 8) > -#endif > - > /* cmpxchg */ > > static inline __attribute__((always_inline)) > diff --git a/urcu/uatomic_arch_x86.h b/urcu/uatomic_arch_x86.h > index f2d0c19..269618c 100644 > --- a/urcu/uatomic_arch_x86.h > +++ b/urcu/uatomic_arch_x86.h > @@ -30,18 +30,6 @@ > extern "C" { > #endif > > -#ifndef __SIZEOF_LONG__ > -#if defined(__x86_64__) || defined(__amd64__) > -#define __SIZEOF_LONG__ 8 > -#else > -#define __SIZEOF_LONG__ 4 > -#endif > -#endif > - > -#ifndef BITS_PER_LONG > -#define BITS_PER_LONG (__SIZEOF_LONG__ * 8) > -#endif > - > /* > * Derived from AO_compare_and_swap() and AO_test_and_set_full(). > */ > diff --git a/urcu/uatomic_defaults.h b/urcu/uatomic_defaults.h > index 2d0af6e..5c93261 100644 > --- a/urcu/uatomic_defaults.h > +++ b/urcu/uatomic_defaults.h > @@ -28,10 +28,6 @@ > extern "C" { > #endif > > -#ifndef BITS_PER_LONG > -#define BITS_PER_LONG (__SIZEOF_LONG__ * 8) > -#endif > - > #ifndef uatomic_set > #define uatomic_set(addr, v) STORE_SHARED(*(addr), (v)) > #endif > -- > 1.6.6 > > > > _______________________________________________ > ltt-dev mailing list > ltt-dev at lists.casi.polymtl.ca > http://lists.casi.polymtl.ca/cgi-bin/mailman/listinfo/ltt-dev > -- Mathieu Desnoyers OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68