* [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
@ 2009-12-07 15:00 Hui Zhu
2009-12-07 16:54 ` Michael Snyder
` (2 more replies)
0 siblings, 3 replies; 39+ messages in thread
From: Hui Zhu @ 2009-12-07 15:00 UTC (permalink / raw)
To: gdb-patches ml; +Cc: Michael Snyder, Mark Kettenis
[-- Attachment #1: Type: text/plain, Size: 33065 bytes --]
Hi guys,
This patch make prec support x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4.
Please help me review it.
Thanks,
Hui
2009-12-07 Hui Zhu <teawater@gmail.com>
* i386-tdep.c (OT_DQUAD): New enum.
(i386_process_record): Add code for MMX, 3DNow!, SSE, SSE2,
SSE3, SSSE3 and SSE4.
---
i386-tdep.c | 1217 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 1201 insertions(+), 16 deletions(-)
--- a/i386-tdep.c
+++ b/i386-tdep.c
@@ -2848,6 +2848,7 @@ enum
OT_WORD,
OT_LONG,
OT_QUAD,
+ OT_DQUAD,
};
/* i386 arith/logic operations */
@@ -3217,6 +3218,7 @@ i386_process_record (struct gdbarch *gdb
int rex = 0;
uint8_t rex_w = -1;
uint8_t rex_r = 0;
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
memset (&ir, 0, sizeof (struct i386_record_s));
ir.regcache = regcache;
@@ -3226,7 +3228,7 @@ i386_process_record (struct gdbarch *gdb
ir.dflag = 1;
ir.override = -1;
ir.popl_esp_hack = 0;
- ir.regmap = gdbarch_tdep (gdbarch)->record_regmap;
+ ir.regmap = tdep->record_regmap;
ir.gdbarch = gdbarch;
if (record_debug > 1)
@@ -3344,7 +3346,7 @@ reswitch:
return -1;
}
ir.addr++;
- opcode = (uint16_t) tmpu8 | 0x0f00;
+ opcode = (uint32_t) tmpu8 | 0x0f00;
goto reswitch;
break;
@@ -4868,7 +4870,7 @@ reswitch:
}
ir.addr++;
if (tmpu8 != 0x80
- || gdbarch_tdep (gdbarch)->i386_intx80_record == NULL)
+ || tdep->i386_intx80_record == NULL)
{
printf_unfiltered (_("Process record doesn't support "
"instruction int 0x%02x.\n"),
@@ -4876,7 +4878,7 @@ reswitch:
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_intx80_record (ir.regcache);
+ ret = tdep->i386_intx80_record (ir.regcache);
if (ret)
return ret;
}
@@ -4973,14 +4975,14 @@ reswitch:
ir.addr -= 2;
goto no_support;
}
- if (gdbarch_tdep (gdbarch)->i386_sysenter_record == NULL)
+ if (tdep->i386_sysenter_record == NULL)
{
printf_unfiltered (_("Process record doesn't support "
"instruction sysenter.\n"));
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_sysenter_record (ir.regcache);
+ ret = tdep->i386_sysenter_record (ir.regcache);
if (ret)
return ret;
}
@@ -4998,14 +5000,14 @@ reswitch:
case 0x0f05:
{
int ret;
- if (gdbarch_tdep (gdbarch)->i386_syscall_record == NULL)
+ if (tdep->i386_syscall_record == NULL)
{
printf_unfiltered (_("Process record doesn't support "
"instruction syscall.\n"));
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_syscall_record (ir.regcache);
+ ret = tdep->i386_syscall_record (ir.regcache);
if (ret)
return ret;
}
@@ -5349,14 +5351,1196 @@ reswitch:
I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
- /* MMX/SSE/SSE2/PNI support */
- /* XXX */
+ /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
+ /* 3DNow! prefetch */
+ case 0x0f0d:
+ break;
+
+ /* 3DNow! femms */
+ case 0x0f0e:
+ /* emms */
+ case 0x0f77:
+ if (i386_fpc_regnum_p (gdbarch, I387_FTAG_REGNUM(tdep)))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache, I387_FTAG_REGNUM(tdep));
+ break;
+
+ /* 3DNow! data */
+ case 0x0f0f:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (target_read_memory (ir.addr, &tmpu8, 1))
+ {
+ if (record_debug)
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr %s len = 1.\n"),
+ paddress (gdbarch, ir.addr));
+ return -1;
+ }
+ ir.addr++;
+ switch (tmpu8)
+ {
+ /* 3DNow! pi2fw */
+ case 0x0c:
+ /* 3DNow! pi2fd */
+ case 0x0d:
+ /* 3DNow! pf2iw */
+ case 0x1c:
+ /* 3DNow! pf2id */
+ case 0x1d:
+ /* 3DNow! pfnacc */
+ case 0x8a:
+ /* 3DNow! pfpnacc */
+ case 0x8e:
+ /* 3DNow! pfcmpge */
+ case 0x90:
+ /* 3DNow! pfmin */
+ case 0x94:
+ /* 3DNow! pfrcp */
+ case 0x96:
+ /* 3DNow! pfrsqrt */
+ case 0x97:
+ /* 3DNow! pfsub */
+ case 0x9a:
+ /* 3DNow! pfadd */
+ case 0x9e:
+ /* 3DNow! pfcmpgt */
+ case 0xa0:
+ /* 3DNow! pfmax */
+ case 0xa4:
+ /* 3DNow! pfrcpit1 */
+ case 0xa6:
+ /* 3DNow! pfrsqit1 */
+ case 0xa7:
+ /* 3DNow! pfsubr */
+ case 0xaa:
+ /* 3DNow! pfacc */
+ case 0xae:
+ /* 3DNow! pfcmpeq */
+ case 0xb0:
+ /* 3DNow! pfmul */
+ case 0xb4:
+ /* 3DNow! pfrcpit2 */
+ case 0xb6:
+ /* 3DNow! pmulhrw */
+ case 0xb7:
+ /* 3DNow! pswapd */
+ case 0xbb:
+ /* 3DNow! pavgusb */
+ case 0xbf:
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
+ goto no_support_3dnow_data;
+ record_arch_list_add_reg (ir.regcache, ir.reg);
+ break;
+
+ default:
+no_support_3dnow_data:
+ opcode = (opcode << 8) | tmpu8;
+ goto no_support;
+ break;
+ }
+ break;
+
+ /* rsm */
+ case 0x0faa:
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
+ break;
+
+ case 0x0fae:
+ if (i386_record_modrm (&ir))
+ return -1;
+ switch(ir.reg)
+ {
+ /* fxsave */
+ case 0:
+ {
+ uint64_t tmpu64;
+
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ if (i386_record_lea_modrm_addr (&ir, &tmpu64))
+ return -1;
+ if (record_arch_list_add_mem (tmpu64, 512))
+ return -1;
+ }
+ break;
+
+ /* fxrstor */
+ case 1:
+ {
+ int i;
+
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+
+ for (i = I387_MM0_REGNUM (tdep);
+ i386_mmx_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ for (i = I387_XMM0_REGNUM (tdep);
+ i386_sse_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ if (i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
+ record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
+
+ for (i = I387_ST0_REGNUM (tdep);
+ i386_fp_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ for (i = I387_FCTRL_REGNUM (tdep);
+ i386_fpc_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+ }
+ break;
+
+ /* ldmxcsr */
+ case 2:
+ if (!i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
+ break;
+
+ /* stmxcsr */
+ case 3:
+ ir.ot = OT_LONG;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ /* lfence */
+ case 5:
+ /* mfence */
+ case 6:
+ /* sfence clflush */
+ case 7:
+ break;
+
+ default:
+ opcode = (opcode << 8) | ir.modrm;
+ goto no_support;
+ break;
+ }
+ break;
+
+ /* movnti */
+ case 0x0fc3:
+ ir.ot = (ir.dflag == 2) ? OT_QUAD : OT_LONG;
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ goto no_support;
+ ir.reg |= rex_r;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ /* Add prefix to opcode. */
+ case 0x0f10:
+ case 0x0f11:
+ case 0x0f12:
+ case 0x0f13:
+ case 0x0f14:
+ case 0x0f16:
+ case 0x0f17:
+ case 0x0f28:
+ case 0x0f29:
+ case 0x0f2a:
+ case 0x0f2b:
+ case 0x0f2c:
+ case 0x0f2d:
+ case 0x0f2e:
+ case 0x0f2f:
+ case 0x0f38:
+ case 0x0f39:
+ case 0x0f3a:
+ case 0x0f50:
+ case 0x0f51:
+ case 0x0f52:
+ case 0x0f53:
+ case 0x0f54:
+ case 0x0f55:
+ case 0x0f56:
+ case 0x0f57:
+ case 0x0f58:
+ case 0x0f59:
+ case 0x0f5a:
+ case 0x0f5b:
+ case 0x0f5c:
+ case 0x0f5d:
+ case 0x0f5e:
+ case 0x0f5f:
+ case 0x0f60:
+ case 0x0f61:
+ case 0x0f62:
+ case 0x0f63:
+ case 0x0f64:
+ case 0x0f65:
+ case 0x0f66:
+ case 0x0f67:
+ case 0x0f68:
+ case 0x0f69:
+ case 0x0f6a:
+ case 0x0f6b:
+ case 0x0f6c:
+ case 0x0f6d:
+ case 0x0f6e:
+ case 0x0f6f:
+ case 0x0f70:
+ case 0x0f71:
+ case 0x0f72:
+ case 0x0f73:
+ case 0x0f74:
+ case 0x0f75:
+ case 0x0f76:
+ case 0x0f7c:
+ case 0x0f7d:
+ case 0x0f7e:
+ case 0x0f7f:
+ case 0x0fb8:
+ case 0x0fc2:
+ case 0x0fc4:
+ case 0x0fc5:
+ case 0x0fc6:
+ case 0x0fd0:
+ case 0x0fd1:
+ case 0x0fd2:
+ case 0x0fd3:
+ case 0x0fd4:
+ case 0x0fd5:
+ case 0x0fd6:
+ case 0x0fd7:
+ case 0x0fd8:
+ case 0x0fd9:
+ case 0x0fda:
+ case 0x0fdb:
+ case 0x0fdc:
+ case 0x0fdd:
+ case 0x0fde:
+ case 0x0fdf:
+ case 0x0fe0:
+ case 0x0fe1:
+ case 0x0fe2:
+ case 0x0fe3:
+ case 0x0fe4:
+ case 0x0fe5:
+ case 0x0fe6:
+ case 0x0fe7:
+ case 0x0fe8:
+ case 0x0fe9:
+ case 0x0fea:
+ case 0x0feb:
+ case 0x0fec:
+ case 0x0fed:
+ case 0x0fee:
+ case 0x0fef:
+ case 0x0ff0:
+ case 0x0ff1:
+ case 0x0ff2:
+ case 0x0ff3:
+ case 0x0ff4:
+ case 0x0ff5:
+ case 0x0ff6:
+ case 0x0ff7:
+ case 0x0ff8:
+ case 0x0ff9:
+ case 0x0ffa:
+ case 0x0ffb:
+ case 0x0ffc:
+ case 0x0ffd:
+ case 0x0ffe:
+ switch (prefixes)
+ {
+ case PREFIX_REPNZ:
+ opcode |= 0xf20000;
+ break;
+ case PREFIX_DATA:
+ opcode |= 0x660000;
+ break;
+ case PREFIX_REPZ:
+ opcode |= 0xf30000;
+ break;
+ }
+reswitch_prefix_add:
+ switch (opcode)
+ {
+ case 0x0f38:
+ case 0x660f38:
+ case 0xf20f38:
+ case 0x0f3a:
+ case 0x660f3a:
+ if (target_read_memory (ir.addr, &tmpu8, 1))
+ {
+ if (record_debug)
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr %s len = 1.\n"),
+ paddress (gdbarch, ir.addr));
+ return -1;
+ }
+ ir.addr++;
+ opcode = (uint32_t) tmpu8 | opcode << 4;
+ goto reswitch_prefix_add;
+ break;
+
+ /* movups */
+ case 0x0f10:
+ /* movupd */
+ case 0x660f10:
+ /* movss */
+ case 0xf30f10:
+ /* movsd */
+ case 0xf20f10:
+ /* movlps */
+ case 0x0f12:
+ /* movlpd */
+ case 0x660f12:
+ /* movsldup */
+ case 0xf30f12:
+ /* movddup */
+ case 0xf20f12:
+ /* unpcklps */
+ case 0x0f14:
+ /* unpcklpd */
+ case 0x660f14:
+ /* unpckhps */
+ case 0x0f15:
+ /* unpckhpd */
+ case 0x660f15:
+ /* movhps */
+ case 0x0f16:
+ /* movhpd */
+ case 0x660f16:
+ /* movshdup */
+ case 0xf30f16:
+ /* movaps */
+ case 0x0f28:
+ /* movapd */
+ case 0x660f28:
+ /* cvtpi2ps */
+ case 0x0f2a:
+ /* cvtpi2pd */
+ case 0x660f2a:
+ /* cvtsi2ss */
+ case 0xf30f2a:
+ /* cvtsi2sd */
+ case 0xf20f2a:
+ /* cvttps2pi */
+ case 0x0f2c:
+ /* cvttpd2pi */
+ case 0x660f2c:
+ /* cvtps2pi */
+ case 0x0f2d:
+ /* cvtpd2pi */
+ case 0x660f2d:
+ /* pshufb */
+ case 0x660f3800:
+ /* phaddw */
+ case 0x660f3801:
+ /* phaddd */
+ case 0x660f3802:
+ /* phaddsw */
+ case 0x660f3803:
+ /* pmaddubsw */
+ case 0x660f3804:
+ /* phsubw */
+ case 0x660f3805:
+ /* phsubd */
+ case 0x660f3806:
+ /* phaddsw */
+ case 0x660f3807:
+ /* psignb */
+ case 0x660f3808:
+ /* psignw */
+ case 0x660f3809:
+ /* psignd */
+ case 0x660f380a:
+ /* pmulhrsw */
+ case 0x660f380b:
+ /* pblendvb */
+ case 0x660f3810:
+ /* blendvps */
+ case 0x660f3814:
+ /* blendvpd */
+ case 0x660f3815:
+ /* pabsb */
+ case 0x660f381c:
+ /* pabsw */
+ case 0x660f381d:
+ /* pabsd */
+ case 0x660f381e:
+ /* pmovsxbw */
+ case 0x660f3820:
+ /* pmovsxbd */
+ case 0x660f3821:
+ /* pmovsxbq */
+ case 0x660f3822:
+ /* pmovsxwd */
+ case 0x660f3823:
+ /* pmovsxwq */
+ case 0x660f3824:
+ /* pmovsxdq */
+ case 0x660f3825:
+ /* pmuldq */
+ case 0x660f3828:
+ /* pcmpeqq */
+ case 0x660f3829:
+ /* movntdqa */
+ case 0x660f382a:
+ /* roundps */
+ case 0x660f3a08:
+ /* roundpd */
+ case 0x660f3a09:
+ /* roundss */
+ case 0x660f3a0a:
+ /* roundsd */
+ case 0x660f3a0b:
+ /* blendps */
+ case 0x660f3a0c:
+ /* blendpd */
+ case 0x660f3a0d:
+ /* pblendw */
+ case 0x660f3a0e:
+ /* palignr */
+ case 0x660f3a0f:
+ /* pinsrb */
+ case 0x660f3a20:
+ /* insertps */
+ case 0x660f3a21:
+ /* pinsrd pinsrq */
+ case 0x660f3a22:
+ /* dpps */
+ case 0x660f3a40:
+ /* dppd */
+ case 0x660f3a41:
+ /* mpsadbw */
+ case 0x660f3a42:
+ /* pcmpestrm */
+ case 0x660f3a60:
+ /* pcmpestri */
+ case 0x660f3a61:
+ /* pcmpistrm */
+ case 0x660f3a62:
+ /* pcmpistri */
+ case 0x660f3a63:
+ /* sqrtps */
+ case 0x0f51:
+ /* sqrtpd */
+ case 0x660f51:
+ /* sqrtsd */
+ case 0xf20f51:
+ /* sqrtss */
+ case 0xf30f51:
+ /* rsqrtps */
+ case 0x0f52:
+ /* rsqrtss */
+ case 0xf30f52:
+ /* rcpps */
+ case 0x0f53:
+ /* rcpss */
+ case 0xf30f53:
+ /* andps */
+ case 0x0f54:
+ /* andpd */
+ case 0x660f54:
+ /* andnps */
+ case 0x0f55:
+ /* andnpd */
+ case 0x660f55:
+ /* orps */
+ case 0x0f56:
+ /* orpd */
+ case 0x660f56:
+ /* xorps */
+ case 0x0f57:
+ /* xorpd */
+ case 0x660f57:
+ /* addps */
+ case 0x0f58:
+ /* addpd */
+ case 0x660f58:
+ /* addsd */
+ case 0xf20f58:
+ /* addss */
+ case 0xf30f58:
+ /* mulps */
+ case 0x0f59:
+ /* mulpd */
+ case 0x660f59:
+ /* mulsd */
+ case 0xf20f59:
+ /* mulss */
+ case 0xf30f59:
+ /* cvtps2pd */
+ case 0x0f5a:
+ /* cvtpd2ps */
+ case 0x660f5a:
+ /* cvtsd2ss */
+ case 0xf20f5a:
+ /* cvtss2sd */
+ case 0xf30f5a:
+ /* cvtdq2ps */
+ case 0x0f5b:
+ /* cvtps2dq */
+ case 0x660f5b:
+ /* cvttps2dq */
+ case 0xf30f5b:
+ /* subps */
+ case 0x0f5c:
+ /* subpd */
+ case 0x660f5c:
+ /* subsd */
+ case 0xf20f5c:
+ /* subss */
+ case 0xf30f5c:
+ /* minps */
+ case 0x0f5d:
+ /* minpd */
+ case 0x660f5d:
+ /* minsd */
+ case 0xf20f5d:
+ /* minss */
+ case 0xf30f5d:
+ /* divps */
+ case 0x0f5e:
+ /* divpd */
+ case 0x660f5e:
+ /* divsd */
+ case 0xf20f5e:
+ /* divss */
+ case 0xf30f5e:
+ /* maxps */
+ case 0x0f5f:
+ /* maxpd */
+ case 0x660f5f:
+ /* maxsd */
+ case 0xf20f5f:
+ /* maxss */
+ case 0xf30f5f:
+ /* punpcklbw */
+ case 0x660f60:
+ /* punpcklwd */
+ case 0x660f61:
+ /* punpckldq */
+ case 0x660f62:
+ /* packsswb */
+ case 0x660f63:
+ /* pcmpgtb */
+ case 0x660f64:
+ /* pcmpgtw */
+ case 0x660f65:
+ /* pcmpgtl */
+ case 0x660f66:
+ /* packuswb */
+ case 0x660f67:
+ /* punpckhbw */
+ case 0x660f68:
+ /* punpckhwd */
+ case 0x660f69:
+ /* punpckhdq */
+ case 0x660f6a:
+ /* packssdw */
+ case 0x660f6b:
+ /* punpcklqdq */
+ case 0x660f6c:
+ /* punpckhqdq */
+ case 0x660f6d:
+ /* movd */
+ case 0x660f6e:
+ /* movdqa */
+ case 0x660f6f:
+ /* movdqu */
+ case 0xf30f6f:
+ /* pshufd */
+ case 0x660f70:
+ /* pshuflw */
+ case 0xf20f70:
+ /* pshufhw */
+ case 0xf30f70:
+ /* pcmpeqb */
+ case 0x660f74:
+ /* pcmpeqw */
+ case 0x660f75:
+ /* pcmpeql */
+ case 0x660f76:
+ /* haddpd */
+ case 0x660f7c:
+ /* haddps */
+ case 0xf20f7c:
+ /* hsubpd */
+ case 0x660f7d:
+ /* hsubps */
+ case 0xf20f7d:
+ /* movq */
+ case 0xf30f7e:
+ /* cmpps */
+ case 0x0fc2:
+ /* cmppd */
+ case 0x660fc2:
+ /* cmpsd */
+ case 0xf20fc2:
+ /* cmpss */
+ case 0xf30fc2:
+ /* pinsrw */
+ case 0x660fc4:
+ /* shufps */
+ case 0x0fc6:
+ /* shufpd */
+ case 0x660fc6:
+ /* addsubpd */
+ case 0x660fd0:
+ /* addsubps */
+ case 0xf20fd0:
+ /* psrlw */
+ case 0x660fd1:
+ /* psrld */
+ case 0x660fd2:
+ /* psrlq */
+ case 0x660fd3:
+ /* paddq */
+ case 0x660fd4:
+ /* pmullw */
+ case 0x660fd5:
+ /* movq2dq */
+ case 0xf30fd6:
+ /* psubusb */
+ case 0x660fd8:
+ /* psubusw */
+ case 0x660fd9:
+ /* pminub */
+ case 0x660fda:
+ /* pand */
+ case 0x660fdb:
+ /* paddusb */
+ case 0x660fdc:
+ /* paddusw */
+ case 0x660fdd:
+ /* pmaxub */
+ case 0x660fde:
+ /* pandn */
+ case 0x660fdf:
+ /* pavgb */
+ case 0x660fe0:
+ /* psraw */
+ case 0x660fe1:
+ /* psrad */
+ case 0x660fe2:
+ /* pavgw */
+ case 0x660fe3:
+ /* pmulhuw */
+ case 0x660fe4:
+ /* pmulhw */
+ case 0x660fe5:
+ /* cvttpd2dq */
+ case 0x660fe6:
+ /* cvtpd2dq */
+ case 0xf20fe6:
+ /* cvtdq2pd */
+ case 0xf30fe6:
+ /* psubsb */
+ case 0x660fe8:
+ /* psubsw */
+ case 0x660fe9:
+ /* pminsw */
+ case 0x660fea:
+ /* por */
+ case 0x660feb:
+ /* paddsb */
+ case 0x660fec:
+ /* paddsw */
+ case 0x660fed:
+ /* pmaxsw */
+ case 0x660fee:
+ /* pxor */
+ case 0x660fef:
+ /* lddqu */
+ case 0x660ff0:
+ /* psllw */
+ case 0x660ff1:
+ /* pslld */
+ case 0x660ff2:
+ /* psllq */
+ case 0x660ff3:
+ /* pmuludq */
+ case 0x660ff4:
+ /* pmaddwd */
+ case 0x660ff5:
+ /* psadbw */
+ case 0x660ff6:
+ /* psubb */
+ case 0x660ff8:
+ /* psubw */
+ case 0x660ff9:
+ /* psubl */
+ case 0x660ffa:
+ /* psubq */
+ case 0x660ffb:
+ /* paddb */
+ case 0x660ffc:
+ /* paddw */
+ case 0x660ffd:
+ /* paddl */
+ case 0x660ffe:
+ if (i386_record_modrm (&ir))
+ return -1;
+ ir.reg |= rex_r;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.reg))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.reg);
+ if ((opcode & 0xfffffffc) == 0x660f3a60)
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ /* movups */
+ case 0x0f11:
+ /* movupd */
+ case 0x660f11:
+ /* movss */
+ case 0xf30f11:
+ /* movsd */
+ case 0xf20f11:
+ /* movlps */
+ case 0x0f13:
+ /* movlpd */
+ case 0x660f13:
+ /* movhps */
+ case 0x0f17:
+ /* movhpd */
+ case 0x660f17:
+ /* movaps */
+ case 0x0f29:
+ /* movapd */
+ case 0x660f29:
+ /* pextrb */
+ case 0x660f3a14:
+ /* pextrw */
+ case 0x660f3a15:
+ /* pextrd pextrq */
+ case 0x660f3a16:
+ /* extractps */
+ case 0x660f3a17:
+ /* movdqa */
+ case 0x660f7f:
+ /* movdqu */
+ case 0xf30f7f:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ if (opcode == 0x0f13 || opcode == 0x660f13
+ || opcode == 0x0f17 || opcode == 0x660f17)
+ goto no_support;
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM
(tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ switch (opcode)
+ {
+ case 0x660f3a14:
+ ir.ot = OT_BYTE;
+ break;
+ case 0x660f3a15:
+ ir.ot = OT_WORD;
+ break;
+ case 0x660f3a16:
+ ir.ot = OT_LONG;
+ break;
+ case 0x660f3a17:
+ ir.ot = OT_QUAD;
+ break;
+ default:
+ ir.ot = OT_DQUAD;
+ break;
+ }
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* movntps */
+ case 0x0f2b:
+ /* movntpd */
+ case 0x660f2b:
+ /* movntq */
+ case 0x0fe7:
+ /* movntdq */
+ case 0x660fe7:
+ if (ir.mod == 3)
+ goto no_support;
+ if (opcode == 0x0fe7)
+ ir.ot = OT_QUAD;
+ else
+ ir.ot = OT_DQUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ /* cvttss2si */
+ case 0xf30f2c:
+ /* cvttsd2si */
+ case 0xf20f2c:
+ /* cvtss2si */
+ case 0xf30f2d:
+ /* cvtsd2si */
+ case 0xf20f2d:
+ /* crc32 */
+ case 0xf20f38f0:
+ /* crc32 */
+ case 0xf20f38f1:
+ /* movmskps */
+ case 0x0f50:
+ /* movmskpd */
+ case 0x660f50:
+ /* pextrw */
+ case 0x0fc5:
+ /* pextrw */
+ case 0x660fc5:
+ /* pmovmskb */
+ case 0x0fd7:
+ /* pmovmskb */
+ case 0x660fd7:
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
+ break;
+
+ /* pshufb */
+ case 0x0f3800:
+ /* phaddw */
+ case 0x0f3801:
+ /* phaddd */
+ case 0x0f3802:
+ /* phaddsw */
+ case 0x0f3803:
+ /* pmaddubsw */
+ case 0x0f3804:
+ /* phsubw */
+ case 0x0f3805:
+ /* phsubd */
+ case 0x0f3806:
+ /* phaddsw */
+ case 0x0f3807:
+ /* psignb */
+ case 0x0f3808:
+ /* psignw */
+ case 0x0f3809:
+ /* psignd */
+ case 0x0f380a:
+ /* pmulhrsw */
+ case 0x0f380b:
+ /* pabsb */
+ case 0x0f381c:
+ /* pabsw */
+ case 0x0f381d:
+ /* pabsd */
+ case 0x0f381e:
+ /* packusdw */
+ case 0x0f382b:
+ /* pmovzxbw */
+ case 0x0f3830:
+ /* pmovzxbd */
+ case 0x0f3831:
+ /* pmovzxbq */
+ case 0x0f3832:
+ /* pmovzxwd */
+ case 0x0f3833:
+ /* pmovzxwq */
+ case 0x0f3834:
+ /* pmovzxdq */
+ case 0x0f3835:
+ /* pcmpgtq */
+ case 0x0f3837:
+ /* pminsb */
+ case 0x0f3838:
+ /* pminsd */
+ case 0x0f3839:
+ /* pminuw */
+ case 0x0f383a:
+ /* pminud */
+ case 0x0f383b:
+ /* pmaxsb */
+ case 0x0f383c:
+ /* pmaxsd */
+ case 0x0f383d:
+ /* pmaxuw */
+ case 0x0f383e:
+ /* pmaxud */
+ case 0x0f383f:
+ /* pmulld */
+ case 0x0f3840:
+ /* phminposuw */
+ case 0x0f3841:
+ /* palignr */
+ case 0x0f3a0f:
+ /* punpcklbw */
+ case 0x0f60:
+ /* punpcklwd */
+ case 0x0f61:
+ /* punpckldq */
+ case 0x0f62:
+ /* packsswb */
+ case 0x0f63:
+ /* pcmpgtb */
+ case 0x0f64:
+ /* pcmpgtw */
+ case 0x0f65:
+ /* pcmpgtl */
+ case 0x0f66:
+ /* packuswb */
+ case 0x0f67:
+ /* punpckhbw */
+ case 0x0f68:
+ /* punpckhwd */
+ case 0x0f69:
+ /* punpckhdq */
+ case 0x0f6a:
+ /* packssdw */
+ case 0x0f6b:
+ /* movd */
+ case 0x0f6e:
+ /* movq */
+ case 0x0f6f:
+ /* pshufw */
+ case 0x0f70:
+ /* pcmpeqb */
+ case 0x0f74:
+ /* pcmpeqw */
+ case 0x0f75:
+ /* pcmpeql */
+ case 0x0f76:
+ /* pinsrw */
+ case 0x0fc4:
+ /* psrlw */
+ case 0x0fd1:
+ /* psrld */
+ case 0x0fd2:
+ /* psrlq */
+ case 0x0fd3:
+ /* paddq */
+ case 0x0fd4:
+ /* pmullw */
+ case 0x0fd5:
+ /* movdq2q */
+ case 0xf20fd6:
+ /* psubusb */
+ case 0x0fd8:
+ /* psubusw */
+ case 0x0fd9:
+ /* pminub */
+ case 0x0fda:
+ /* pand */
+ case 0x0fdb:
+ /* paddusb */
+ case 0x0fdc:
+ /* paddusw */
+ case 0x0fdd:
+ /* pmaxub */
+ case 0x0fde:
+ /* pandn */
+ case 0x0fdf:
+ /* pavgb */
+ case 0x0fe0:
+ /* psraw */
+ case 0x0fe1:
+ /* psrad */
+ case 0x0fe2:
+ /* pavgw */
+ case 0x0fe3:
+ /* pmulhuw */
+ case 0x0fe4:
+ /* pmulhw */
+ case 0x0fe5:
+ /* psubsb */
+ case 0x0fe8:
+ /* psubsw */
+ case 0x0fe9:
+ /* pminsw */
+ case 0x0fea:
+ /* por */
+ case 0x0feb:
+ /* paddsb */
+ case 0x0fec:
+ /* paddsw */
+ case 0x0fed:
+ /* pmaxsw */
+ case 0x0fee:
+ /* pxor */
+ case 0x0fef:
+ /* psllw */
+ case 0x0ff1:
+ /* pslld */
+ case 0x0ff2:
+ /* psllq */
+ case 0x0ff3:
+ /* pmuludq */
+ case 0x0ff4:
+ /* pmaddwd */
+ case 0x0ff5:
+ /* psadbw */
+ case 0x0ff6:
+ /* psubb */
+ case 0x0ff8:
+ /* psubw */
+ case 0x0ff9:
+ /* psubl */
+ case 0x0ffa:
+ /* psubq */
+ case 0x0ffb:
+ /* paddb */
+ case 0x0ffc:
+ /* paddw */
+ case 0x0ffd:
+ /* paddl */
+ case 0x0ffe:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.reg);
+ break;
+
+ /* psllw */
+ case 0x0f71:
+ /* pslld */
+ case 0x0f72:
+ /* psllq */
+ case 0x0f73:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.rm);
+ break;
+
+ /* psllw */
+ case 0x660f71:
+ /* pslld */
+ case 0x660f72:
+ /* psllq */
+ case 0x660f73:
+ if (i386_record_modrm (&ir))
+ return -1;
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ break;
+
+ /* movd */
+ case 0x0f7e:
+ /* movd */
+ case 0x660f7e:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ else
+ {
+ if (ir.dflag == 2)
+ ir.ot = OT_QUAD;
+ else
+ ir.ot = OT_LONG;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* movq */
+ case 0x0f7f:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ ir.ot = OT_QUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* popcnt */
+ case 0xf30fb8:
+ if (i386_record_modrm (&ir))
+ return -1;
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ /* movq */
+ case 0x660fd6:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM
(tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ ir.ot = OT_QUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* ptest */
+ case 0x660f3817:
+ /* ucomiss */
+ case 0x0f2e:
+ /* ucomisd */
+ case 0x660f2e:
+ /* comiss */
+ case 0x0f2f:
+ /* comisd */
+ case 0x660f2f:
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ /* maskmovq */
+ case 0x0ff7:
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_REDI_REGNUM],
+ &tmpulongest);
+ if (record_arch_list_add_mem (tmpulongest, 64))
+ return -1;
+ break;
+
+ /* maskmovdqu */
+ case 0x660ff7:
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_REDI_REGNUM],
+ &tmpulongest);
+ if (record_arch_list_add_mem (tmpulongest, 128))
+ return -1;
+ break;
+
+ default:
+ goto no_support;
+ break;
+ }
+ break;
default:
- if (opcode > 0xff)
- ir.addr -= 2;
- else
- ir.addr -= 1;
goto no_support;
break;
}
@@ -5370,8 +6554,9 @@ reswitch:
no_support:
printf_unfiltered (_("Process record doesn't support instruction 0x%02x "
- "at address %s.\n"),
- (unsigned int) (opcode), paddress (gdbarch, ir.addr));
+ "at address %s.\n"),
+ (unsigned int) (opcode),
+ paddress (gdbarch, ir.orig_addr));
return -1;
}
[-- Attachment #2: prec-x86-sse.txt --]
[-- Type: text/plain, Size: 32789 bytes --]
---
i386-tdep.c | 1217 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 1201 insertions(+), 16 deletions(-)
--- a/i386-tdep.c
+++ b/i386-tdep.c
@@ -2848,6 +2848,7 @@ enum
OT_WORD,
OT_LONG,
OT_QUAD,
+ OT_DQUAD,
};
/* i386 arith/logic operations */
@@ -3217,6 +3218,7 @@ i386_process_record (struct gdbarch *gdb
int rex = 0;
uint8_t rex_w = -1;
uint8_t rex_r = 0;
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
memset (&ir, 0, sizeof (struct i386_record_s));
ir.regcache = regcache;
@@ -3226,7 +3228,7 @@ i386_process_record (struct gdbarch *gdb
ir.dflag = 1;
ir.override = -1;
ir.popl_esp_hack = 0;
- ir.regmap = gdbarch_tdep (gdbarch)->record_regmap;
+ ir.regmap = tdep->record_regmap;
ir.gdbarch = gdbarch;
if (record_debug > 1)
@@ -3344,7 +3346,7 @@ reswitch:
return -1;
}
ir.addr++;
- opcode = (uint16_t) tmpu8 | 0x0f00;
+ opcode = (uint32_t) tmpu8 | 0x0f00;
goto reswitch;
break;
@@ -4868,7 +4870,7 @@ reswitch:
}
ir.addr++;
if (tmpu8 != 0x80
- || gdbarch_tdep (gdbarch)->i386_intx80_record == NULL)
+ || tdep->i386_intx80_record == NULL)
{
printf_unfiltered (_("Process record doesn't support "
"instruction int 0x%02x.\n"),
@@ -4876,7 +4878,7 @@ reswitch:
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_intx80_record (ir.regcache);
+ ret = tdep->i386_intx80_record (ir.regcache);
if (ret)
return ret;
}
@@ -4973,14 +4975,14 @@ reswitch:
ir.addr -= 2;
goto no_support;
}
- if (gdbarch_tdep (gdbarch)->i386_sysenter_record == NULL)
+ if (tdep->i386_sysenter_record == NULL)
{
printf_unfiltered (_("Process record doesn't support "
"instruction sysenter.\n"));
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_sysenter_record (ir.regcache);
+ ret = tdep->i386_sysenter_record (ir.regcache);
if (ret)
return ret;
}
@@ -4998,14 +5000,14 @@ reswitch:
case 0x0f05:
{
int ret;
- if (gdbarch_tdep (gdbarch)->i386_syscall_record == NULL)
+ if (tdep->i386_syscall_record == NULL)
{
printf_unfiltered (_("Process record doesn't support "
"instruction syscall.\n"));
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_syscall_record (ir.regcache);
+ ret = tdep->i386_syscall_record (ir.regcache);
if (ret)
return ret;
}
@@ -5349,14 +5351,1196 @@ reswitch:
I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
- /* MMX/SSE/SSE2/PNI support */
- /* XXX */
+ /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
+ /* 3DNow! prefetch */
+ case 0x0f0d:
+ break;
+
+ /* 3DNow! femms */
+ case 0x0f0e:
+ /* emms */
+ case 0x0f77:
+ if (i386_fpc_regnum_p (gdbarch, I387_FTAG_REGNUM(tdep)))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache, I387_FTAG_REGNUM(tdep));
+ break;
+
+ /* 3DNow! data */
+ case 0x0f0f:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (target_read_memory (ir.addr, &tmpu8, 1))
+ {
+ if (record_debug)
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr %s len = 1.\n"),
+ paddress (gdbarch, ir.addr));
+ return -1;
+ }
+ ir.addr++;
+ switch (tmpu8)
+ {
+ /* 3DNow! pi2fw */
+ case 0x0c:
+ /* 3DNow! pi2fd */
+ case 0x0d:
+ /* 3DNow! pf2iw */
+ case 0x1c:
+ /* 3DNow! pf2id */
+ case 0x1d:
+ /* 3DNow! pfnacc */
+ case 0x8a:
+ /* 3DNow! pfpnacc */
+ case 0x8e:
+ /* 3DNow! pfcmpge */
+ case 0x90:
+ /* 3DNow! pfmin */
+ case 0x94:
+ /* 3DNow! pfrcp */
+ case 0x96:
+ /* 3DNow! pfrsqrt */
+ case 0x97:
+ /* 3DNow! pfsub */
+ case 0x9a:
+ /* 3DNow! pfadd */
+ case 0x9e:
+ /* 3DNow! pfcmpgt */
+ case 0xa0:
+ /* 3DNow! pfmax */
+ case 0xa4:
+ /* 3DNow! pfrcpit1 */
+ case 0xa6:
+ /* 3DNow! pfrsqit1 */
+ case 0xa7:
+ /* 3DNow! pfsubr */
+ case 0xaa:
+ /* 3DNow! pfacc */
+ case 0xae:
+ /* 3DNow! pfcmpeq */
+ case 0xb0:
+ /* 3DNow! pfmul */
+ case 0xb4:
+ /* 3DNow! pfrcpit2 */
+ case 0xb6:
+ /* 3DNow! pmulhrw */
+ case 0xb7:
+ /* 3DNow! pswapd */
+ case 0xbb:
+ /* 3DNow! pavgusb */
+ case 0xbf:
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
+ goto no_support_3dnow_data;
+ record_arch_list_add_reg (ir.regcache, ir.reg);
+ break;
+
+ default:
+no_support_3dnow_data:
+ opcode = (opcode << 8) | tmpu8;
+ goto no_support;
+ break;
+ }
+ break;
+
+ /* rsm */
+ case 0x0faa:
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
+ break;
+
+ case 0x0fae:
+ if (i386_record_modrm (&ir))
+ return -1;
+ switch(ir.reg)
+ {
+ /* fxsave */
+ case 0:
+ {
+ uint64_t tmpu64;
+
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ if (i386_record_lea_modrm_addr (&ir, &tmpu64))
+ return -1;
+ if (record_arch_list_add_mem (tmpu64, 512))
+ return -1;
+ }
+ break;
+
+ /* fxrstor */
+ case 1:
+ {
+ int i;
+
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+
+ for (i = I387_MM0_REGNUM (tdep);
+ i386_mmx_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ for (i = I387_XMM0_REGNUM (tdep);
+ i386_sse_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ if (i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
+ record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
+
+ for (i = I387_ST0_REGNUM (tdep);
+ i386_fp_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ for (i = I387_FCTRL_REGNUM (tdep);
+ i386_fpc_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+ }
+ break;
+
+ /* ldmxcsr */
+ case 2:
+ if (!i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
+ break;
+
+ /* stmxcsr */
+ case 3:
+ ir.ot = OT_LONG;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ /* lfence */
+ case 5:
+ /* mfence */
+ case 6:
+ /* sfence clflush */
+ case 7:
+ break;
+
+ default:
+ opcode = (opcode << 8) | ir.modrm;
+ goto no_support;
+ break;
+ }
+ break;
+
+ /* movnti */
+ case 0x0fc3:
+ ir.ot = (ir.dflag == 2) ? OT_QUAD : OT_LONG;
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ goto no_support;
+ ir.reg |= rex_r;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ /* Add prefix to opcode. */
+ case 0x0f10:
+ case 0x0f11:
+ case 0x0f12:
+ case 0x0f13:
+ case 0x0f14:
+ case 0x0f16:
+ case 0x0f17:
+ case 0x0f28:
+ case 0x0f29:
+ case 0x0f2a:
+ case 0x0f2b:
+ case 0x0f2c:
+ case 0x0f2d:
+ case 0x0f2e:
+ case 0x0f2f:
+ case 0x0f38:
+ case 0x0f39:
+ case 0x0f3a:
+ case 0x0f50:
+ case 0x0f51:
+ case 0x0f52:
+ case 0x0f53:
+ case 0x0f54:
+ case 0x0f55:
+ case 0x0f56:
+ case 0x0f57:
+ case 0x0f58:
+ case 0x0f59:
+ case 0x0f5a:
+ case 0x0f5b:
+ case 0x0f5c:
+ case 0x0f5d:
+ case 0x0f5e:
+ case 0x0f5f:
+ case 0x0f60:
+ case 0x0f61:
+ case 0x0f62:
+ case 0x0f63:
+ case 0x0f64:
+ case 0x0f65:
+ case 0x0f66:
+ case 0x0f67:
+ case 0x0f68:
+ case 0x0f69:
+ case 0x0f6a:
+ case 0x0f6b:
+ case 0x0f6c:
+ case 0x0f6d:
+ case 0x0f6e:
+ case 0x0f6f:
+ case 0x0f70:
+ case 0x0f71:
+ case 0x0f72:
+ case 0x0f73:
+ case 0x0f74:
+ case 0x0f75:
+ case 0x0f76:
+ case 0x0f7c:
+ case 0x0f7d:
+ case 0x0f7e:
+ case 0x0f7f:
+ case 0x0fb8:
+ case 0x0fc2:
+ case 0x0fc4:
+ case 0x0fc5:
+ case 0x0fc6:
+ case 0x0fd0:
+ case 0x0fd1:
+ case 0x0fd2:
+ case 0x0fd3:
+ case 0x0fd4:
+ case 0x0fd5:
+ case 0x0fd6:
+ case 0x0fd7:
+ case 0x0fd8:
+ case 0x0fd9:
+ case 0x0fda:
+ case 0x0fdb:
+ case 0x0fdc:
+ case 0x0fdd:
+ case 0x0fde:
+ case 0x0fdf:
+ case 0x0fe0:
+ case 0x0fe1:
+ case 0x0fe2:
+ case 0x0fe3:
+ case 0x0fe4:
+ case 0x0fe5:
+ case 0x0fe6:
+ case 0x0fe7:
+ case 0x0fe8:
+ case 0x0fe9:
+ case 0x0fea:
+ case 0x0feb:
+ case 0x0fec:
+ case 0x0fed:
+ case 0x0fee:
+ case 0x0fef:
+ case 0x0ff0:
+ case 0x0ff1:
+ case 0x0ff2:
+ case 0x0ff3:
+ case 0x0ff4:
+ case 0x0ff5:
+ case 0x0ff6:
+ case 0x0ff7:
+ case 0x0ff8:
+ case 0x0ff9:
+ case 0x0ffa:
+ case 0x0ffb:
+ case 0x0ffc:
+ case 0x0ffd:
+ case 0x0ffe:
+ switch (prefixes)
+ {
+ case PREFIX_REPNZ:
+ opcode |= 0xf20000;
+ break;
+ case PREFIX_DATA:
+ opcode |= 0x660000;
+ break;
+ case PREFIX_REPZ:
+ opcode |= 0xf30000;
+ break;
+ }
+reswitch_prefix_add:
+ switch (opcode)
+ {
+ case 0x0f38:
+ case 0x660f38:
+ case 0xf20f38:
+ case 0x0f3a:
+ case 0x660f3a:
+ if (target_read_memory (ir.addr, &tmpu8, 1))
+ {
+ if (record_debug)
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr %s len = 1.\n"),
+ paddress (gdbarch, ir.addr));
+ return -1;
+ }
+ ir.addr++;
+ opcode = (uint32_t) tmpu8 | opcode << 4;
+ goto reswitch_prefix_add;
+ break;
+
+ /* movups */
+ case 0x0f10:
+ /* movupd */
+ case 0x660f10:
+ /* movss */
+ case 0xf30f10:
+ /* movsd */
+ case 0xf20f10:
+ /* movlps */
+ case 0x0f12:
+ /* movlpd */
+ case 0x660f12:
+ /* movsldup */
+ case 0xf30f12:
+ /* movddup */
+ case 0xf20f12:
+ /* unpcklps */
+ case 0x0f14:
+ /* unpcklpd */
+ case 0x660f14:
+ /* unpckhps */
+ case 0x0f15:
+ /* unpckhpd */
+ case 0x660f15:
+ /* movhps */
+ case 0x0f16:
+ /* movhpd */
+ case 0x660f16:
+ /* movshdup */
+ case 0xf30f16:
+ /* movaps */
+ case 0x0f28:
+ /* movapd */
+ case 0x660f28:
+ /* cvtpi2ps */
+ case 0x0f2a:
+ /* cvtpi2pd */
+ case 0x660f2a:
+ /* cvtsi2ss */
+ case 0xf30f2a:
+ /* cvtsi2sd */
+ case 0xf20f2a:
+ /* cvttps2pi */
+ case 0x0f2c:
+ /* cvttpd2pi */
+ case 0x660f2c:
+ /* cvtps2pi */
+ case 0x0f2d:
+ /* cvtpd2pi */
+ case 0x660f2d:
+ /* pshufb */
+ case 0x660f3800:
+ /* phaddw */
+ case 0x660f3801:
+ /* phaddd */
+ case 0x660f3802:
+ /* phaddsw */
+ case 0x660f3803:
+ /* pmaddubsw */
+ case 0x660f3804:
+ /* phsubw */
+ case 0x660f3805:
+ /* phsubd */
+ case 0x660f3806:
+ /* phaddsw */
+ case 0x660f3807:
+ /* psignb */
+ case 0x660f3808:
+ /* psignw */
+ case 0x660f3809:
+ /* psignd */
+ case 0x660f380a:
+ /* pmulhrsw */
+ case 0x660f380b:
+ /* pblendvb */
+ case 0x660f3810:
+ /* blendvps */
+ case 0x660f3814:
+ /* blendvpd */
+ case 0x660f3815:
+ /* pabsb */
+ case 0x660f381c:
+ /* pabsw */
+ case 0x660f381d:
+ /* pabsd */
+ case 0x660f381e:
+ /* pmovsxbw */
+ case 0x660f3820:
+ /* pmovsxbd */
+ case 0x660f3821:
+ /* pmovsxbq */
+ case 0x660f3822:
+ /* pmovsxwd */
+ case 0x660f3823:
+ /* pmovsxwq */
+ case 0x660f3824:
+ /* pmovsxdq */
+ case 0x660f3825:
+ /* pmuldq */
+ case 0x660f3828:
+ /* pcmpeqq */
+ case 0x660f3829:
+ /* movntdqa */
+ case 0x660f382a:
+ /* roundps */
+ case 0x660f3a08:
+ /* roundpd */
+ case 0x660f3a09:
+ /* roundss */
+ case 0x660f3a0a:
+ /* roundsd */
+ case 0x660f3a0b:
+ /* blendps */
+ case 0x660f3a0c:
+ /* blendpd */
+ case 0x660f3a0d:
+ /* pblendw */
+ case 0x660f3a0e:
+ /* palignr */
+ case 0x660f3a0f:
+ /* pinsrb */
+ case 0x660f3a20:
+ /* insertps */
+ case 0x660f3a21:
+ /* pinsrd pinsrq */
+ case 0x660f3a22:
+ /* dpps */
+ case 0x660f3a40:
+ /* dppd */
+ case 0x660f3a41:
+ /* mpsadbw */
+ case 0x660f3a42:
+ /* pcmpestrm */
+ case 0x660f3a60:
+ /* pcmpestri */
+ case 0x660f3a61:
+ /* pcmpistrm */
+ case 0x660f3a62:
+ /* pcmpistri */
+ case 0x660f3a63:
+ /* sqrtps */
+ case 0x0f51:
+ /* sqrtpd */
+ case 0x660f51:
+ /* sqrtsd */
+ case 0xf20f51:
+ /* sqrtss */
+ case 0xf30f51:
+ /* rsqrtps */
+ case 0x0f52:
+ /* rsqrtss */
+ case 0xf30f52:
+ /* rcpps */
+ case 0x0f53:
+ /* rcpss */
+ case 0xf30f53:
+ /* andps */
+ case 0x0f54:
+ /* andpd */
+ case 0x660f54:
+ /* andnps */
+ case 0x0f55:
+ /* andnpd */
+ case 0x660f55:
+ /* orps */
+ case 0x0f56:
+ /* orpd */
+ case 0x660f56:
+ /* xorps */
+ case 0x0f57:
+ /* xorpd */
+ case 0x660f57:
+ /* addps */
+ case 0x0f58:
+ /* addpd */
+ case 0x660f58:
+ /* addsd */
+ case 0xf20f58:
+ /* addss */
+ case 0xf30f58:
+ /* mulps */
+ case 0x0f59:
+ /* mulpd */
+ case 0x660f59:
+ /* mulsd */
+ case 0xf20f59:
+ /* mulss */
+ case 0xf30f59:
+ /* cvtps2pd */
+ case 0x0f5a:
+ /* cvtpd2ps */
+ case 0x660f5a:
+ /* cvtsd2ss */
+ case 0xf20f5a:
+ /* cvtss2sd */
+ case 0xf30f5a:
+ /* cvtdq2ps */
+ case 0x0f5b:
+ /* cvtps2dq */
+ case 0x660f5b:
+ /* cvttps2dq */
+ case 0xf30f5b:
+ /* subps */
+ case 0x0f5c:
+ /* subpd */
+ case 0x660f5c:
+ /* subsd */
+ case 0xf20f5c:
+ /* subss */
+ case 0xf30f5c:
+ /* minps */
+ case 0x0f5d:
+ /* minpd */
+ case 0x660f5d:
+ /* minsd */
+ case 0xf20f5d:
+ /* minss */
+ case 0xf30f5d:
+ /* divps */
+ case 0x0f5e:
+ /* divpd */
+ case 0x660f5e:
+ /* divsd */
+ case 0xf20f5e:
+ /* divss */
+ case 0xf30f5e:
+ /* maxps */
+ case 0x0f5f:
+ /* maxpd */
+ case 0x660f5f:
+ /* maxsd */
+ case 0xf20f5f:
+ /* maxss */
+ case 0xf30f5f:
+ /* punpcklbw */
+ case 0x660f60:
+ /* punpcklwd */
+ case 0x660f61:
+ /* punpckldq */
+ case 0x660f62:
+ /* packsswb */
+ case 0x660f63:
+ /* pcmpgtb */
+ case 0x660f64:
+ /* pcmpgtw */
+ case 0x660f65:
+ /* pcmpgtl */
+ case 0x660f66:
+ /* packuswb */
+ case 0x660f67:
+ /* punpckhbw */
+ case 0x660f68:
+ /* punpckhwd */
+ case 0x660f69:
+ /* punpckhdq */
+ case 0x660f6a:
+ /* packssdw */
+ case 0x660f6b:
+ /* punpcklqdq */
+ case 0x660f6c:
+ /* punpckhqdq */
+ case 0x660f6d:
+ /* movd */
+ case 0x660f6e:
+ /* movdqa */
+ case 0x660f6f:
+ /* movdqu */
+ case 0xf30f6f:
+ /* pshufd */
+ case 0x660f70:
+ /* pshuflw */
+ case 0xf20f70:
+ /* pshufhw */
+ case 0xf30f70:
+ /* pcmpeqb */
+ case 0x660f74:
+ /* pcmpeqw */
+ case 0x660f75:
+ /* pcmpeql */
+ case 0x660f76:
+ /* haddpd */
+ case 0x660f7c:
+ /* haddps */
+ case 0xf20f7c:
+ /* hsubpd */
+ case 0x660f7d:
+ /* hsubps */
+ case 0xf20f7d:
+ /* movq */
+ case 0xf30f7e:
+ /* cmpps */
+ case 0x0fc2:
+ /* cmppd */
+ case 0x660fc2:
+ /* cmpsd */
+ case 0xf20fc2:
+ /* cmpss */
+ case 0xf30fc2:
+ /* pinsrw */
+ case 0x660fc4:
+ /* shufps */
+ case 0x0fc6:
+ /* shufpd */
+ case 0x660fc6:
+ /* addsubpd */
+ case 0x660fd0:
+ /* addsubps */
+ case 0xf20fd0:
+ /* psrlw */
+ case 0x660fd1:
+ /* psrld */
+ case 0x660fd2:
+ /* psrlq */
+ case 0x660fd3:
+ /* paddq */
+ case 0x660fd4:
+ /* pmullw */
+ case 0x660fd5:
+ /* movq2dq */
+ case 0xf30fd6:
+ /* psubusb */
+ case 0x660fd8:
+ /* psubusw */
+ case 0x660fd9:
+ /* pminub */
+ case 0x660fda:
+ /* pand */
+ case 0x660fdb:
+ /* paddusb */
+ case 0x660fdc:
+ /* paddusw */
+ case 0x660fdd:
+ /* pmaxub */
+ case 0x660fde:
+ /* pandn */
+ case 0x660fdf:
+ /* pavgb */
+ case 0x660fe0:
+ /* psraw */
+ case 0x660fe1:
+ /* psrad */
+ case 0x660fe2:
+ /* pavgw */
+ case 0x660fe3:
+ /* pmulhuw */
+ case 0x660fe4:
+ /* pmulhw */
+ case 0x660fe5:
+ /* cvttpd2dq */
+ case 0x660fe6:
+ /* cvtpd2dq */
+ case 0xf20fe6:
+ /* cvtdq2pd */
+ case 0xf30fe6:
+ /* psubsb */
+ case 0x660fe8:
+ /* psubsw */
+ case 0x660fe9:
+ /* pminsw */
+ case 0x660fea:
+ /* por */
+ case 0x660feb:
+ /* paddsb */
+ case 0x660fec:
+ /* paddsw */
+ case 0x660fed:
+ /* pmaxsw */
+ case 0x660fee:
+ /* pxor */
+ case 0x660fef:
+ /* lddqu */
+ case 0x660ff0:
+ /* psllw */
+ case 0x660ff1:
+ /* pslld */
+ case 0x660ff2:
+ /* psllq */
+ case 0x660ff3:
+ /* pmuludq */
+ case 0x660ff4:
+ /* pmaddwd */
+ case 0x660ff5:
+ /* psadbw */
+ case 0x660ff6:
+ /* psubb */
+ case 0x660ff8:
+ /* psubw */
+ case 0x660ff9:
+ /* psubl */
+ case 0x660ffa:
+ /* psubq */
+ case 0x660ffb:
+ /* paddb */
+ case 0x660ffc:
+ /* paddw */
+ case 0x660ffd:
+ /* paddl */
+ case 0x660ffe:
+ if (i386_record_modrm (&ir))
+ return -1;
+ ir.reg |= rex_r;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.reg))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.reg);
+ if ((opcode & 0xfffffffc) == 0x660f3a60)
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ /* movups */
+ case 0x0f11:
+ /* movupd */
+ case 0x660f11:
+ /* movss */
+ case 0xf30f11:
+ /* movsd */
+ case 0xf20f11:
+ /* movlps */
+ case 0x0f13:
+ /* movlpd */
+ case 0x660f13:
+ /* movhps */
+ case 0x0f17:
+ /* movhpd */
+ case 0x660f17:
+ /* movaps */
+ case 0x0f29:
+ /* movapd */
+ case 0x660f29:
+ /* pextrb */
+ case 0x660f3a14:
+ /* pextrw */
+ case 0x660f3a15:
+ /* pextrd pextrq */
+ case 0x660f3a16:
+ /* extractps */
+ case 0x660f3a17:
+ /* movdqa */
+ case 0x660f7f:
+ /* movdqu */
+ case 0xf30f7f:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ if (opcode == 0x0f13 || opcode == 0x660f13
+ || opcode == 0x0f17 || opcode == 0x660f17)
+ goto no_support;
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ switch (opcode)
+ {
+ case 0x660f3a14:
+ ir.ot = OT_BYTE;
+ break;
+ case 0x660f3a15:
+ ir.ot = OT_WORD;
+ break;
+ case 0x660f3a16:
+ ir.ot = OT_LONG;
+ break;
+ case 0x660f3a17:
+ ir.ot = OT_QUAD;
+ break;
+ default:
+ ir.ot = OT_DQUAD;
+ break;
+ }
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* movntps */
+ case 0x0f2b:
+ /* movntpd */
+ case 0x660f2b:
+ /* movntq */
+ case 0x0fe7:
+ /* movntdq */
+ case 0x660fe7:
+ if (ir.mod == 3)
+ goto no_support;
+ if (opcode == 0x0fe7)
+ ir.ot = OT_QUAD;
+ else
+ ir.ot = OT_DQUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ /* cvttss2si */
+ case 0xf30f2c:
+ /* cvttsd2si */
+ case 0xf20f2c:
+ /* cvtss2si */
+ case 0xf30f2d:
+ /* cvtsd2si */
+ case 0xf20f2d:
+ /* crc32 */
+ case 0xf20f38f0:
+ /* crc32 */
+ case 0xf20f38f1:
+ /* movmskps */
+ case 0x0f50:
+ /* movmskpd */
+ case 0x660f50:
+ /* pextrw */
+ case 0x0fc5:
+ /* pextrw */
+ case 0x660fc5:
+ /* pmovmskb */
+ case 0x0fd7:
+ /* pmovmskb */
+ case 0x660fd7:
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
+ break;
+
+ /* pshufb */
+ case 0x0f3800:
+ /* phaddw */
+ case 0x0f3801:
+ /* phaddd */
+ case 0x0f3802:
+ /* phaddsw */
+ case 0x0f3803:
+ /* pmaddubsw */
+ case 0x0f3804:
+ /* phsubw */
+ case 0x0f3805:
+ /* phsubd */
+ case 0x0f3806:
+ /* phaddsw */
+ case 0x0f3807:
+ /* psignb */
+ case 0x0f3808:
+ /* psignw */
+ case 0x0f3809:
+ /* psignd */
+ case 0x0f380a:
+ /* pmulhrsw */
+ case 0x0f380b:
+ /* pabsb */
+ case 0x0f381c:
+ /* pabsw */
+ case 0x0f381d:
+ /* pabsd */
+ case 0x0f381e:
+ /* packusdw */
+ case 0x0f382b:
+ /* pmovzxbw */
+ case 0x0f3830:
+ /* pmovzxbd */
+ case 0x0f3831:
+ /* pmovzxbq */
+ case 0x0f3832:
+ /* pmovzxwd */
+ case 0x0f3833:
+ /* pmovzxwq */
+ case 0x0f3834:
+ /* pmovzxdq */
+ case 0x0f3835:
+ /* pcmpgtq */
+ case 0x0f3837:
+ /* pminsb */
+ case 0x0f3838:
+ /* pminsd */
+ case 0x0f3839:
+ /* pminuw */
+ case 0x0f383a:
+ /* pminud */
+ case 0x0f383b:
+ /* pmaxsb */
+ case 0x0f383c:
+ /* pmaxsd */
+ case 0x0f383d:
+ /* pmaxuw */
+ case 0x0f383e:
+ /* pmaxud */
+ case 0x0f383f:
+ /* pmulld */
+ case 0x0f3840:
+ /* phminposuw */
+ case 0x0f3841:
+ /* palignr */
+ case 0x0f3a0f:
+ /* punpcklbw */
+ case 0x0f60:
+ /* punpcklwd */
+ case 0x0f61:
+ /* punpckldq */
+ case 0x0f62:
+ /* packsswb */
+ case 0x0f63:
+ /* pcmpgtb */
+ case 0x0f64:
+ /* pcmpgtw */
+ case 0x0f65:
+ /* pcmpgtl */
+ case 0x0f66:
+ /* packuswb */
+ case 0x0f67:
+ /* punpckhbw */
+ case 0x0f68:
+ /* punpckhwd */
+ case 0x0f69:
+ /* punpckhdq */
+ case 0x0f6a:
+ /* packssdw */
+ case 0x0f6b:
+ /* movd */
+ case 0x0f6e:
+ /* movq */
+ case 0x0f6f:
+ /* pshufw */
+ case 0x0f70:
+ /* pcmpeqb */
+ case 0x0f74:
+ /* pcmpeqw */
+ case 0x0f75:
+ /* pcmpeql */
+ case 0x0f76:
+ /* pinsrw */
+ case 0x0fc4:
+ /* psrlw */
+ case 0x0fd1:
+ /* psrld */
+ case 0x0fd2:
+ /* psrlq */
+ case 0x0fd3:
+ /* paddq */
+ case 0x0fd4:
+ /* pmullw */
+ case 0x0fd5:
+ /* movdq2q */
+ case 0xf20fd6:
+ /* psubusb */
+ case 0x0fd8:
+ /* psubusw */
+ case 0x0fd9:
+ /* pminub */
+ case 0x0fda:
+ /* pand */
+ case 0x0fdb:
+ /* paddusb */
+ case 0x0fdc:
+ /* paddusw */
+ case 0x0fdd:
+ /* pmaxub */
+ case 0x0fde:
+ /* pandn */
+ case 0x0fdf:
+ /* pavgb */
+ case 0x0fe0:
+ /* psraw */
+ case 0x0fe1:
+ /* psrad */
+ case 0x0fe2:
+ /* pavgw */
+ case 0x0fe3:
+ /* pmulhuw */
+ case 0x0fe4:
+ /* pmulhw */
+ case 0x0fe5:
+ /* psubsb */
+ case 0x0fe8:
+ /* psubsw */
+ case 0x0fe9:
+ /* pminsw */
+ case 0x0fea:
+ /* por */
+ case 0x0feb:
+ /* paddsb */
+ case 0x0fec:
+ /* paddsw */
+ case 0x0fed:
+ /* pmaxsw */
+ case 0x0fee:
+ /* pxor */
+ case 0x0fef:
+ /* psllw */
+ case 0x0ff1:
+ /* pslld */
+ case 0x0ff2:
+ /* psllq */
+ case 0x0ff3:
+ /* pmuludq */
+ case 0x0ff4:
+ /* pmaddwd */
+ case 0x0ff5:
+ /* psadbw */
+ case 0x0ff6:
+ /* psubb */
+ case 0x0ff8:
+ /* psubw */
+ case 0x0ff9:
+ /* psubl */
+ case 0x0ffa:
+ /* psubq */
+ case 0x0ffb:
+ /* paddb */
+ case 0x0ffc:
+ /* paddw */
+ case 0x0ffd:
+ /* paddl */
+ case 0x0ffe:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.reg);
+ break;
+
+ /* psllw */
+ case 0x0f71:
+ /* pslld */
+ case 0x0f72:
+ /* psllq */
+ case 0x0f73:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.rm);
+ break;
+
+ /* psllw */
+ case 0x660f71:
+ /* pslld */
+ case 0x660f72:
+ /* psllq */
+ case 0x660f73:
+ if (i386_record_modrm (&ir))
+ return -1;
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ break;
+
+ /* movd */
+ case 0x0f7e:
+ /* movd */
+ case 0x660f7e:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ else
+ {
+ if (ir.dflag == 2)
+ ir.ot = OT_QUAD;
+ else
+ ir.ot = OT_LONG;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* movq */
+ case 0x0f7f:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ ir.ot = OT_QUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* popcnt */
+ case 0xf30fb8:
+ if (i386_record_modrm (&ir))
+ return -1;
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ /* movq */
+ case 0x660fd6:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ ir.ot = OT_QUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* ptest */
+ case 0x660f3817:
+ /* ucomiss */
+ case 0x0f2e:
+ /* ucomisd */
+ case 0x660f2e:
+ /* comiss */
+ case 0x0f2f:
+ /* comisd */
+ case 0x660f2f:
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ /* maskmovq */
+ case 0x0ff7:
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_REDI_REGNUM],
+ &tmpulongest);
+ if (record_arch_list_add_mem (tmpulongest, 64))
+ return -1;
+ break;
+
+ /* maskmovdqu */
+ case 0x660ff7:
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_REDI_REGNUM],
+ &tmpulongest);
+ if (record_arch_list_add_mem (tmpulongest, 128))
+ return -1;
+ break;
+
+ default:
+ goto no_support;
+ break;
+ }
+ break;
default:
- if (opcode > 0xff)
- ir.addr -= 2;
- else
- ir.addr -= 1;
goto no_support;
break;
}
@@ -5370,8 +6554,9 @@ reswitch:
no_support:
printf_unfiltered (_("Process record doesn't support instruction 0x%02x "
- "at address %s.\n"),
- (unsigned int) (opcode), paddress (gdbarch, ir.addr));
+ "at address %s.\n"),
+ (unsigned int) (opcode),
+ paddress (gdbarch, ir.orig_addr));
return -1;
}
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-07 15:00 [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support Hui Zhu
@ 2009-12-07 16:54 ` Michael Snyder
2009-12-07 17:16 ` Michael Snyder
2009-12-10 19:52 ` Michael Snyder
2 siblings, 0 replies; 39+ messages in thread
From: Michael Snyder @ 2009-12-07 16:54 UTC (permalink / raw)
To: Hui Zhu; +Cc: gdb-patches ml, Mark Kettenis
Hui Zhu wrote:
> Hi guys,
>
> This patch make prec support x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4.
> Please help me review it.
Hui, do you think we are ready to commit the 387 patch before this one?
> 2009-12-07 Hui Zhu <teawater@gmail.com>
>
> * i386-tdep.c (OT_DQUAD): New enum.
> (i386_process_record): Add code for MMX, 3DNow!, SSE, SSE2,
> SSE3, SSSE3 and SSE4.
>
> ---
> i386-tdep.c | 1217 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 1201 insertions(+), 16 deletions(-)
>
> --- a/i386-tdep.c
> +++ b/i386-tdep.c
> @@ -2848,6 +2848,7 @@ enum
> OT_WORD,
> OT_LONG,
> OT_QUAD,
> + OT_DQUAD,
> };
>
> /* i386 arith/logic operations */
> @@ -3217,6 +3218,7 @@ i386_process_record (struct gdbarch *gdb
> int rex = 0;
> uint8_t rex_w = -1;
> uint8_t rex_r = 0;
> + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
>
> memset (&ir, 0, sizeof (struct i386_record_s));
> ir.regcache = regcache;
> @@ -3226,7 +3228,7 @@ i386_process_record (struct gdbarch *gdb
> ir.dflag = 1;
> ir.override = -1;
> ir.popl_esp_hack = 0;
> - ir.regmap = gdbarch_tdep (gdbarch)->record_regmap;
> + ir.regmap = tdep->record_regmap;
> ir.gdbarch = gdbarch;
>
> if (record_debug > 1)
> @@ -3344,7 +3346,7 @@ reswitch:
> return -1;
> }
> ir.addr++;
> - opcode = (uint16_t) tmpu8 | 0x0f00;
> + opcode = (uint32_t) tmpu8 | 0x0f00;
> goto reswitch;
> break;
>
> @@ -4868,7 +4870,7 @@ reswitch:
> }
> ir.addr++;
> if (tmpu8 != 0x80
> - || gdbarch_tdep (gdbarch)->i386_intx80_record == NULL)
> + || tdep->i386_intx80_record == NULL)
> {
> printf_unfiltered (_("Process record doesn't support "
> "instruction int 0x%02x.\n"),
> @@ -4876,7 +4878,7 @@ reswitch:
> ir.addr -= 2;
> goto no_support;
> }
> - ret = gdbarch_tdep (gdbarch)->i386_intx80_record (ir.regcache);
> + ret = tdep->i386_intx80_record (ir.regcache);
> if (ret)
> return ret;
> }
> @@ -4973,14 +4975,14 @@ reswitch:
> ir.addr -= 2;
> goto no_support;
> }
> - if (gdbarch_tdep (gdbarch)->i386_sysenter_record == NULL)
> + if (tdep->i386_sysenter_record == NULL)
> {
> printf_unfiltered (_("Process record doesn't support "
> "instruction sysenter.\n"));
> ir.addr -= 2;
> goto no_support;
> }
> - ret = gdbarch_tdep (gdbarch)->i386_sysenter_record (ir.regcache);
> + ret = tdep->i386_sysenter_record (ir.regcache);
> if (ret)
> return ret;
> }
> @@ -4998,14 +5000,14 @@ reswitch:
> case 0x0f05:
> {
> int ret;
> - if (gdbarch_tdep (gdbarch)->i386_syscall_record == NULL)
> + if (tdep->i386_syscall_record == NULL)
> {
> printf_unfiltered (_("Process record doesn't support "
> "instruction syscall.\n"));
> ir.addr -= 2;
> goto no_support;
> }
> - ret = gdbarch_tdep (gdbarch)->i386_syscall_record (ir.regcache);
> + ret = tdep->i386_syscall_record (ir.regcache);
> if (ret)
> return ret;
> }
> @@ -5349,14 +5351,1196 @@ reswitch:
> I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> break;
>
> - /* MMX/SSE/SSE2/PNI support */
> - /* XXX */
> + /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
> + /* 3DNow! prefetch */
> + case 0x0f0d:
> + break;
> +
> + /* 3DNow! femms */
> + case 0x0f0e:
> + /* emms */
> + case 0x0f77:
> + if (i386_fpc_regnum_p (gdbarch, I387_FTAG_REGNUM(tdep)))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache, I387_FTAG_REGNUM(tdep));
> + break;
> +
> + /* 3DNow! data */
> + case 0x0f0f:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (target_read_memory (ir.addr, &tmpu8, 1))
> + {
> + if (record_debug)
> + printf_unfiltered (_("Process record: error reading memory at "
> + "addr %s len = 1.\n"),
> + paddress (gdbarch, ir.addr));
> + return -1;
> + }
> + ir.addr++;
> + switch (tmpu8)
> + {
> + /* 3DNow! pi2fw */
> + case 0x0c:
> + /* 3DNow! pi2fd */
> + case 0x0d:
> + /* 3DNow! pf2iw */
> + case 0x1c:
> + /* 3DNow! pf2id */
> + case 0x1d:
> + /* 3DNow! pfnacc */
> + case 0x8a:
> + /* 3DNow! pfpnacc */
> + case 0x8e:
> + /* 3DNow! pfcmpge */
> + case 0x90:
> + /* 3DNow! pfmin */
> + case 0x94:
> + /* 3DNow! pfrcp */
> + case 0x96:
> + /* 3DNow! pfrsqrt */
> + case 0x97:
> + /* 3DNow! pfsub */
> + case 0x9a:
> + /* 3DNow! pfadd */
> + case 0x9e:
> + /* 3DNow! pfcmpgt */
> + case 0xa0:
> + /* 3DNow! pfmax */
> + case 0xa4:
> + /* 3DNow! pfrcpit1 */
> + case 0xa6:
> + /* 3DNow! pfrsqit1 */
> + case 0xa7:
> + /* 3DNow! pfsubr */
> + case 0xaa:
> + /* 3DNow! pfacc */
> + case 0xae:
> + /* 3DNow! pfcmpeq */
> + case 0xb0:
> + /* 3DNow! pfmul */
> + case 0xb4:
> + /* 3DNow! pfrcpit2 */
> + case 0xb6:
> + /* 3DNow! pmulhrw */
> + case 0xb7:
> + /* 3DNow! pswapd */
> + case 0xbb:
> + /* 3DNow! pavgusb */
> + case 0xbf:
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
> + goto no_support_3dnow_data;
> + record_arch_list_add_reg (ir.regcache, ir.reg);
> + break;
> +
> + default:
> +no_support_3dnow_data:
> + opcode = (opcode << 8) | tmpu8;
> + goto no_support;
> + break;
> + }
> + break;
> +
> + /* rsm */
> + case 0x0faa:
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
> + break;
> +
> + case 0x0fae:
> + if (i386_record_modrm (&ir))
> + return -1;
> + switch(ir.reg)
> + {
> + /* fxsave */
> + case 0:
> + {
> + uint64_t tmpu64;
> +
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + if (i386_record_lea_modrm_addr (&ir, &tmpu64))
> + return -1;
> + if (record_arch_list_add_mem (tmpu64, 512))
> + return -1;
> + }
> + break;
> +
> + /* fxrstor */
> + case 1:
> + {
> + int i;
> +
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> +
> + for (i = I387_MM0_REGNUM (tdep);
> + i386_mmx_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> +
> + for (i = I387_XMM0_REGNUM (tdep);
> + i386_sse_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> +
> + if (i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
> + record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
> +
> + for (i = I387_ST0_REGNUM (tdep);
> + i386_fp_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> +
> + for (i = I387_FCTRL_REGNUM (tdep);
> + i386_fpc_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> + }
> + break;
> +
> + /* ldmxcsr */
> + case 2:
> + if (!i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
> + break;
> +
> + /* stmxcsr */
> + case 3:
> + ir.ot = OT_LONG;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + break;
> +
> + /* lfence */
> + case 5:
> + /* mfence */
> + case 6:
> + /* sfence clflush */
> + case 7:
> + break;
> +
> + default:
> + opcode = (opcode << 8) | ir.modrm;
> + goto no_support;
> + break;
> + }
> + break;
> +
> + /* movnti */
> + case 0x0fc3:
> + ir.ot = (ir.dflag == 2) ? OT_QUAD : OT_LONG;
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + goto no_support;
> + ir.reg |= rex_r;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + break;
> +
> + /* Add prefix to opcode. */
> + case 0x0f10:
> + case 0x0f11:
> + case 0x0f12:
> + case 0x0f13:
> + case 0x0f14:
> + case 0x0f16:
> + case 0x0f17:
> + case 0x0f28:
> + case 0x0f29:
> + case 0x0f2a:
> + case 0x0f2b:
> + case 0x0f2c:
> + case 0x0f2d:
> + case 0x0f2e:
> + case 0x0f2f:
> + case 0x0f38:
> + case 0x0f39:
> + case 0x0f3a:
> + case 0x0f50:
> + case 0x0f51:
> + case 0x0f52:
> + case 0x0f53:
> + case 0x0f54:
> + case 0x0f55:
> + case 0x0f56:
> + case 0x0f57:
> + case 0x0f58:
> + case 0x0f59:
> + case 0x0f5a:
> + case 0x0f5b:
> + case 0x0f5c:
> + case 0x0f5d:
> + case 0x0f5e:
> + case 0x0f5f:
> + case 0x0f60:
> + case 0x0f61:
> + case 0x0f62:
> + case 0x0f63:
> + case 0x0f64:
> + case 0x0f65:
> + case 0x0f66:
> + case 0x0f67:
> + case 0x0f68:
> + case 0x0f69:
> + case 0x0f6a:
> + case 0x0f6b:
> + case 0x0f6c:
> + case 0x0f6d:
> + case 0x0f6e:
> + case 0x0f6f:
> + case 0x0f70:
> + case 0x0f71:
> + case 0x0f72:
> + case 0x0f73:
> + case 0x0f74:
> + case 0x0f75:
> + case 0x0f76:
> + case 0x0f7c:
> + case 0x0f7d:
> + case 0x0f7e:
> + case 0x0f7f:
> + case 0x0fb8:
> + case 0x0fc2:
> + case 0x0fc4:
> + case 0x0fc5:
> + case 0x0fc6:
> + case 0x0fd0:
> + case 0x0fd1:
> + case 0x0fd2:
> + case 0x0fd3:
> + case 0x0fd4:
> + case 0x0fd5:
> + case 0x0fd6:
> + case 0x0fd7:
> + case 0x0fd8:
> + case 0x0fd9:
> + case 0x0fda:
> + case 0x0fdb:
> + case 0x0fdc:
> + case 0x0fdd:
> + case 0x0fde:
> + case 0x0fdf:
> + case 0x0fe0:
> + case 0x0fe1:
> + case 0x0fe2:
> + case 0x0fe3:
> + case 0x0fe4:
> + case 0x0fe5:
> + case 0x0fe6:
> + case 0x0fe7:
> + case 0x0fe8:
> + case 0x0fe9:
> + case 0x0fea:
> + case 0x0feb:
> + case 0x0fec:
> + case 0x0fed:
> + case 0x0fee:
> + case 0x0fef:
> + case 0x0ff0:
> + case 0x0ff1:
> + case 0x0ff2:
> + case 0x0ff3:
> + case 0x0ff4:
> + case 0x0ff5:
> + case 0x0ff6:
> + case 0x0ff7:
> + case 0x0ff8:
> + case 0x0ff9:
> + case 0x0ffa:
> + case 0x0ffb:
> + case 0x0ffc:
> + case 0x0ffd:
> + case 0x0ffe:
> + switch (prefixes)
> + {
> + case PREFIX_REPNZ:
> + opcode |= 0xf20000;
> + break;
> + case PREFIX_DATA:
> + opcode |= 0x660000;
> + break;
> + case PREFIX_REPZ:
> + opcode |= 0xf30000;
> + break;
> + }
> +reswitch_prefix_add:
> + switch (opcode)
> + {
> + case 0x0f38:
> + case 0x660f38:
> + case 0xf20f38:
> + case 0x0f3a:
> + case 0x660f3a:
> + if (target_read_memory (ir.addr, &tmpu8, 1))
> + {
> + if (record_debug)
> + printf_unfiltered (_("Process record: error reading memory at "
> + "addr %s len = 1.\n"),
> + paddress (gdbarch, ir.addr));
> + return -1;
> + }
> + ir.addr++;
> + opcode = (uint32_t) tmpu8 | opcode << 4;
> + goto reswitch_prefix_add;
> + break;
> +
> + /* movups */
> + case 0x0f10:
> + /* movupd */
> + case 0x660f10:
> + /* movss */
> + case 0xf30f10:
> + /* movsd */
> + case 0xf20f10:
> + /* movlps */
> + case 0x0f12:
> + /* movlpd */
> + case 0x660f12:
> + /* movsldup */
> + case 0xf30f12:
> + /* movddup */
> + case 0xf20f12:
> + /* unpcklps */
> + case 0x0f14:
> + /* unpcklpd */
> + case 0x660f14:
> + /* unpckhps */
> + case 0x0f15:
> + /* unpckhpd */
> + case 0x660f15:
> + /* movhps */
> + case 0x0f16:
> + /* movhpd */
> + case 0x660f16:
> + /* movshdup */
> + case 0xf30f16:
> + /* movaps */
> + case 0x0f28:
> + /* movapd */
> + case 0x660f28:
> + /* cvtpi2ps */
> + case 0x0f2a:
> + /* cvtpi2pd */
> + case 0x660f2a:
> + /* cvtsi2ss */
> + case 0xf30f2a:
> + /* cvtsi2sd */
> + case 0xf20f2a:
> + /* cvttps2pi */
> + case 0x0f2c:
> + /* cvttpd2pi */
> + case 0x660f2c:
> + /* cvtps2pi */
> + case 0x0f2d:
> + /* cvtpd2pi */
> + case 0x660f2d:
> + /* pshufb */
> + case 0x660f3800:
> + /* phaddw */
> + case 0x660f3801:
> + /* phaddd */
> + case 0x660f3802:
> + /* phaddsw */
> + case 0x660f3803:
> + /* pmaddubsw */
> + case 0x660f3804:
> + /* phsubw */
> + case 0x660f3805:
> + /* phsubd */
> + case 0x660f3806:
> + /* phaddsw */
> + case 0x660f3807:
> + /* psignb */
> + case 0x660f3808:
> + /* psignw */
> + case 0x660f3809:
> + /* psignd */
> + case 0x660f380a:
> + /* pmulhrsw */
> + case 0x660f380b:
> + /* pblendvb */
> + case 0x660f3810:
> + /* blendvps */
> + case 0x660f3814:
> + /* blendvpd */
> + case 0x660f3815:
> + /* pabsb */
> + case 0x660f381c:
> + /* pabsw */
> + case 0x660f381d:
> + /* pabsd */
> + case 0x660f381e:
> + /* pmovsxbw */
> + case 0x660f3820:
> + /* pmovsxbd */
> + case 0x660f3821:
> + /* pmovsxbq */
> + case 0x660f3822:
> + /* pmovsxwd */
> + case 0x660f3823:
> + /* pmovsxwq */
> + case 0x660f3824:
> + /* pmovsxdq */
> + case 0x660f3825:
> + /* pmuldq */
> + case 0x660f3828:
> + /* pcmpeqq */
> + case 0x660f3829:
> + /* movntdqa */
> + case 0x660f382a:
> + /* roundps */
> + case 0x660f3a08:
> + /* roundpd */
> + case 0x660f3a09:
> + /* roundss */
> + case 0x660f3a0a:
> + /* roundsd */
> + case 0x660f3a0b:
> + /* blendps */
> + case 0x660f3a0c:
> + /* blendpd */
> + case 0x660f3a0d:
> + /* pblendw */
> + case 0x660f3a0e:
> + /* palignr */
> + case 0x660f3a0f:
> + /* pinsrb */
> + case 0x660f3a20:
> + /* insertps */
> + case 0x660f3a21:
> + /* pinsrd pinsrq */
> + case 0x660f3a22:
> + /* dpps */
> + case 0x660f3a40:
> + /* dppd */
> + case 0x660f3a41:
> + /* mpsadbw */
> + case 0x660f3a42:
> + /* pcmpestrm */
> + case 0x660f3a60:
> + /* pcmpestri */
> + case 0x660f3a61:
> + /* pcmpistrm */
> + case 0x660f3a62:
> + /* pcmpistri */
> + case 0x660f3a63:
> + /* sqrtps */
> + case 0x0f51:
> + /* sqrtpd */
> + case 0x660f51:
> + /* sqrtsd */
> + case 0xf20f51:
> + /* sqrtss */
> + case 0xf30f51:
> + /* rsqrtps */
> + case 0x0f52:
> + /* rsqrtss */
> + case 0xf30f52:
> + /* rcpps */
> + case 0x0f53:
> + /* rcpss */
> + case 0xf30f53:
> + /* andps */
> + case 0x0f54:
> + /* andpd */
> + case 0x660f54:
> + /* andnps */
> + case 0x0f55:
> + /* andnpd */
> + case 0x660f55:
> + /* orps */
> + case 0x0f56:
> + /* orpd */
> + case 0x660f56:
> + /* xorps */
> + case 0x0f57:
> + /* xorpd */
> + case 0x660f57:
> + /* addps */
> + case 0x0f58:
> + /* addpd */
> + case 0x660f58:
> + /* addsd */
> + case 0xf20f58:
> + /* addss */
> + case 0xf30f58:
> + /* mulps */
> + case 0x0f59:
> + /* mulpd */
> + case 0x660f59:
> + /* mulsd */
> + case 0xf20f59:
> + /* mulss */
> + case 0xf30f59:
> + /* cvtps2pd */
> + case 0x0f5a:
> + /* cvtpd2ps */
> + case 0x660f5a:
> + /* cvtsd2ss */
> + case 0xf20f5a:
> + /* cvtss2sd */
> + case 0xf30f5a:
> + /* cvtdq2ps */
> + case 0x0f5b:
> + /* cvtps2dq */
> + case 0x660f5b:
> + /* cvttps2dq */
> + case 0xf30f5b:
> + /* subps */
> + case 0x0f5c:
> + /* subpd */
> + case 0x660f5c:
> + /* subsd */
> + case 0xf20f5c:
> + /* subss */
> + case 0xf30f5c:
> + /* minps */
> + case 0x0f5d:
> + /* minpd */
> + case 0x660f5d:
> + /* minsd */
> + case 0xf20f5d:
> + /* minss */
> + case 0xf30f5d:
> + /* divps */
> + case 0x0f5e:
> + /* divpd */
> + case 0x660f5e:
> + /* divsd */
> + case 0xf20f5e:
> + /* divss */
> + case 0xf30f5e:
> + /* maxps */
> + case 0x0f5f:
> + /* maxpd */
> + case 0x660f5f:
> + /* maxsd */
> + case 0xf20f5f:
> + /* maxss */
> + case 0xf30f5f:
> + /* punpcklbw */
> + case 0x660f60:
> + /* punpcklwd */
> + case 0x660f61:
> + /* punpckldq */
> + case 0x660f62:
> + /* packsswb */
> + case 0x660f63:
> + /* pcmpgtb */
> + case 0x660f64:
> + /* pcmpgtw */
> + case 0x660f65:
> + /* pcmpgtl */
> + case 0x660f66:
> + /* packuswb */
> + case 0x660f67:
> + /* punpckhbw */
> + case 0x660f68:
> + /* punpckhwd */
> + case 0x660f69:
> + /* punpckhdq */
> + case 0x660f6a:
> + /* packssdw */
> + case 0x660f6b:
> + /* punpcklqdq */
> + case 0x660f6c:
> + /* punpckhqdq */
> + case 0x660f6d:
> + /* movd */
> + case 0x660f6e:
> + /* movdqa */
> + case 0x660f6f:
> + /* movdqu */
> + case 0xf30f6f:
> + /* pshufd */
> + case 0x660f70:
> + /* pshuflw */
> + case 0xf20f70:
> + /* pshufhw */
> + case 0xf30f70:
> + /* pcmpeqb */
> + case 0x660f74:
> + /* pcmpeqw */
> + case 0x660f75:
> + /* pcmpeql */
> + case 0x660f76:
> + /* haddpd */
> + case 0x660f7c:
> + /* haddps */
> + case 0xf20f7c:
> + /* hsubpd */
> + case 0x660f7d:
> + /* hsubps */
> + case 0xf20f7d:
> + /* movq */
> + case 0xf30f7e:
> + /* cmpps */
> + case 0x0fc2:
> + /* cmppd */
> + case 0x660fc2:
> + /* cmpsd */
> + case 0xf20fc2:
> + /* cmpss */
> + case 0xf30fc2:
> + /* pinsrw */
> + case 0x660fc4:
> + /* shufps */
> + case 0x0fc6:
> + /* shufpd */
> + case 0x660fc6:
> + /* addsubpd */
> + case 0x660fd0:
> + /* addsubps */
> + case 0xf20fd0:
> + /* psrlw */
> + case 0x660fd1:
> + /* psrld */
> + case 0x660fd2:
> + /* psrlq */
> + case 0x660fd3:
> + /* paddq */
> + case 0x660fd4:
> + /* pmullw */
> + case 0x660fd5:
> + /* movq2dq */
> + case 0xf30fd6:
> + /* psubusb */
> + case 0x660fd8:
> + /* psubusw */
> + case 0x660fd9:
> + /* pminub */
> + case 0x660fda:
> + /* pand */
> + case 0x660fdb:
> + /* paddusb */
> + case 0x660fdc:
> + /* paddusw */
> + case 0x660fdd:
> + /* pmaxub */
> + case 0x660fde:
> + /* pandn */
> + case 0x660fdf:
> + /* pavgb */
> + case 0x660fe0:
> + /* psraw */
> + case 0x660fe1:
> + /* psrad */
> + case 0x660fe2:
> + /* pavgw */
> + case 0x660fe3:
> + /* pmulhuw */
> + case 0x660fe4:
> + /* pmulhw */
> + case 0x660fe5:
> + /* cvttpd2dq */
> + case 0x660fe6:
> + /* cvtpd2dq */
> + case 0xf20fe6:
> + /* cvtdq2pd */
> + case 0xf30fe6:
> + /* psubsb */
> + case 0x660fe8:
> + /* psubsw */
> + case 0x660fe9:
> + /* pminsw */
> + case 0x660fea:
> + /* por */
> + case 0x660feb:
> + /* paddsb */
> + case 0x660fec:
> + /* paddsw */
> + case 0x660fed:
> + /* pmaxsw */
> + case 0x660fee:
> + /* pxor */
> + case 0x660fef:
> + /* lddqu */
> + case 0x660ff0:
> + /* psllw */
> + case 0x660ff1:
> + /* pslld */
> + case 0x660ff2:
> + /* psllq */
> + case 0x660ff3:
> + /* pmuludq */
> + case 0x660ff4:
> + /* pmaddwd */
> + case 0x660ff5:
> + /* psadbw */
> + case 0x660ff6:
> + /* psubb */
> + case 0x660ff8:
> + /* psubw */
> + case 0x660ff9:
> + /* psubl */
> + case 0x660ffa:
> + /* psubq */
> + case 0x660ffb:
> + /* paddb */
> + case 0x660ffc:
> + /* paddw */
> + case 0x660ffd:
> + /* paddl */
> + case 0x660ffe:
> + if (i386_record_modrm (&ir))
> + return -1;
> + ir.reg |= rex_r;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.reg))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.reg);
> + if ((opcode & 0xfffffffc) == 0x660f3a60)
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + break;
> +
> + /* movups */
> + case 0x0f11:
> + /* movupd */
> + case 0x660f11:
> + /* movss */
> + case 0xf30f11:
> + /* movsd */
> + case 0xf20f11:
> + /* movlps */
> + case 0x0f13:
> + /* movlpd */
> + case 0x660f13:
> + /* movhps */
> + case 0x0f17:
> + /* movhpd */
> + case 0x660f17:
> + /* movaps */
> + case 0x0f29:
> + /* movapd */
> + case 0x660f29:
> + /* pextrb */
> + case 0x660f3a14:
> + /* pextrw */
> + case 0x660f3a15:
> + /* pextrd pextrq */
> + case 0x660f3a16:
> + /* extractps */
> + case 0x660f3a17:
> + /* movdqa */
> + case 0x660f7f:
> + /* movdqu */
> + case 0xf30f7f:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + {
> + if (opcode == 0x0f13 || opcode == 0x660f13
> + || opcode == 0x0f17 || opcode == 0x660f17)
> + goto no_support;
> + ir.rm |= ir.rex_b;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM
> (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.rm);
> + }
> + else
> + {
> + switch (opcode)
> + {
> + case 0x660f3a14:
> + ir.ot = OT_BYTE;
> + break;
> + case 0x660f3a15:
> + ir.ot = OT_WORD;
> + break;
> + case 0x660f3a16:
> + ir.ot = OT_LONG;
> + break;
> + case 0x660f3a17:
> + ir.ot = OT_QUAD;
> + break;
> + default:
> + ir.ot = OT_DQUAD;
> + break;
> + }
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* movntps */
> + case 0x0f2b:
> + /* movntpd */
> + case 0x660f2b:
> + /* movntq */
> + case 0x0fe7:
> + /* movntdq */
> + case 0x660fe7:
> + if (ir.mod == 3)
> + goto no_support;
> + if (opcode == 0x0fe7)
> + ir.ot = OT_QUAD;
> + else
> + ir.ot = OT_DQUAD;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + break;
> +
> + /* cvttss2si */
> + case 0xf30f2c:
> + /* cvttsd2si */
> + case 0xf20f2c:
> + /* cvtss2si */
> + case 0xf30f2d:
> + /* cvtsd2si */
> + case 0xf20f2d:
> + /* crc32 */
> + case 0xf20f38f0:
> + /* crc32 */
> + case 0xf20f38f1:
> + /* movmskps */
> + case 0x0f50:
> + /* movmskpd */
> + case 0x660f50:
> + /* pextrw */
> + case 0x0fc5:
> + /* pextrw */
> + case 0x660fc5:
> + /* pmovmskb */
> + case 0x0fd7:
> + /* pmovmskb */
> + case 0x660fd7:
> + I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
> + break;
> +
> + /* pshufb */
> + case 0x0f3800:
> + /* phaddw */
> + case 0x0f3801:
> + /* phaddd */
> + case 0x0f3802:
> + /* phaddsw */
> + case 0x0f3803:
> + /* pmaddubsw */
> + case 0x0f3804:
> + /* phsubw */
> + case 0x0f3805:
> + /* phsubd */
> + case 0x0f3806:
> + /* phaddsw */
> + case 0x0f3807:
> + /* psignb */
> + case 0x0f3808:
> + /* psignw */
> + case 0x0f3809:
> + /* psignd */
> + case 0x0f380a:
> + /* pmulhrsw */
> + case 0x0f380b:
> + /* pabsb */
> + case 0x0f381c:
> + /* pabsw */
> + case 0x0f381d:
> + /* pabsd */
> + case 0x0f381e:
> + /* packusdw */
> + case 0x0f382b:
> + /* pmovzxbw */
> + case 0x0f3830:
> + /* pmovzxbd */
> + case 0x0f3831:
> + /* pmovzxbq */
> + case 0x0f3832:
> + /* pmovzxwd */
> + case 0x0f3833:
> + /* pmovzxwq */
> + case 0x0f3834:
> + /* pmovzxdq */
> + case 0x0f3835:
> + /* pcmpgtq */
> + case 0x0f3837:
> + /* pminsb */
> + case 0x0f3838:
> + /* pminsd */
> + case 0x0f3839:
> + /* pminuw */
> + case 0x0f383a:
> + /* pminud */
> + case 0x0f383b:
> + /* pmaxsb */
> + case 0x0f383c:
> + /* pmaxsd */
> + case 0x0f383d:
> + /* pmaxuw */
> + case 0x0f383e:
> + /* pmaxud */
> + case 0x0f383f:
> + /* pmulld */
> + case 0x0f3840:
> + /* phminposuw */
> + case 0x0f3841:
> + /* palignr */
> + case 0x0f3a0f:
> + /* punpcklbw */
> + case 0x0f60:
> + /* punpcklwd */
> + case 0x0f61:
> + /* punpckldq */
> + case 0x0f62:
> + /* packsswb */
> + case 0x0f63:
> + /* pcmpgtb */
> + case 0x0f64:
> + /* pcmpgtw */
> + case 0x0f65:
> + /* pcmpgtl */
> + case 0x0f66:
> + /* packuswb */
> + case 0x0f67:
> + /* punpckhbw */
> + case 0x0f68:
> + /* punpckhwd */
> + case 0x0f69:
> + /* punpckhdq */
> + case 0x0f6a:
> + /* packssdw */
> + case 0x0f6b:
> + /* movd */
> + case 0x0f6e:
> + /* movq */
> + case 0x0f6f:
> + /* pshufw */
> + case 0x0f70:
> + /* pcmpeqb */
> + case 0x0f74:
> + /* pcmpeqw */
> + case 0x0f75:
> + /* pcmpeql */
> + case 0x0f76:
> + /* pinsrw */
> + case 0x0fc4:
> + /* psrlw */
> + case 0x0fd1:
> + /* psrld */
> + case 0x0fd2:
> + /* psrlq */
> + case 0x0fd3:
> + /* paddq */
> + case 0x0fd4:
> + /* pmullw */
> + case 0x0fd5:
> + /* movdq2q */
> + case 0xf20fd6:
> + /* psubusb */
> + case 0x0fd8:
> + /* psubusw */
> + case 0x0fd9:
> + /* pminub */
> + case 0x0fda:
> + /* pand */
> + case 0x0fdb:
> + /* paddusb */
> + case 0x0fdc:
> + /* paddusw */
> + case 0x0fdd:
> + /* pmaxub */
> + case 0x0fde:
> + /* pandn */
> + case 0x0fdf:
> + /* pavgb */
> + case 0x0fe0:
> + /* psraw */
> + case 0x0fe1:
> + /* psrad */
> + case 0x0fe2:
> + /* pavgw */
> + case 0x0fe3:
> + /* pmulhuw */
> + case 0x0fe4:
> + /* pmulhw */
> + case 0x0fe5:
> + /* psubsb */
> + case 0x0fe8:
> + /* psubsw */
> + case 0x0fe9:
> + /* pminsw */
> + case 0x0fea:
> + /* por */
> + case 0x0feb:
> + /* paddsb */
> + case 0x0fec:
> + /* paddsw */
> + case 0x0fed:
> + /* pmaxsw */
> + case 0x0fee:
> + /* pxor */
> + case 0x0fef:
> + /* psllw */
> + case 0x0ff1:
> + /* pslld */
> + case 0x0ff2:
> + /* psllq */
> + case 0x0ff3:
> + /* pmuludq */
> + case 0x0ff4:
> + /* pmaddwd */
> + case 0x0ff5:
> + /* psadbw */
> + case 0x0ff6:
> + /* psubb */
> + case 0x0ff8:
> + /* psubw */
> + case 0x0ff9:
> + /* psubl */
> + case 0x0ffa:
> + /* psubq */
> + case 0x0ffb:
> + /* paddb */
> + case 0x0ffc:
> + /* paddw */
> + case 0x0ffd:
> + /* paddl */
> + case 0x0ffe:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_MM0_REGNUM (tdep) + ir.reg);
> + break;
> +
> + /* psllw */
> + case 0x0f71:
> + /* pslld */
> + case 0x0f72:
> + /* psllq */
> + case 0x0f73:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_MM0_REGNUM (tdep) + ir.rm);
> + break;
> +
> + /* psllw */
> + case 0x660f71:
> + /* pslld */
> + case 0x660f72:
> + /* psllq */
> + case 0x660f73:
> + if (i386_record_modrm (&ir))
> + return -1;
> + ir.rm |= ir.rex_b;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.rm);
> + break;
> +
> + /* movd */
> + case 0x0f7e:
> + /* movd */
> + case 0x660f7e:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
> + else
> + {
> + if (ir.dflag == 2)
> + ir.ot = OT_QUAD;
> + else
> + ir.ot = OT_LONG;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* movq */
> + case 0x0f7f:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + {
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_MM0_REGNUM (tdep) + ir.rm);
> + }
> + else
> + {
> + ir.ot = OT_QUAD;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* popcnt */
> + case 0xf30fb8:
> + if (i386_record_modrm (&ir))
> + return -1;
> + I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + break;
> +
> + /* movq */
> + case 0x660fd6:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + {
> + ir.rm |= ir.rex_b;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM
> (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.rm);
> + }
> + else
> + {
> + ir.ot = OT_QUAD;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* ptest */
> + case 0x660f3817:
> + /* ucomiss */
> + case 0x0f2e:
> + /* ucomisd */
> + case 0x660f2e:
> + /* comiss */
> + case 0x0f2f:
> + /* comisd */
> + case 0x660f2f:
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + break;
> +
> + /* maskmovq */
> + case 0x0ff7:
> + regcache_raw_read_unsigned (ir.regcache,
> + ir.regmap[X86_RECORD_REDI_REGNUM],
> + &tmpulongest);
> + if (record_arch_list_add_mem (tmpulongest, 64))
> + return -1;
> + break;
> +
> + /* maskmovdqu */
> + case 0x660ff7:
> + regcache_raw_read_unsigned (ir.regcache,
> + ir.regmap[X86_RECORD_REDI_REGNUM],
> + &tmpulongest);
> + if (record_arch_list_add_mem (tmpulongest, 128))
> + return -1;
> + break;
> +
> + default:
> + goto no_support;
> + break;
> + }
> + break;
>
> default:
> - if (opcode > 0xff)
> - ir.addr -= 2;
> - else
> - ir.addr -= 1;
> goto no_support;
> break;
> }
> @@ -5370,8 +6554,9 @@ reswitch:
>
> no_support:
> printf_unfiltered (_("Process record doesn't support instruction 0x%02x "
> - "at address %s.\n"),
> - (unsigned int) (opcode), paddress (gdbarch, ir.addr));
> + "at address %s.\n"),
> + (unsigned int) (opcode),
> + paddress (gdbarch, ir.orig_addr));
> return -1;
> }
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-07 15:00 [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support Hui Zhu
2009-12-07 16:54 ` Michael Snyder
@ 2009-12-07 17:16 ` Michael Snyder
2009-12-07 17:43 ` Joel Brobecker
2009-12-10 19:52 ` Michael Snyder
2 siblings, 1 reply; 39+ messages in thread
From: Michael Snyder @ 2009-12-07 17:16 UTC (permalink / raw)
To: Hui Zhu; +Cc: gdb-patches ml, Mark Kettenis
Hui Zhu wrote:
> Hi guys,
>
> This patch make prec support x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4.
> Please help me review it.
OK, here's your stylistic review:
> 2009-12-07 Hui Zhu <teawater@gmail.com>
>
> * i386-tdep.c (OT_DQUAD): New enum.
> (i386_process_record): Add code for MMX, 3DNow!, SSE, SSE2,
> SSE3, SSSE3 and SSE4.
>
> ---
> i386-tdep.c | 1217 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 1201 insertions(+), 16 deletions(-)
>
> --- a/i386-tdep.c
> +++ b/i386-tdep.c
> @@ -2848,6 +2848,7 @@ enum
> OT_WORD,
> OT_LONG,
> OT_QUAD,
> + OT_DQUAD,
> };
>
> /* i386 arith/logic operations */
> @@ -3217,6 +3218,7 @@ i386_process_record (struct gdbarch *gdb
> int rex = 0;
> uint8_t rex_w = -1;
> uint8_t rex_r = 0;
> + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
>
> memset (&ir, 0, sizeof (struct i386_record_s));
> ir.regcache = regcache;
> @@ -3226,7 +3228,7 @@ i386_process_record (struct gdbarch *gdb
> ir.dflag = 1;
> ir.override = -1;
> ir.popl_esp_hack = 0;
> - ir.regmap = gdbarch_tdep (gdbarch)->record_regmap;
> + ir.regmap = tdep->record_regmap;
> ir.gdbarch = gdbarch;
>
> if (record_debug > 1)
> @@ -3344,7 +3346,7 @@ reswitch:
> return -1;
> }
> ir.addr++;
> - opcode = (uint16_t) tmpu8 | 0x0f00;
> + opcode = (uint32_t) tmpu8 | 0x0f00;
> goto reswitch;
> break;
>
> @@ -4868,7 +4870,7 @@ reswitch:
> }
> ir.addr++;
> if (tmpu8 != 0x80
> - || gdbarch_tdep (gdbarch)->i386_intx80_record == NULL)
> + || tdep->i386_intx80_record == NULL)
> {
> printf_unfiltered (_("Process record doesn't support "
> "instruction int 0x%02x.\n"),
> @@ -4876,7 +4878,7 @@ reswitch:
> ir.addr -= 2;
> goto no_support;
> }
> - ret = gdbarch_tdep (gdbarch)->i386_intx80_record (ir.regcache);
> + ret = tdep->i386_intx80_record (ir.regcache);
> if (ret)
> return ret;
> }
> @@ -4973,14 +4975,14 @@ reswitch:
> ir.addr -= 2;
> goto no_support;
> }
> - if (gdbarch_tdep (gdbarch)->i386_sysenter_record == NULL)
> + if (tdep->i386_sysenter_record == NULL)
> {
> printf_unfiltered (_("Process record doesn't support "
> "instruction sysenter.\n"));
> ir.addr -= 2;
> goto no_support;
> }
> - ret = gdbarch_tdep (gdbarch)->i386_sysenter_record (ir.regcache);
> + ret = tdep->i386_sysenter_record (ir.regcache);
> if (ret)
> return ret;
> }
> @@ -4998,14 +5000,14 @@ reswitch:
> case 0x0f05:
> {
> int ret;
> - if (gdbarch_tdep (gdbarch)->i386_syscall_record == NULL)
> + if (tdep->i386_syscall_record == NULL)
> {
> printf_unfiltered (_("Process record doesn't support "
> "instruction syscall.\n"));
> ir.addr -= 2;
> goto no_support;
> }
> - ret = gdbarch_tdep (gdbarch)->i386_syscall_record (ir.regcache);
> + ret = tdep->i386_syscall_record (ir.regcache);
> if (ret)
> return ret;
> }
> @@ -5349,14 +5351,1196 @@ reswitch:
> I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> break;
>
> - /* MMX/SSE/SSE2/PNI support */
> - /* XXX */
> + /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
> + /* 3DNow! prefetch */
> + case 0x0f0d:
> + break;
> +
> + /* 3DNow! femms */
> + case 0x0f0e:
> + /* emms */
> + case 0x0f77:
> + if (i386_fpc_regnum_p (gdbarch, I387_FTAG_REGNUM(tdep)))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache, I387_FTAG_REGNUM(tdep));
> + break;
> +
> + /* 3DNow! data */
> + case 0x0f0f:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (target_read_memory (ir.addr, &tmpu8, 1))
> + {
> + if (record_debug)
> + printf_unfiltered (_("Process record: error reading memory at "
> + "addr %s len = 1.\n"),
Long line string.
> + paddress (gdbarch, ir.addr));
> + return -1;
> + }
> + ir.addr++;
> + switch (tmpu8)
> + {
> + /* 3DNow! pi2fw */
> + case 0x0c:
Could you consider making these one line instead of two?
Like this:
case 0x0c: /* 3DNow! pi2fw */
I think it would increase readability and decrease ambiguity.
Right now, it's hard to tell whether the comment belongs to
the case above or the case below.
> + /* 3DNow! pi2fd */
> + case 0x0d:
> + /* 3DNow! pf2iw */
> + case 0x1c:
> + /* 3DNow! pf2id */
> + case 0x1d:
> + /* 3DNow! pfnacc */
> + case 0x8a:
> + /* 3DNow! pfpnacc */
> + case 0x8e:
> + /* 3DNow! pfcmpge */
> + case 0x90:
> + /* 3DNow! pfmin */
> + case 0x94:
> + /* 3DNow! pfrcp */
> + case 0x96:
> + /* 3DNow! pfrsqrt */
> + case 0x97:
> + /* 3DNow! pfsub */
> + case 0x9a:
> + /* 3DNow! pfadd */
> + case 0x9e:
> + /* 3DNow! pfcmpgt */
> + case 0xa0:
> + /* 3DNow! pfmax */
> + case 0xa4:
> + /* 3DNow! pfrcpit1 */
> + case 0xa6:
> + /* 3DNow! pfrsqit1 */
> + case 0xa7:
> + /* 3DNow! pfsubr */
> + case 0xaa:
> + /* 3DNow! pfacc */
> + case 0xae:
> + /* 3DNow! pfcmpeq */
> + case 0xb0:
> + /* 3DNow! pfmul */
> + case 0xb4:
> + /* 3DNow! pfrcpit2 */
> + case 0xb6:
> + /* 3DNow! pmulhrw */
> + case 0xb7:
> + /* 3DNow! pswapd */
> + case 0xbb:
> + /* 3DNow! pavgusb */
> + case 0xbf:
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
Break up long line.
> + goto no_support_3dnow_data;
> + record_arch_list_add_reg (ir.regcache, ir.reg);
> + break;
> +
> + default:
> +no_support_3dnow_data:
> + opcode = (opcode << 8) | tmpu8;
> + goto no_support;
> + break;
> + }
> + break;
> +
> + /* rsm */
> + case 0x0faa:
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
> + break;
> +
> + case 0x0fae:
> + if (i386_record_modrm (&ir))
> + return -1;
> + switch(ir.reg)
> + {
> + /* fxsave */
> + case 0:
> + {
> + uint64_t tmpu64;
> +
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + if (i386_record_lea_modrm_addr (&ir, &tmpu64))
> + return -1;
> + if (record_arch_list_add_mem (tmpu64, 512))
> + return -1;
> + }
> + break;
> +
> + /* fxrstor */
> + case 1:
> + {
> + int i;
> +
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> +
> + for (i = I387_MM0_REGNUM (tdep);
> + i386_mmx_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> +
> + for (i = I387_XMM0_REGNUM (tdep);
> + i386_sse_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> +
> + if (i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
> + record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
Break up long line.
> +
> + for (i = I387_ST0_REGNUM (tdep);
> + i386_fp_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> +
> + for (i = I387_FCTRL_REGNUM (tdep);
> + i386_fpc_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> + }
> + break;
> +
> + /* ldmxcsr */
> + case 2:
> + if (!i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
Break up long line.
> + break;
> +
> + /* stmxcsr */
> + case 3:
> + ir.ot = OT_LONG;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + break;
> +
> + /* lfence */
> + case 5:
> + /* mfence */
> + case 6:
> + /* sfence clflush */
> + case 7:
> + break;
> +
> + default:
> + opcode = (opcode << 8) | ir.modrm;
> + goto no_support;
> + break;
> + }
> + break;
> +
> + /* movnti */
> + case 0x0fc3:
> + ir.ot = (ir.dflag == 2) ? OT_QUAD : OT_LONG;
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + goto no_support;
> + ir.reg |= rex_r;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + break;
> +
> + /* Add prefix to opcode. */
> + case 0x0f10:
> + case 0x0f11:
> + case 0x0f12:
> + case 0x0f13:
> + case 0x0f14:
> + case 0x0f16:
> + case 0x0f17:
> + case 0x0f28:
> + case 0x0f29:
> + case 0x0f2a:
> + case 0x0f2b:
> + case 0x0f2c:
> + case 0x0f2d:
> + case 0x0f2e:
> + case 0x0f2f:
> + case 0x0f38:
> + case 0x0f39:
> + case 0x0f3a:
> + case 0x0f50:
> + case 0x0f51:
> + case 0x0f52:
> + case 0x0f53:
> + case 0x0f54:
> + case 0x0f55:
> + case 0x0f56:
> + case 0x0f57:
> + case 0x0f58:
> + case 0x0f59:
> + case 0x0f5a:
> + case 0x0f5b:
> + case 0x0f5c:
> + case 0x0f5d:
> + case 0x0f5e:
> + case 0x0f5f:
> + case 0x0f60:
> + case 0x0f61:
> + case 0x0f62:
> + case 0x0f63:
> + case 0x0f64:
> + case 0x0f65:
> + case 0x0f66:
> + case 0x0f67:
> + case 0x0f68:
> + case 0x0f69:
> + case 0x0f6a:
> + case 0x0f6b:
> + case 0x0f6c:
> + case 0x0f6d:
> + case 0x0f6e:
> + case 0x0f6f:
> + case 0x0f70:
> + case 0x0f71:
> + case 0x0f72:
> + case 0x0f73:
> + case 0x0f74:
> + case 0x0f75:
> + case 0x0f76:
> + case 0x0f7c:
> + case 0x0f7d:
> + case 0x0f7e:
> + case 0x0f7f:
> + case 0x0fb8:
> + case 0x0fc2:
> + case 0x0fc4:
> + case 0x0fc5:
> + case 0x0fc6:
> + case 0x0fd0:
> + case 0x0fd1:
> + case 0x0fd2:
> + case 0x0fd3:
> + case 0x0fd4:
> + case 0x0fd5:
> + case 0x0fd6:
> + case 0x0fd7:
> + case 0x0fd8:
> + case 0x0fd9:
> + case 0x0fda:
> + case 0x0fdb:
> + case 0x0fdc:
> + case 0x0fdd:
> + case 0x0fde:
> + case 0x0fdf:
> + case 0x0fe0:
> + case 0x0fe1:
> + case 0x0fe2:
> + case 0x0fe3:
> + case 0x0fe4:
> + case 0x0fe5:
> + case 0x0fe6:
> + case 0x0fe7:
> + case 0x0fe8:
> + case 0x0fe9:
> + case 0x0fea:
> + case 0x0feb:
> + case 0x0fec:
> + case 0x0fed:
> + case 0x0fee:
> + case 0x0fef:
> + case 0x0ff0:
> + case 0x0ff1:
> + case 0x0ff2:
> + case 0x0ff3:
> + case 0x0ff4:
> + case 0x0ff5:
> + case 0x0ff6:
> + case 0x0ff7:
> + case 0x0ff8:
> + case 0x0ff9:
> + case 0x0ffa:
> + case 0x0ffb:
> + case 0x0ffc:
> + case 0x0ffd:
> + case 0x0ffe:
I think GCC has an extension that allows you to specify
a range of cases on a single line. Just a suggestion...
> + switch (prefixes)
> + {
> + case PREFIX_REPNZ:
> + opcode |= 0xf20000;
> + break;
> + case PREFIX_DATA:
> + opcode |= 0x660000;
> + break;
> + case PREFIX_REPZ:
> + opcode |= 0xf30000;
> + break;
> + }
> +reswitch_prefix_add:
I think the standard calls for at least one leading space
before the label.
> + switch (opcode)
> + {
> + case 0x0f38:
> + case 0x660f38:
> + case 0xf20f38:
> + case 0x0f3a:
> + case 0x660f3a:
> + if (target_read_memory (ir.addr, &tmpu8, 1))
> + {
> + if (record_debug)
> + printf_unfiltered (_("Process record: error reading memory at "
> + "addr %s len = 1.\n"),
Re-adjust string for long line.
> + paddress (gdbarch, ir.addr));
> + return -1;
> + }
> + ir.addr++;
> + opcode = (uint32_t) tmpu8 | opcode << 4;
> + goto reswitch_prefix_add;
> + break;
> +
> + /* movups */
> + case 0x0f10:
Same request re: cases and comments on one line.
> + /* movupd */
> + case 0x660f10:
> + /* movss */
> + case 0xf30f10:
> + /* movsd */
> + case 0xf20f10:
> + /* movlps */
> + case 0x0f12:
> + /* movlpd */
> + case 0x660f12:
> + /* movsldup */
> + case 0xf30f12:
> + /* movddup */
> + case 0xf20f12:
> + /* unpcklps */
> + case 0x0f14:
> + /* unpcklpd */
> + case 0x660f14:
> + /* unpckhps */
> + case 0x0f15:
> + /* unpckhpd */
> + case 0x660f15:
> + /* movhps */
> + case 0x0f16:
> + /* movhpd */
> + case 0x660f16:
> + /* movshdup */
> + case 0xf30f16:
> + /* movaps */
> + case 0x0f28:
> + /* movapd */
> + case 0x660f28:
> + /* cvtpi2ps */
> + case 0x0f2a:
> + /* cvtpi2pd */
> + case 0x660f2a:
> + /* cvtsi2ss */
> + case 0xf30f2a:
> + /* cvtsi2sd */
> + case 0xf20f2a:
> + /* cvttps2pi */
> + case 0x0f2c:
> + /* cvttpd2pi */
> + case 0x660f2c:
> + /* cvtps2pi */
> + case 0x0f2d:
> + /* cvtpd2pi */
> + case 0x660f2d:
> + /* pshufb */
> + case 0x660f3800:
> + /* phaddw */
> + case 0x660f3801:
> + /* phaddd */
> + case 0x660f3802:
> + /* phaddsw */
> + case 0x660f3803:
> + /* pmaddubsw */
> + case 0x660f3804:
> + /* phsubw */
> + case 0x660f3805:
> + /* phsubd */
> + case 0x660f3806:
> + /* phaddsw */
> + case 0x660f3807:
> + /* psignb */
> + case 0x660f3808:
> + /* psignw */
> + case 0x660f3809:
> + /* psignd */
> + case 0x660f380a:
> + /* pmulhrsw */
> + case 0x660f380b:
> + /* pblendvb */
> + case 0x660f3810:
> + /* blendvps */
> + case 0x660f3814:
> + /* blendvpd */
> + case 0x660f3815:
> + /* pabsb */
> + case 0x660f381c:
> + /* pabsw */
> + case 0x660f381d:
> + /* pabsd */
> + case 0x660f381e:
> + /* pmovsxbw */
> + case 0x660f3820:
> + /* pmovsxbd */
> + case 0x660f3821:
> + /* pmovsxbq */
> + case 0x660f3822:
> + /* pmovsxwd */
> + case 0x660f3823:
> + /* pmovsxwq */
> + case 0x660f3824:
> + /* pmovsxdq */
> + case 0x660f3825:
> + /* pmuldq */
> + case 0x660f3828:
> + /* pcmpeqq */
> + case 0x660f3829:
> + /* movntdqa */
> + case 0x660f382a:
> + /* roundps */
> + case 0x660f3a08:
> + /* roundpd */
> + case 0x660f3a09:
> + /* roundss */
> + case 0x660f3a0a:
> + /* roundsd */
> + case 0x660f3a0b:
> + /* blendps */
> + case 0x660f3a0c:
> + /* blendpd */
> + case 0x660f3a0d:
> + /* pblendw */
> + case 0x660f3a0e:
> + /* palignr */
> + case 0x660f3a0f:
> + /* pinsrb */
> + case 0x660f3a20:
> + /* insertps */
> + case 0x660f3a21:
> + /* pinsrd pinsrq */
> + case 0x660f3a22:
> + /* dpps */
> + case 0x660f3a40:
> + /* dppd */
> + case 0x660f3a41:
> + /* mpsadbw */
> + case 0x660f3a42:
> + /* pcmpestrm */
> + case 0x660f3a60:
> + /* pcmpestri */
> + case 0x660f3a61:
> + /* pcmpistrm */
> + case 0x660f3a62:
> + /* pcmpistri */
> + case 0x660f3a63:
> + /* sqrtps */
> + case 0x0f51:
> + /* sqrtpd */
> + case 0x660f51:
> + /* sqrtsd */
> + case 0xf20f51:
> + /* sqrtss */
> + case 0xf30f51:
> + /* rsqrtps */
> + case 0x0f52:
> + /* rsqrtss */
> + case 0xf30f52:
> + /* rcpps */
> + case 0x0f53:
> + /* rcpss */
> + case 0xf30f53:
> + /* andps */
> + case 0x0f54:
> + /* andpd */
> + case 0x660f54:
> + /* andnps */
> + case 0x0f55:
> + /* andnpd */
> + case 0x660f55:
> + /* orps */
> + case 0x0f56:
> + /* orpd */
> + case 0x660f56:
> + /* xorps */
> + case 0x0f57:
> + /* xorpd */
> + case 0x660f57:
> + /* addps */
> + case 0x0f58:
> + /* addpd */
> + case 0x660f58:
> + /* addsd */
> + case 0xf20f58:
> + /* addss */
> + case 0xf30f58:
> + /* mulps */
> + case 0x0f59:
> + /* mulpd */
> + case 0x660f59:
> + /* mulsd */
> + case 0xf20f59:
> + /* mulss */
> + case 0xf30f59:
> + /* cvtps2pd */
> + case 0x0f5a:
> + /* cvtpd2ps */
> + case 0x660f5a:
> + /* cvtsd2ss */
> + case 0xf20f5a:
> + /* cvtss2sd */
> + case 0xf30f5a:
> + /* cvtdq2ps */
> + case 0x0f5b:
> + /* cvtps2dq */
> + case 0x660f5b:
> + /* cvttps2dq */
> + case 0xf30f5b:
> + /* subps */
> + case 0x0f5c:
> + /* subpd */
> + case 0x660f5c:
> + /* subsd */
> + case 0xf20f5c:
> + /* subss */
> + case 0xf30f5c:
> + /* minps */
> + case 0x0f5d:
> + /* minpd */
> + case 0x660f5d:
> + /* minsd */
> + case 0xf20f5d:
> + /* minss */
> + case 0xf30f5d:
> + /* divps */
> + case 0x0f5e:
> + /* divpd */
> + case 0x660f5e:
> + /* divsd */
> + case 0xf20f5e:
> + /* divss */
> + case 0xf30f5e:
> + /* maxps */
> + case 0x0f5f:
> + /* maxpd */
> + case 0x660f5f:
> + /* maxsd */
> + case 0xf20f5f:
> + /* maxss */
> + case 0xf30f5f:
> + /* punpcklbw */
> + case 0x660f60:
> + /* punpcklwd */
> + case 0x660f61:
> + /* punpckldq */
> + case 0x660f62:
> + /* packsswb */
> + case 0x660f63:
> + /* pcmpgtb */
> + case 0x660f64:
> + /* pcmpgtw */
> + case 0x660f65:
> + /* pcmpgtl */
> + case 0x660f66:
> + /* packuswb */
> + case 0x660f67:
> + /* punpckhbw */
> + case 0x660f68:
> + /* punpckhwd */
> + case 0x660f69:
> + /* punpckhdq */
> + case 0x660f6a:
> + /* packssdw */
> + case 0x660f6b:
> + /* punpcklqdq */
> + case 0x660f6c:
> + /* punpckhqdq */
> + case 0x660f6d:
> + /* movd */
> + case 0x660f6e:
> + /* movdqa */
> + case 0x660f6f:
> + /* movdqu */
> + case 0xf30f6f:
> + /* pshufd */
> + case 0x660f70:
> + /* pshuflw */
> + case 0xf20f70:
> + /* pshufhw */
> + case 0xf30f70:
> + /* pcmpeqb */
> + case 0x660f74:
> + /* pcmpeqw */
> + case 0x660f75:
> + /* pcmpeql */
> + case 0x660f76:
> + /* haddpd */
> + case 0x660f7c:
> + /* haddps */
> + case 0xf20f7c:
> + /* hsubpd */
> + case 0x660f7d:
> + /* hsubps */
> + case 0xf20f7d:
> + /* movq */
> + case 0xf30f7e:
> + /* cmpps */
> + case 0x0fc2:
> + /* cmppd */
> + case 0x660fc2:
> + /* cmpsd */
> + case 0xf20fc2:
> + /* cmpss */
> + case 0xf30fc2:
> + /* pinsrw */
> + case 0x660fc4:
> + /* shufps */
> + case 0x0fc6:
> + /* shufpd */
> + case 0x660fc6:
> + /* addsubpd */
> + case 0x660fd0:
> + /* addsubps */
> + case 0xf20fd0:
> + /* psrlw */
> + case 0x660fd1:
> + /* psrld */
> + case 0x660fd2:
> + /* psrlq */
> + case 0x660fd3:
> + /* paddq */
> + case 0x660fd4:
> + /* pmullw */
> + case 0x660fd5:
> + /* movq2dq */
> + case 0xf30fd6:
> + /* psubusb */
> + case 0x660fd8:
> + /* psubusw */
> + case 0x660fd9:
> + /* pminub */
> + case 0x660fda:
> + /* pand */
> + case 0x660fdb:
> + /* paddusb */
> + case 0x660fdc:
> + /* paddusw */
> + case 0x660fdd:
> + /* pmaxub */
> + case 0x660fde:
> + /* pandn */
> + case 0x660fdf:
> + /* pavgb */
> + case 0x660fe0:
> + /* psraw */
> + case 0x660fe1:
> + /* psrad */
> + case 0x660fe2:
> + /* pavgw */
> + case 0x660fe3:
> + /* pmulhuw */
> + case 0x660fe4:
> + /* pmulhw */
> + case 0x660fe5:
> + /* cvttpd2dq */
> + case 0x660fe6:
> + /* cvtpd2dq */
> + case 0xf20fe6:
> + /* cvtdq2pd */
> + case 0xf30fe6:
> + /* psubsb */
> + case 0x660fe8:
> + /* psubsw */
> + case 0x660fe9:
> + /* pminsw */
> + case 0x660fea:
> + /* por */
> + case 0x660feb:
> + /* paddsb */
> + case 0x660fec:
> + /* paddsw */
> + case 0x660fed:
> + /* pmaxsw */
> + case 0x660fee:
> + /* pxor */
> + case 0x660fef:
> + /* lddqu */
> + case 0x660ff0:
> + /* psllw */
> + case 0x660ff1:
> + /* pslld */
> + case 0x660ff2:
> + /* psllq */
> + case 0x660ff3:
> + /* pmuludq */
> + case 0x660ff4:
> + /* pmaddwd */
> + case 0x660ff5:
> + /* psadbw */
> + case 0x660ff6:
> + /* psubb */
> + case 0x660ff8:
> + /* psubw */
> + case 0x660ff9:
> + /* psubl */
> + case 0x660ffa:
> + /* psubq */
> + case 0x660ffb:
> + /* paddb */
> + case 0x660ffc:
> + /* paddw */
> + case 0x660ffd:
> + /* paddl */
> + case 0x660ffe:
> + if (i386_record_modrm (&ir))
> + return -1;
> + ir.reg |= rex_r;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.reg))
Break up long line.
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.reg);
> + if ((opcode & 0xfffffffc) == 0x660f3a60)
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + break;
> +
> + /* movups */
> + case 0x0f11:
> + /* movupd */
> + case 0x660f11:
> + /* movss */
> + case 0xf30f11:
> + /* movsd */
> + case 0xf20f11:
> + /* movlps */
> + case 0x0f13:
> + /* movlpd */
> + case 0x660f13:
> + /* movhps */
> + case 0x0f17:
> + /* movhpd */
> + case 0x660f17:
> + /* movaps */
> + case 0x0f29:
> + /* movapd */
> + case 0x660f29:
> + /* pextrb */
> + case 0x660f3a14:
> + /* pextrw */
> + case 0x660f3a15:
> + /* pextrd pextrq */
> + case 0x660f3a16:
> + /* extractps */
> + case 0x660f3a17:
> + /* movdqa */
> + case 0x660f7f:
> + /* movdqu */
> + case 0xf30f7f:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + {
> + if (opcode == 0x0f13 || opcode == 0x660f13
> + || opcode == 0x0f17 || opcode == 0x660f17)
> + goto no_support;
> + ir.rm |= ir.rex_b;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM
> (tdep) + ir.rm))
Break up long line.
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.rm);
> + }
> + else
> + {
> + switch (opcode)
> + {
> + case 0x660f3a14:
> + ir.ot = OT_BYTE;
> + break;
> + case 0x660f3a15:
> + ir.ot = OT_WORD;
> + break;
> + case 0x660f3a16:
> + ir.ot = OT_LONG;
> + break;
> + case 0x660f3a17:
> + ir.ot = OT_QUAD;
> + break;
> + default:
> + ir.ot = OT_DQUAD;
> + break;
> + }
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* movntps */
> + case 0x0f2b:
> + /* movntpd */
> + case 0x660f2b:
> + /* movntq */
> + case 0x0fe7:
> + /* movntdq */
> + case 0x660fe7:
> + if (ir.mod == 3)
> + goto no_support;
> + if (opcode == 0x0fe7)
> + ir.ot = OT_QUAD;
> + else
> + ir.ot = OT_DQUAD;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + break;
> +
> + /* cvttss2si */
> + case 0xf30f2c:
> + /* cvttsd2si */
> + case 0xf20f2c:
> + /* cvtss2si */
> + case 0xf30f2d:
> + /* cvtsd2si */
> + case 0xf20f2d:
> + /* crc32 */
> + case 0xf20f38f0:
> + /* crc32 */
> + case 0xf20f38f1:
> + /* movmskps */
> + case 0x0f50:
> + /* movmskpd */
> + case 0x660f50:
> + /* pextrw */
> + case 0x0fc5:
> + /* pextrw */
> + case 0x660fc5:
> + /* pmovmskb */
> + case 0x0fd7:
> + /* pmovmskb */
> + case 0x660fd7:
> + I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
> + break;
> +
> + /* pshufb */
> + case 0x0f3800:
> + /* phaddw */
> + case 0x0f3801:
> + /* phaddd */
> + case 0x0f3802:
> + /* phaddsw */
> + case 0x0f3803:
> + /* pmaddubsw */
> + case 0x0f3804:
> + /* phsubw */
> + case 0x0f3805:
> + /* phsubd */
> + case 0x0f3806:
> + /* phaddsw */
> + case 0x0f3807:
> + /* psignb */
> + case 0x0f3808:
> + /* psignw */
> + case 0x0f3809:
> + /* psignd */
> + case 0x0f380a:
> + /* pmulhrsw */
> + case 0x0f380b:
> + /* pabsb */
> + case 0x0f381c:
> + /* pabsw */
> + case 0x0f381d:
> + /* pabsd */
> + case 0x0f381e:
> + /* packusdw */
> + case 0x0f382b:
> + /* pmovzxbw */
> + case 0x0f3830:
> + /* pmovzxbd */
> + case 0x0f3831:
> + /* pmovzxbq */
> + case 0x0f3832:
> + /* pmovzxwd */
> + case 0x0f3833:
> + /* pmovzxwq */
> + case 0x0f3834:
> + /* pmovzxdq */
> + case 0x0f3835:
> + /* pcmpgtq */
> + case 0x0f3837:
> + /* pminsb */
> + case 0x0f3838:
> + /* pminsd */
> + case 0x0f3839:
> + /* pminuw */
> + case 0x0f383a:
> + /* pminud */
> + case 0x0f383b:
> + /* pmaxsb */
> + case 0x0f383c:
> + /* pmaxsd */
> + case 0x0f383d:
> + /* pmaxuw */
> + case 0x0f383e:
> + /* pmaxud */
> + case 0x0f383f:
> + /* pmulld */
> + case 0x0f3840:
> + /* phminposuw */
> + case 0x0f3841:
> + /* palignr */
> + case 0x0f3a0f:
> + /* punpcklbw */
> + case 0x0f60:
> + /* punpcklwd */
> + case 0x0f61:
> + /* punpckldq */
> + case 0x0f62:
> + /* packsswb */
> + case 0x0f63:
> + /* pcmpgtb */
> + case 0x0f64:
> + /* pcmpgtw */
> + case 0x0f65:
> + /* pcmpgtl */
> + case 0x0f66:
> + /* packuswb */
> + case 0x0f67:
> + /* punpckhbw */
> + case 0x0f68:
> + /* punpckhwd */
> + case 0x0f69:
> + /* punpckhdq */
> + case 0x0f6a:
> + /* packssdw */
> + case 0x0f6b:
> + /* movd */
> + case 0x0f6e:
> + /* movq */
> + case 0x0f6f:
> + /* pshufw */
> + case 0x0f70:
> + /* pcmpeqb */
> + case 0x0f74:
> + /* pcmpeqw */
> + case 0x0f75:
> + /* pcmpeql */
> + case 0x0f76:
> + /* pinsrw */
> + case 0x0fc4:
> + /* psrlw */
> + case 0x0fd1:
> + /* psrld */
> + case 0x0fd2:
> + /* psrlq */
> + case 0x0fd3:
> + /* paddq */
> + case 0x0fd4:
> + /* pmullw */
> + case 0x0fd5:
> + /* movdq2q */
> + case 0xf20fd6:
> + /* psubusb */
> + case 0x0fd8:
> + /* psubusw */
> + case 0x0fd9:
> + /* pminub */
> + case 0x0fda:
> + /* pand */
> + case 0x0fdb:
> + /* paddusb */
> + case 0x0fdc:
> + /* paddusw */
> + case 0x0fdd:
> + /* pmaxub */
> + case 0x0fde:
> + /* pandn */
> + case 0x0fdf:
> + /* pavgb */
> + case 0x0fe0:
> + /* psraw */
> + case 0x0fe1:
> + /* psrad */
> + case 0x0fe2:
> + /* pavgw */
> + case 0x0fe3:
> + /* pmulhuw */
> + case 0x0fe4:
> + /* pmulhw */
> + case 0x0fe5:
> + /* psubsb */
> + case 0x0fe8:
> + /* psubsw */
> + case 0x0fe9:
> + /* pminsw */
> + case 0x0fea:
> + /* por */
> + case 0x0feb:
> + /* paddsb */
> + case 0x0fec:
> + /* paddsw */
> + case 0x0fed:
> + /* pmaxsw */
> + case 0x0fee:
> + /* pxor */
> + case 0x0fef:
> + /* psllw */
> + case 0x0ff1:
> + /* pslld */
> + case 0x0ff2:
> + /* psllq */
> + case 0x0ff3:
> + /* pmuludq */
> + case 0x0ff4:
> + /* pmaddwd */
> + case 0x0ff5:
> + /* psadbw */
> + case 0x0ff6:
> + /* psubb */
> + case 0x0ff8:
> + /* psubw */
> + case 0x0ff9:
> + /* psubl */
> + case 0x0ffa:
> + /* psubq */
> + case 0x0ffb:
> + /* paddb */
> + case 0x0ffc:
> + /* paddw */
> + case 0x0ffd:
> + /* paddl */
> + case 0x0ffe:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
Long line.
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_MM0_REGNUM (tdep) + ir.reg);
> + break;
> +
> + /* psllw */
> + case 0x0f71:
> + /* pslld */
> + case 0x0f72:
> + /* psllq */
> + case 0x0f73:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
Long line.
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_MM0_REGNUM (tdep) + ir.rm);
> + break;
> +
> + /* psllw */
> + case 0x660f71:
> + /* pslld */
> + case 0x660f72:
> + /* psllq */
> + case 0x660f73:
> + if (i386_record_modrm (&ir))
> + return -1;
> + ir.rm |= ir.rex_b;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
Long line.
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.rm);
> + break;
> +
> + /* movd */
> + case 0x0f7e:
> + /* movd */
> + case 0x660f7e:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
> + else
> + {
> + if (ir.dflag == 2)
> + ir.ot = OT_QUAD;
> + else
> + ir.ot = OT_LONG;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* movq */
> + case 0x0f7f:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + {
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
Break up long line.
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_MM0_REGNUM (tdep) + ir.rm);
> + }
> + else
> + {
> + ir.ot = OT_QUAD;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* popcnt */
> + case 0xf30fb8:
> + if (i386_record_modrm (&ir))
> + return -1;
> + I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + break;
> +
> + /* movq */
> + case 0x660fd6:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + {
> + ir.rm |= ir.rex_b;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM
> (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.rm);
> + }
> + else
> + {
> + ir.ot = OT_QUAD;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* ptest */
> + case 0x660f3817:
> + /* ucomiss */
> + case 0x0f2e:
> + /* ucomisd */
> + case 0x660f2e:
> + /* comiss */
> + case 0x0f2f:
> + /* comisd */
> + case 0x660f2f:
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + break;
> +
> + /* maskmovq */
> + case 0x0ff7:
> + regcache_raw_read_unsigned (ir.regcache,
> + ir.regmap[X86_RECORD_REDI_REGNUM],
> + &tmpulongest);
> + if (record_arch_list_add_mem (tmpulongest, 64))
> + return -1;
> + break;
> +
> + /* maskmovdqu */
> + case 0x660ff7:
> + regcache_raw_read_unsigned (ir.regcache,
> + ir.regmap[X86_RECORD_REDI_REGNUM],
> + &tmpulongest);
> + if (record_arch_list_add_mem (tmpulongest, 128))
> + return -1;
> + break;
> +
> + default:
> + goto no_support;
> + break;
> + }
> + break;
>
> default:
> - if (opcode > 0xff)
> - ir.addr -= 2;
> - else
> - ir.addr -= 1;
> goto no_support;
> break;
> }
> @@ -5370,8 +6554,9 @@ reswitch:
>
> no_support:
> printf_unfiltered (_("Process record doesn't support instruction 0x%02x "
> - "at address %s.\n"),
> - (unsigned int) (opcode), paddress (gdbarch, ir.addr));
> + "at address %s.\n"),
Long line string.
> + (unsigned int) (opcode),
> + paddress (gdbarch, ir.orig_addr));
> return -1;
> }
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-07 17:16 ` Michael Snyder
@ 2009-12-07 17:43 ` Joel Brobecker
2009-12-07 17:54 ` Michael Snyder
0 siblings, 1 reply; 39+ messages in thread
From: Joel Brobecker @ 2009-12-07 17:43 UTC (permalink / raw)
To: Michael Snyder; +Cc: Hui Zhu, gdb-patches ml, Mark Kettenis
> I think GCC has an extension that allows you to specify
> a range of cases on a single line. Just a suggestion...
Let's avoid that extension, as GDB is supposed to be buildable with
a non-GCC compiler.
--
Joel
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-07 17:43 ` Joel Brobecker
@ 2009-12-07 17:54 ` Michael Snyder
2009-12-07 18:00 ` Joel Brobecker
0 siblings, 1 reply; 39+ messages in thread
From: Michael Snyder @ 2009-12-07 17:54 UTC (permalink / raw)
To: Joel Brobecker; +Cc: Hui Zhu, gdb-patches ml, Mark Kettenis
Joel Brobecker wrote:
>> I think GCC has an extension that allows you to specify
>> a range of cases on a single line. Just a suggestion...
>
> Let's avoid that extension, as GDB is supposed to be buildable with
> a non-GCC compiler.
I thought we had given up that requirement?
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-07 17:54 ` Michael Snyder
@ 2009-12-07 18:00 ` Joel Brobecker
2009-12-07 18:05 ` Michael Snyder
` (2 more replies)
0 siblings, 3 replies; 39+ messages in thread
From: Joel Brobecker @ 2009-12-07 18:00 UTC (permalink / raw)
To: Michael Snyder; +Cc: Hui Zhu, gdb-patches ml, Mark Kettenis
> >Let's avoid that extension, as GDB is supposed to be buildable with
> >a non-GCC compiler.
>
> I thought we had given up that requirement?
You might be right, but I don't remember us making that decision.
Anyone remembers?
--
Joel
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-07 18:00 ` Joel Brobecker
@ 2009-12-07 18:05 ` Michael Snyder
2009-12-08 5:51 ` Hui Zhu
2009-12-07 18:08 ` Doug Evans
2009-12-08 17:43 ` Tom Tromey
2 siblings, 1 reply; 39+ messages in thread
From: Michael Snyder @ 2009-12-07 18:05 UTC (permalink / raw)
To: Joel Brobecker; +Cc: Hui Zhu, gdb-patches ml, Mark Kettenis
Joel Brobecker wrote:
>>> Let's avoid that extension, as GDB is supposed to be buildable with
>>> a non-GCC compiler.
>> I thought we had given up that requirement?
>
> You might be right, but I don't remember us making that decision.
> Anyone remembers?
Nah, I'm probably confusing it for when we gave up the
requirement to be compilable by K&R (non-ansii) compilers.
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-07 18:00 ` Joel Brobecker
2009-12-07 18:05 ` Michael Snyder
@ 2009-12-07 18:08 ` Doug Evans
2009-12-08 17:43 ` Tom Tromey
2 siblings, 0 replies; 39+ messages in thread
From: Doug Evans @ 2009-12-07 18:08 UTC (permalink / raw)
To: Joel Brobecker; +Cc: Michael Snyder, Hui Zhu, gdb-patches ml, Mark Kettenis
On Mon, Dec 7, 2009 at 10:00 AM, Joel Brobecker <brobecker@adacore.com> wrote:
>> >Let's avoid that extension, as GDB is supposed to be buildable with
>> >a non-GCC compiler.
>>
>> I thought we had given up that requirement?
>
> You might be right, but I don't remember us making that decision.
> Anyone remembers?
And regardless of what the answer is, can we write it down on the wiki
somewhere. :-)
[assuming it's not there already]
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-07 18:05 ` Michael Snyder
@ 2009-12-08 5:51 ` Hui Zhu
2009-12-08 19:56 ` Michael Snyder
0 siblings, 1 reply; 39+ messages in thread
From: Hui Zhu @ 2009-12-08 5:51 UTC (permalink / raw)
To: Michael Snyder; +Cc: Joel Brobecker, gdb-patches ml, Mark Kettenis
I think your mean is case 5...10:, right?
I did it before, a lot of people told me that they didn't like it. So...
And about:
+ /* 3DNow! prefetch */
+ case 0x0f0d:
This is really a big change. And In i386-tdep.c, there are a lot of
code is like it too.
So I suggest we make a special patch to fix all of this code after a
clear and deeply discussion. :) What do you think about it?
Thanks,
Hui
On Tue, Dec 8, 2009 at 02:05, Michael Snyder <msnyder@vmware.com> wrote:
> Joel Brobecker wrote:
>>>>
>>>> Let's avoid that extension, as GDB is supposed to be buildable with
>>>> a non-GCC compiler.
>>>
>>> I thought we had given up that requirement?
>>
>> You might be right, but I don't remember us making that decision.
>> Anyone remembers?
>
> Nah, I'm probably confusing it for when we gave up the
> requirement to be compilable by K&R (non-ansii) compilers.
>
>
>
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-07 18:00 ` Joel Brobecker
2009-12-07 18:05 ` Michael Snyder
2009-12-07 18:08 ` Doug Evans
@ 2009-12-08 17:43 ` Tom Tromey
2 siblings, 0 replies; 39+ messages in thread
From: Tom Tromey @ 2009-12-08 17:43 UTC (permalink / raw)
To: Joel Brobecker; +Cc: Michael Snyder, Hui Zhu, gdb-patches ml, Mark Kettenis
>>>>> "Joel" == Joel Brobecker <brobecker@adacore.com> writes:
>> >Let's avoid that extension, as GDB is supposed to be buildable with
>> >a non-GCC compiler.
>>
>> I thought we had given up that requirement?
Joel> You might be right, but I don't remember us making that decision.
Joel> Anyone remembers?
I have never heard that.
We do use GCC features sometimes, but always conditionally; e.g., look
for __GNUC__ in defs.h.
Tom
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-08 5:51 ` Hui Zhu
@ 2009-12-08 19:56 ` Michael Snyder
0 siblings, 0 replies; 39+ messages in thread
From: Michael Snyder @ 2009-12-08 19:56 UTC (permalink / raw)
To: Hui Zhu; +Cc: Joel Brobecker, gdb-patches ml, Mark Kettenis
Hui Zhu wrote:
> I think your mean is case 5...10:, right?
>
> I did it before, a lot of people told me that they didn't like it. So...
OK, please ignore that issue.
> And about:
> + /* 3DNow! prefetch */
> + case 0x0f0d:
>
> This is really a big change. And In i386-tdep.c, there are a lot of
> code is like it too.
> So I suggest we make a special patch to fix all of this code after a
> clear and deeply discussion. :) What do you think about it?
Fair enough.
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-07 15:00 [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support Hui Zhu
2009-12-07 16:54 ` Michael Snyder
2009-12-07 17:16 ` Michael Snyder
@ 2009-12-10 19:52 ` Michael Snyder
2009-12-11 15:00 ` Hui Zhu
2 siblings, 1 reply; 39+ messages in thread
From: Michael Snyder @ 2009-12-10 19:52 UTC (permalink / raw)
To: Hui Zhu; +Cc: gdb-patches ml, Mark Kettenis
Hui Zhu wrote:
> Hi guys,
>
> This patch make prec support x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4.
> Please help me review it.
Sounds like these are close to acceptance.
Hui, can we get some testsuites, please?
You can use Oza's tests for the 387 as a model for starting.
Michael
> 2009-12-07 Hui Zhu <teawater@gmail.com>
>
> * i386-tdep.c (OT_DQUAD): New enum.
> (i386_process_record): Add code for MMX, 3DNow!, SSE, SSE2,
> SSE3, SSSE3 and SSE4.
>
> ---
> i386-tdep.c | 1217 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 1201 insertions(+), 16 deletions(-)
>
> --- a/i386-tdep.c
> +++ b/i386-tdep.c
> @@ -2848,6 +2848,7 @@ enum
> OT_WORD,
> OT_LONG,
> OT_QUAD,
> + OT_DQUAD,
> };
>
> /* i386 arith/logic operations */
> @@ -3217,6 +3218,7 @@ i386_process_record (struct gdbarch *gdb
> int rex = 0;
> uint8_t rex_w = -1;
> uint8_t rex_r = 0;
> + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
>
> memset (&ir, 0, sizeof (struct i386_record_s));
> ir.regcache = regcache;
> @@ -3226,7 +3228,7 @@ i386_process_record (struct gdbarch *gdb
> ir.dflag = 1;
> ir.override = -1;
> ir.popl_esp_hack = 0;
> - ir.regmap = gdbarch_tdep (gdbarch)->record_regmap;
> + ir.regmap = tdep->record_regmap;
> ir.gdbarch = gdbarch;
>
> if (record_debug > 1)
> @@ -3344,7 +3346,7 @@ reswitch:
> return -1;
> }
> ir.addr++;
> - opcode = (uint16_t) tmpu8 | 0x0f00;
> + opcode = (uint32_t) tmpu8 | 0x0f00;
> goto reswitch;
> break;
>
> @@ -4868,7 +4870,7 @@ reswitch:
> }
> ir.addr++;
> if (tmpu8 != 0x80
> - || gdbarch_tdep (gdbarch)->i386_intx80_record == NULL)
> + || tdep->i386_intx80_record == NULL)
> {
> printf_unfiltered (_("Process record doesn't support "
> "instruction int 0x%02x.\n"),
> @@ -4876,7 +4878,7 @@ reswitch:
> ir.addr -= 2;
> goto no_support;
> }
> - ret = gdbarch_tdep (gdbarch)->i386_intx80_record (ir.regcache);
> + ret = tdep->i386_intx80_record (ir.regcache);
> if (ret)
> return ret;
> }
> @@ -4973,14 +4975,14 @@ reswitch:
> ir.addr -= 2;
> goto no_support;
> }
> - if (gdbarch_tdep (gdbarch)->i386_sysenter_record == NULL)
> + if (tdep->i386_sysenter_record == NULL)
> {
> printf_unfiltered (_("Process record doesn't support "
> "instruction sysenter.\n"));
> ir.addr -= 2;
> goto no_support;
> }
> - ret = gdbarch_tdep (gdbarch)->i386_sysenter_record (ir.regcache);
> + ret = tdep->i386_sysenter_record (ir.regcache);
> if (ret)
> return ret;
> }
> @@ -4998,14 +5000,14 @@ reswitch:
> case 0x0f05:
> {
> int ret;
> - if (gdbarch_tdep (gdbarch)->i386_syscall_record == NULL)
> + if (tdep->i386_syscall_record == NULL)
> {
> printf_unfiltered (_("Process record doesn't support "
> "instruction syscall.\n"));
> ir.addr -= 2;
> goto no_support;
> }
> - ret = gdbarch_tdep (gdbarch)->i386_syscall_record (ir.regcache);
> + ret = tdep->i386_syscall_record (ir.regcache);
> if (ret)
> return ret;
> }
> @@ -5349,14 +5351,1196 @@ reswitch:
> I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> break;
>
> - /* MMX/SSE/SSE2/PNI support */
> - /* XXX */
> + /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
> + /* 3DNow! prefetch */
> + case 0x0f0d:
> + break;
> +
> + /* 3DNow! femms */
> + case 0x0f0e:
> + /* emms */
> + case 0x0f77:
> + if (i386_fpc_regnum_p (gdbarch, I387_FTAG_REGNUM(tdep)))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache, I387_FTAG_REGNUM(tdep));
> + break;
> +
> + /* 3DNow! data */
> + case 0x0f0f:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (target_read_memory (ir.addr, &tmpu8, 1))
> + {
> + if (record_debug)
> + printf_unfiltered (_("Process record: error reading memory at "
> + "addr %s len = 1.\n"),
> + paddress (gdbarch, ir.addr));
> + return -1;
> + }
> + ir.addr++;
> + switch (tmpu8)
> + {
> + /* 3DNow! pi2fw */
> + case 0x0c:
> + /* 3DNow! pi2fd */
> + case 0x0d:
> + /* 3DNow! pf2iw */
> + case 0x1c:
> + /* 3DNow! pf2id */
> + case 0x1d:
> + /* 3DNow! pfnacc */
> + case 0x8a:
> + /* 3DNow! pfpnacc */
> + case 0x8e:
> + /* 3DNow! pfcmpge */
> + case 0x90:
> + /* 3DNow! pfmin */
> + case 0x94:
> + /* 3DNow! pfrcp */
> + case 0x96:
> + /* 3DNow! pfrsqrt */
> + case 0x97:
> + /* 3DNow! pfsub */
> + case 0x9a:
> + /* 3DNow! pfadd */
> + case 0x9e:
> + /* 3DNow! pfcmpgt */
> + case 0xa0:
> + /* 3DNow! pfmax */
> + case 0xa4:
> + /* 3DNow! pfrcpit1 */
> + case 0xa6:
> + /* 3DNow! pfrsqit1 */
> + case 0xa7:
> + /* 3DNow! pfsubr */
> + case 0xaa:
> + /* 3DNow! pfacc */
> + case 0xae:
> + /* 3DNow! pfcmpeq */
> + case 0xb0:
> + /* 3DNow! pfmul */
> + case 0xb4:
> + /* 3DNow! pfrcpit2 */
> + case 0xb6:
> + /* 3DNow! pmulhrw */
> + case 0xb7:
> + /* 3DNow! pswapd */
> + case 0xbb:
> + /* 3DNow! pavgusb */
> + case 0xbf:
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
> + goto no_support_3dnow_data;
> + record_arch_list_add_reg (ir.regcache, ir.reg);
> + break;
> +
> + default:
> +no_support_3dnow_data:
> + opcode = (opcode << 8) | tmpu8;
> + goto no_support;
> + break;
> + }
> + break;
> +
> + /* rsm */
> + case 0x0faa:
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
> + break;
> +
> + case 0x0fae:
> + if (i386_record_modrm (&ir))
> + return -1;
> + switch(ir.reg)
> + {
> + /* fxsave */
> + case 0:
> + {
> + uint64_t tmpu64;
> +
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + if (i386_record_lea_modrm_addr (&ir, &tmpu64))
> + return -1;
> + if (record_arch_list_add_mem (tmpu64, 512))
> + return -1;
> + }
> + break;
> +
> + /* fxrstor */
> + case 1:
> + {
> + int i;
> +
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> +
> + for (i = I387_MM0_REGNUM (tdep);
> + i386_mmx_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> +
> + for (i = I387_XMM0_REGNUM (tdep);
> + i386_sse_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> +
> + if (i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
> + record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
> +
> + for (i = I387_ST0_REGNUM (tdep);
> + i386_fp_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> +
> + for (i = I387_FCTRL_REGNUM (tdep);
> + i386_fpc_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> + }
> + break;
> +
> + /* ldmxcsr */
> + case 2:
> + if (!i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
> + break;
> +
> + /* stmxcsr */
> + case 3:
> + ir.ot = OT_LONG;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + break;
> +
> + /* lfence */
> + case 5:
> + /* mfence */
> + case 6:
> + /* sfence clflush */
> + case 7:
> + break;
> +
> + default:
> + opcode = (opcode << 8) | ir.modrm;
> + goto no_support;
> + break;
> + }
> + break;
> +
> + /* movnti */
> + case 0x0fc3:
> + ir.ot = (ir.dflag == 2) ? OT_QUAD : OT_LONG;
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + goto no_support;
> + ir.reg |= rex_r;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + break;
> +
> + /* Add prefix to opcode. */
> + case 0x0f10:
> + case 0x0f11:
> + case 0x0f12:
> + case 0x0f13:
> + case 0x0f14:
> + case 0x0f16:
> + case 0x0f17:
> + case 0x0f28:
> + case 0x0f29:
> + case 0x0f2a:
> + case 0x0f2b:
> + case 0x0f2c:
> + case 0x0f2d:
> + case 0x0f2e:
> + case 0x0f2f:
> + case 0x0f38:
> + case 0x0f39:
> + case 0x0f3a:
> + case 0x0f50:
> + case 0x0f51:
> + case 0x0f52:
> + case 0x0f53:
> + case 0x0f54:
> + case 0x0f55:
> + case 0x0f56:
> + case 0x0f57:
> + case 0x0f58:
> + case 0x0f59:
> + case 0x0f5a:
> + case 0x0f5b:
> + case 0x0f5c:
> + case 0x0f5d:
> + case 0x0f5e:
> + case 0x0f5f:
> + case 0x0f60:
> + case 0x0f61:
> + case 0x0f62:
> + case 0x0f63:
> + case 0x0f64:
> + case 0x0f65:
> + case 0x0f66:
> + case 0x0f67:
> + case 0x0f68:
> + case 0x0f69:
> + case 0x0f6a:
> + case 0x0f6b:
> + case 0x0f6c:
> + case 0x0f6d:
> + case 0x0f6e:
> + case 0x0f6f:
> + case 0x0f70:
> + case 0x0f71:
> + case 0x0f72:
> + case 0x0f73:
> + case 0x0f74:
> + case 0x0f75:
> + case 0x0f76:
> + case 0x0f7c:
> + case 0x0f7d:
> + case 0x0f7e:
> + case 0x0f7f:
> + case 0x0fb8:
> + case 0x0fc2:
> + case 0x0fc4:
> + case 0x0fc5:
> + case 0x0fc6:
> + case 0x0fd0:
> + case 0x0fd1:
> + case 0x0fd2:
> + case 0x0fd3:
> + case 0x0fd4:
> + case 0x0fd5:
> + case 0x0fd6:
> + case 0x0fd7:
> + case 0x0fd8:
> + case 0x0fd9:
> + case 0x0fda:
> + case 0x0fdb:
> + case 0x0fdc:
> + case 0x0fdd:
> + case 0x0fde:
> + case 0x0fdf:
> + case 0x0fe0:
> + case 0x0fe1:
> + case 0x0fe2:
> + case 0x0fe3:
> + case 0x0fe4:
> + case 0x0fe5:
> + case 0x0fe6:
> + case 0x0fe7:
> + case 0x0fe8:
> + case 0x0fe9:
> + case 0x0fea:
> + case 0x0feb:
> + case 0x0fec:
> + case 0x0fed:
> + case 0x0fee:
> + case 0x0fef:
> + case 0x0ff0:
> + case 0x0ff1:
> + case 0x0ff2:
> + case 0x0ff3:
> + case 0x0ff4:
> + case 0x0ff5:
> + case 0x0ff6:
> + case 0x0ff7:
> + case 0x0ff8:
> + case 0x0ff9:
> + case 0x0ffa:
> + case 0x0ffb:
> + case 0x0ffc:
> + case 0x0ffd:
> + case 0x0ffe:
> + switch (prefixes)
> + {
> + case PREFIX_REPNZ:
> + opcode |= 0xf20000;
> + break;
> + case PREFIX_DATA:
> + opcode |= 0x660000;
> + break;
> + case PREFIX_REPZ:
> + opcode |= 0xf30000;
> + break;
> + }
> +reswitch_prefix_add:
> + switch (opcode)
> + {
> + case 0x0f38:
> + case 0x660f38:
> + case 0xf20f38:
> + case 0x0f3a:
> + case 0x660f3a:
> + if (target_read_memory (ir.addr, &tmpu8, 1))
> + {
> + if (record_debug)
> + printf_unfiltered (_("Process record: error reading memory at "
> + "addr %s len = 1.\n"),
> + paddress (gdbarch, ir.addr));
> + return -1;
> + }
> + ir.addr++;
> + opcode = (uint32_t) tmpu8 | opcode << 4;
> + goto reswitch_prefix_add;
> + break;
> +
> + /* movups */
> + case 0x0f10:
> + /* movupd */
> + case 0x660f10:
> + /* movss */
> + case 0xf30f10:
> + /* movsd */
> + case 0xf20f10:
> + /* movlps */
> + case 0x0f12:
> + /* movlpd */
> + case 0x660f12:
> + /* movsldup */
> + case 0xf30f12:
> + /* movddup */
> + case 0xf20f12:
> + /* unpcklps */
> + case 0x0f14:
> + /* unpcklpd */
> + case 0x660f14:
> + /* unpckhps */
> + case 0x0f15:
> + /* unpckhpd */
> + case 0x660f15:
> + /* movhps */
> + case 0x0f16:
> + /* movhpd */
> + case 0x660f16:
> + /* movshdup */
> + case 0xf30f16:
> + /* movaps */
> + case 0x0f28:
> + /* movapd */
> + case 0x660f28:
> + /* cvtpi2ps */
> + case 0x0f2a:
> + /* cvtpi2pd */
> + case 0x660f2a:
> + /* cvtsi2ss */
> + case 0xf30f2a:
> + /* cvtsi2sd */
> + case 0xf20f2a:
> + /* cvttps2pi */
> + case 0x0f2c:
> + /* cvttpd2pi */
> + case 0x660f2c:
> + /* cvtps2pi */
> + case 0x0f2d:
> + /* cvtpd2pi */
> + case 0x660f2d:
> + /* pshufb */
> + case 0x660f3800:
> + /* phaddw */
> + case 0x660f3801:
> + /* phaddd */
> + case 0x660f3802:
> + /* phaddsw */
> + case 0x660f3803:
> + /* pmaddubsw */
> + case 0x660f3804:
> + /* phsubw */
> + case 0x660f3805:
> + /* phsubd */
> + case 0x660f3806:
> + /* phaddsw */
> + case 0x660f3807:
> + /* psignb */
> + case 0x660f3808:
> + /* psignw */
> + case 0x660f3809:
> + /* psignd */
> + case 0x660f380a:
> + /* pmulhrsw */
> + case 0x660f380b:
> + /* pblendvb */
> + case 0x660f3810:
> + /* blendvps */
> + case 0x660f3814:
> + /* blendvpd */
> + case 0x660f3815:
> + /* pabsb */
> + case 0x660f381c:
> + /* pabsw */
> + case 0x660f381d:
> + /* pabsd */
> + case 0x660f381e:
> + /* pmovsxbw */
> + case 0x660f3820:
> + /* pmovsxbd */
> + case 0x660f3821:
> + /* pmovsxbq */
> + case 0x660f3822:
> + /* pmovsxwd */
> + case 0x660f3823:
> + /* pmovsxwq */
> + case 0x660f3824:
> + /* pmovsxdq */
> + case 0x660f3825:
> + /* pmuldq */
> + case 0x660f3828:
> + /* pcmpeqq */
> + case 0x660f3829:
> + /* movntdqa */
> + case 0x660f382a:
> + /* roundps */
> + case 0x660f3a08:
> + /* roundpd */
> + case 0x660f3a09:
> + /* roundss */
> + case 0x660f3a0a:
> + /* roundsd */
> + case 0x660f3a0b:
> + /* blendps */
> + case 0x660f3a0c:
> + /* blendpd */
> + case 0x660f3a0d:
> + /* pblendw */
> + case 0x660f3a0e:
> + /* palignr */
> + case 0x660f3a0f:
> + /* pinsrb */
> + case 0x660f3a20:
> + /* insertps */
> + case 0x660f3a21:
> + /* pinsrd pinsrq */
> + case 0x660f3a22:
> + /* dpps */
> + case 0x660f3a40:
> + /* dppd */
> + case 0x660f3a41:
> + /* mpsadbw */
> + case 0x660f3a42:
> + /* pcmpestrm */
> + case 0x660f3a60:
> + /* pcmpestri */
> + case 0x660f3a61:
> + /* pcmpistrm */
> + case 0x660f3a62:
> + /* pcmpistri */
> + case 0x660f3a63:
> + /* sqrtps */
> + case 0x0f51:
> + /* sqrtpd */
> + case 0x660f51:
> + /* sqrtsd */
> + case 0xf20f51:
> + /* sqrtss */
> + case 0xf30f51:
> + /* rsqrtps */
> + case 0x0f52:
> + /* rsqrtss */
> + case 0xf30f52:
> + /* rcpps */
> + case 0x0f53:
> + /* rcpss */
> + case 0xf30f53:
> + /* andps */
> + case 0x0f54:
> + /* andpd */
> + case 0x660f54:
> + /* andnps */
> + case 0x0f55:
> + /* andnpd */
> + case 0x660f55:
> + /* orps */
> + case 0x0f56:
> + /* orpd */
> + case 0x660f56:
> + /* xorps */
> + case 0x0f57:
> + /* xorpd */
> + case 0x660f57:
> + /* addps */
> + case 0x0f58:
> + /* addpd */
> + case 0x660f58:
> + /* addsd */
> + case 0xf20f58:
> + /* addss */
> + case 0xf30f58:
> + /* mulps */
> + case 0x0f59:
> + /* mulpd */
> + case 0x660f59:
> + /* mulsd */
> + case 0xf20f59:
> + /* mulss */
> + case 0xf30f59:
> + /* cvtps2pd */
> + case 0x0f5a:
> + /* cvtpd2ps */
> + case 0x660f5a:
> + /* cvtsd2ss */
> + case 0xf20f5a:
> + /* cvtss2sd */
> + case 0xf30f5a:
> + /* cvtdq2ps */
> + case 0x0f5b:
> + /* cvtps2dq */
> + case 0x660f5b:
> + /* cvttps2dq */
> + case 0xf30f5b:
> + /* subps */
> + case 0x0f5c:
> + /* subpd */
> + case 0x660f5c:
> + /* subsd */
> + case 0xf20f5c:
> + /* subss */
> + case 0xf30f5c:
> + /* minps */
> + case 0x0f5d:
> + /* minpd */
> + case 0x660f5d:
> + /* minsd */
> + case 0xf20f5d:
> + /* minss */
> + case 0xf30f5d:
> + /* divps */
> + case 0x0f5e:
> + /* divpd */
> + case 0x660f5e:
> + /* divsd */
> + case 0xf20f5e:
> + /* divss */
> + case 0xf30f5e:
> + /* maxps */
> + case 0x0f5f:
> + /* maxpd */
> + case 0x660f5f:
> + /* maxsd */
> + case 0xf20f5f:
> + /* maxss */
> + case 0xf30f5f:
> + /* punpcklbw */
> + case 0x660f60:
> + /* punpcklwd */
> + case 0x660f61:
> + /* punpckldq */
> + case 0x660f62:
> + /* packsswb */
> + case 0x660f63:
> + /* pcmpgtb */
> + case 0x660f64:
> + /* pcmpgtw */
> + case 0x660f65:
> + /* pcmpgtl */
> + case 0x660f66:
> + /* packuswb */
> + case 0x660f67:
> + /* punpckhbw */
> + case 0x660f68:
> + /* punpckhwd */
> + case 0x660f69:
> + /* punpckhdq */
> + case 0x660f6a:
> + /* packssdw */
> + case 0x660f6b:
> + /* punpcklqdq */
> + case 0x660f6c:
> + /* punpckhqdq */
> + case 0x660f6d:
> + /* movd */
> + case 0x660f6e:
> + /* movdqa */
> + case 0x660f6f:
> + /* movdqu */
> + case 0xf30f6f:
> + /* pshufd */
> + case 0x660f70:
> + /* pshuflw */
> + case 0xf20f70:
> + /* pshufhw */
> + case 0xf30f70:
> + /* pcmpeqb */
> + case 0x660f74:
> + /* pcmpeqw */
> + case 0x660f75:
> + /* pcmpeql */
> + case 0x660f76:
> + /* haddpd */
> + case 0x660f7c:
> + /* haddps */
> + case 0xf20f7c:
> + /* hsubpd */
> + case 0x660f7d:
> + /* hsubps */
> + case 0xf20f7d:
> + /* movq */
> + case 0xf30f7e:
> + /* cmpps */
> + case 0x0fc2:
> + /* cmppd */
> + case 0x660fc2:
> + /* cmpsd */
> + case 0xf20fc2:
> + /* cmpss */
> + case 0xf30fc2:
> + /* pinsrw */
> + case 0x660fc4:
> + /* shufps */
> + case 0x0fc6:
> + /* shufpd */
> + case 0x660fc6:
> + /* addsubpd */
> + case 0x660fd0:
> + /* addsubps */
> + case 0xf20fd0:
> + /* psrlw */
> + case 0x660fd1:
> + /* psrld */
> + case 0x660fd2:
> + /* psrlq */
> + case 0x660fd3:
> + /* paddq */
> + case 0x660fd4:
> + /* pmullw */
> + case 0x660fd5:
> + /* movq2dq */
> + case 0xf30fd6:
> + /* psubusb */
> + case 0x660fd8:
> + /* psubusw */
> + case 0x660fd9:
> + /* pminub */
> + case 0x660fda:
> + /* pand */
> + case 0x660fdb:
> + /* paddusb */
> + case 0x660fdc:
> + /* paddusw */
> + case 0x660fdd:
> + /* pmaxub */
> + case 0x660fde:
> + /* pandn */
> + case 0x660fdf:
> + /* pavgb */
> + case 0x660fe0:
> + /* psraw */
> + case 0x660fe1:
> + /* psrad */
> + case 0x660fe2:
> + /* pavgw */
> + case 0x660fe3:
> + /* pmulhuw */
> + case 0x660fe4:
> + /* pmulhw */
> + case 0x660fe5:
> + /* cvttpd2dq */
> + case 0x660fe6:
> + /* cvtpd2dq */
> + case 0xf20fe6:
> + /* cvtdq2pd */
> + case 0xf30fe6:
> + /* psubsb */
> + case 0x660fe8:
> + /* psubsw */
> + case 0x660fe9:
> + /* pminsw */
> + case 0x660fea:
> + /* por */
> + case 0x660feb:
> + /* paddsb */
> + case 0x660fec:
> + /* paddsw */
> + case 0x660fed:
> + /* pmaxsw */
> + case 0x660fee:
> + /* pxor */
> + case 0x660fef:
> + /* lddqu */
> + case 0x660ff0:
> + /* psllw */
> + case 0x660ff1:
> + /* pslld */
> + case 0x660ff2:
> + /* psllq */
> + case 0x660ff3:
> + /* pmuludq */
> + case 0x660ff4:
> + /* pmaddwd */
> + case 0x660ff5:
> + /* psadbw */
> + case 0x660ff6:
> + /* psubb */
> + case 0x660ff8:
> + /* psubw */
> + case 0x660ff9:
> + /* psubl */
> + case 0x660ffa:
> + /* psubq */
> + case 0x660ffb:
> + /* paddb */
> + case 0x660ffc:
> + /* paddw */
> + case 0x660ffd:
> + /* paddl */
> + case 0x660ffe:
> + if (i386_record_modrm (&ir))
> + return -1;
> + ir.reg |= rex_r;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.reg))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.reg);
> + if ((opcode & 0xfffffffc) == 0x660f3a60)
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + break;
> +
> + /* movups */
> + case 0x0f11:
> + /* movupd */
> + case 0x660f11:
> + /* movss */
> + case 0xf30f11:
> + /* movsd */
> + case 0xf20f11:
> + /* movlps */
> + case 0x0f13:
> + /* movlpd */
> + case 0x660f13:
> + /* movhps */
> + case 0x0f17:
> + /* movhpd */
> + case 0x660f17:
> + /* movaps */
> + case 0x0f29:
> + /* movapd */
> + case 0x660f29:
> + /* pextrb */
> + case 0x660f3a14:
> + /* pextrw */
> + case 0x660f3a15:
> + /* pextrd pextrq */
> + case 0x660f3a16:
> + /* extractps */
> + case 0x660f3a17:
> + /* movdqa */
> + case 0x660f7f:
> + /* movdqu */
> + case 0xf30f7f:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + {
> + if (opcode == 0x0f13 || opcode == 0x660f13
> + || opcode == 0x0f17 || opcode == 0x660f17)
> + goto no_support;
> + ir.rm |= ir.rex_b;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM
> (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.rm);
> + }
> + else
> + {
> + switch (opcode)
> + {
> + case 0x660f3a14:
> + ir.ot = OT_BYTE;
> + break;
> + case 0x660f3a15:
> + ir.ot = OT_WORD;
> + break;
> + case 0x660f3a16:
> + ir.ot = OT_LONG;
> + break;
> + case 0x660f3a17:
> + ir.ot = OT_QUAD;
> + break;
> + default:
> + ir.ot = OT_DQUAD;
> + break;
> + }
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* movntps */
> + case 0x0f2b:
> + /* movntpd */
> + case 0x660f2b:
> + /* movntq */
> + case 0x0fe7:
> + /* movntdq */
> + case 0x660fe7:
> + if (ir.mod == 3)
> + goto no_support;
> + if (opcode == 0x0fe7)
> + ir.ot = OT_QUAD;
> + else
> + ir.ot = OT_DQUAD;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + break;
> +
> + /* cvttss2si */
> + case 0xf30f2c:
> + /* cvttsd2si */
> + case 0xf20f2c:
> + /* cvtss2si */
> + case 0xf30f2d:
> + /* cvtsd2si */
> + case 0xf20f2d:
> + /* crc32 */
> + case 0xf20f38f0:
> + /* crc32 */
> + case 0xf20f38f1:
> + /* movmskps */
> + case 0x0f50:
> + /* movmskpd */
> + case 0x660f50:
> + /* pextrw */
> + case 0x0fc5:
> + /* pextrw */
> + case 0x660fc5:
> + /* pmovmskb */
> + case 0x0fd7:
> + /* pmovmskb */
> + case 0x660fd7:
> + I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
> + break;
> +
> + /* pshufb */
> + case 0x0f3800:
> + /* phaddw */
> + case 0x0f3801:
> + /* phaddd */
> + case 0x0f3802:
> + /* phaddsw */
> + case 0x0f3803:
> + /* pmaddubsw */
> + case 0x0f3804:
> + /* phsubw */
> + case 0x0f3805:
> + /* phsubd */
> + case 0x0f3806:
> + /* phaddsw */
> + case 0x0f3807:
> + /* psignb */
> + case 0x0f3808:
> + /* psignw */
> + case 0x0f3809:
> + /* psignd */
> + case 0x0f380a:
> + /* pmulhrsw */
> + case 0x0f380b:
> + /* pabsb */
> + case 0x0f381c:
> + /* pabsw */
> + case 0x0f381d:
> + /* pabsd */
> + case 0x0f381e:
> + /* packusdw */
> + case 0x0f382b:
> + /* pmovzxbw */
> + case 0x0f3830:
> + /* pmovzxbd */
> + case 0x0f3831:
> + /* pmovzxbq */
> + case 0x0f3832:
> + /* pmovzxwd */
> + case 0x0f3833:
> + /* pmovzxwq */
> + case 0x0f3834:
> + /* pmovzxdq */
> + case 0x0f3835:
> + /* pcmpgtq */
> + case 0x0f3837:
> + /* pminsb */
> + case 0x0f3838:
> + /* pminsd */
> + case 0x0f3839:
> + /* pminuw */
> + case 0x0f383a:
> + /* pminud */
> + case 0x0f383b:
> + /* pmaxsb */
> + case 0x0f383c:
> + /* pmaxsd */
> + case 0x0f383d:
> + /* pmaxuw */
> + case 0x0f383e:
> + /* pmaxud */
> + case 0x0f383f:
> + /* pmulld */
> + case 0x0f3840:
> + /* phminposuw */
> + case 0x0f3841:
> + /* palignr */
> + case 0x0f3a0f:
> + /* punpcklbw */
> + case 0x0f60:
> + /* punpcklwd */
> + case 0x0f61:
> + /* punpckldq */
> + case 0x0f62:
> + /* packsswb */
> + case 0x0f63:
> + /* pcmpgtb */
> + case 0x0f64:
> + /* pcmpgtw */
> + case 0x0f65:
> + /* pcmpgtl */
> + case 0x0f66:
> + /* packuswb */
> + case 0x0f67:
> + /* punpckhbw */
> + case 0x0f68:
> + /* punpckhwd */
> + case 0x0f69:
> + /* punpckhdq */
> + case 0x0f6a:
> + /* packssdw */
> + case 0x0f6b:
> + /* movd */
> + case 0x0f6e:
> + /* movq */
> + case 0x0f6f:
> + /* pshufw */
> + case 0x0f70:
> + /* pcmpeqb */
> + case 0x0f74:
> + /* pcmpeqw */
> + case 0x0f75:
> + /* pcmpeql */
> + case 0x0f76:
> + /* pinsrw */
> + case 0x0fc4:
> + /* psrlw */
> + case 0x0fd1:
> + /* psrld */
> + case 0x0fd2:
> + /* psrlq */
> + case 0x0fd3:
> + /* paddq */
> + case 0x0fd4:
> + /* pmullw */
> + case 0x0fd5:
> + /* movdq2q */
> + case 0xf20fd6:
> + /* psubusb */
> + case 0x0fd8:
> + /* psubusw */
> + case 0x0fd9:
> + /* pminub */
> + case 0x0fda:
> + /* pand */
> + case 0x0fdb:
> + /* paddusb */
> + case 0x0fdc:
> + /* paddusw */
> + case 0x0fdd:
> + /* pmaxub */
> + case 0x0fde:
> + /* pandn */
> + case 0x0fdf:
> + /* pavgb */
> + case 0x0fe0:
> + /* psraw */
> + case 0x0fe1:
> + /* psrad */
> + case 0x0fe2:
> + /* pavgw */
> + case 0x0fe3:
> + /* pmulhuw */
> + case 0x0fe4:
> + /* pmulhw */
> + case 0x0fe5:
> + /* psubsb */
> + case 0x0fe8:
> + /* psubsw */
> + case 0x0fe9:
> + /* pminsw */
> + case 0x0fea:
> + /* por */
> + case 0x0feb:
> + /* paddsb */
> + case 0x0fec:
> + /* paddsw */
> + case 0x0fed:
> + /* pmaxsw */
> + case 0x0fee:
> + /* pxor */
> + case 0x0fef:
> + /* psllw */
> + case 0x0ff1:
> + /* pslld */
> + case 0x0ff2:
> + /* psllq */
> + case 0x0ff3:
> + /* pmuludq */
> + case 0x0ff4:
> + /* pmaddwd */
> + case 0x0ff5:
> + /* psadbw */
> + case 0x0ff6:
> + /* psubb */
> + case 0x0ff8:
> + /* psubw */
> + case 0x0ff9:
> + /* psubl */
> + case 0x0ffa:
> + /* psubq */
> + case 0x0ffb:
> + /* paddb */
> + case 0x0ffc:
> + /* paddw */
> + case 0x0ffd:
> + /* paddl */
> + case 0x0ffe:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_MM0_REGNUM (tdep) + ir.reg);
> + break;
> +
> + /* psllw */
> + case 0x0f71:
> + /* pslld */
> + case 0x0f72:
> + /* psllq */
> + case 0x0f73:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_MM0_REGNUM (tdep) + ir.rm);
> + break;
> +
> + /* psllw */
> + case 0x660f71:
> + /* pslld */
> + case 0x660f72:
> + /* psllq */
> + case 0x660f73:
> + if (i386_record_modrm (&ir))
> + return -1;
> + ir.rm |= ir.rex_b;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.rm);
> + break;
> +
> + /* movd */
> + case 0x0f7e:
> + /* movd */
> + case 0x660f7e:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
> + else
> + {
> + if (ir.dflag == 2)
> + ir.ot = OT_QUAD;
> + else
> + ir.ot = OT_LONG;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* movq */
> + case 0x0f7f:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + {
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_MM0_REGNUM (tdep) + ir.rm);
> + }
> + else
> + {
> + ir.ot = OT_QUAD;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* popcnt */
> + case 0xf30fb8:
> + if (i386_record_modrm (&ir))
> + return -1;
> + I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + break;
> +
> + /* movq */
> + case 0x660fd6:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + {
> + ir.rm |= ir.rex_b;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM
> (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.rm);
> + }
> + else
> + {
> + ir.ot = OT_QUAD;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* ptest */
> + case 0x660f3817:
> + /* ucomiss */
> + case 0x0f2e:
> + /* ucomisd */
> + case 0x660f2e:
> + /* comiss */
> + case 0x0f2f:
> + /* comisd */
> + case 0x660f2f:
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + break;
> +
> + /* maskmovq */
> + case 0x0ff7:
> + regcache_raw_read_unsigned (ir.regcache,
> + ir.regmap[X86_RECORD_REDI_REGNUM],
> + &tmpulongest);
> + if (record_arch_list_add_mem (tmpulongest, 64))
> + return -1;
> + break;
> +
> + /* maskmovdqu */
> + case 0x660ff7:
> + regcache_raw_read_unsigned (ir.regcache,
> + ir.regmap[X86_RECORD_REDI_REGNUM],
> + &tmpulongest);
> + if (record_arch_list_add_mem (tmpulongest, 128))
> + return -1;
> + break;
> +
> + default:
> + goto no_support;
> + break;
> + }
> + break;
>
> default:
> - if (opcode > 0xff)
> - ir.addr -= 2;
> - else
> - ir.addr -= 1;
> goto no_support;
> break;
> }
> @@ -5370,8 +6554,9 @@ reswitch:
>
> no_support:
> printf_unfiltered (_("Process record doesn't support instruction 0x%02x "
> - "at address %s.\n"),
> - (unsigned int) (opcode), paddress (gdbarch, ir.addr));
> + "at address %s.\n"),
> + (unsigned int) (opcode),
> + paddress (gdbarch, ir.orig_addr));
> return -1;
> }
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-10 19:52 ` Michael Snyder
@ 2009-12-11 15:00 ` Hui Zhu
2009-12-13 4:28 ` Hui Zhu
0 siblings, 1 reply; 39+ messages in thread
From: Hui Zhu @ 2009-12-11 15:00 UTC (permalink / raw)
To: Michael Snyder; +Cc: gdb-patches ml, Mark Kettenis
OK.
Thanks,
Hui
On Fri, Dec 11, 2009 at 03:51, Michael Snyder <msnyder@vmware.com> wrote:
> Hui Zhu wrote:
>>
>> Hi guys,
>>
>> This patch make prec support x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4.
>> Please help me review it.
>
> Sounds like these are close to acceptance.
> Hui, can we get some testsuites, please?
> You can use Oza's tests for the 387 as a model for starting.
>
> Michael
>
>
>> 2009-12-07 Hui Zhu <teawater@gmail.com>
>>
>> * i386-tdep.c (OT_DQUAD): New enum.
>> (i386_process_record): Add code for MMX, 3DNow!, SSE, SSE2,
>> SSE3, SSSE3 and SSE4.
>>
>> ---
>> i386-tdep.c | 1217
>> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
>> 1 file changed, 1201 insertions(+), 16 deletions(-)
>>
>> --- a/i386-tdep.c
>> +++ b/i386-tdep.c
>> @@ -2848,6 +2848,7 @@ enum
>> OT_WORD,
>> OT_LONG,
>> OT_QUAD,
>> + OT_DQUAD,
>> };
>>
>> /* i386 arith/logic operations */
>> @@ -3217,6 +3218,7 @@ i386_process_record (struct gdbarch *gdb
>> int rex = 0;
>> uint8_t rex_w = -1;
>> uint8_t rex_r = 0;
>> + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
>>
>> memset (&ir, 0, sizeof (struct i386_record_s));
>> ir.regcache = regcache;
>> @@ -3226,7 +3228,7 @@ i386_process_record (struct gdbarch *gdb
>> ir.dflag = 1;
>> ir.override = -1;
>> ir.popl_esp_hack = 0;
>> - ir.regmap = gdbarch_tdep (gdbarch)->record_regmap;
>> + ir.regmap = tdep->record_regmap;
>> ir.gdbarch = gdbarch;
>>
>> if (record_debug > 1)
>> @@ -3344,7 +3346,7 @@ reswitch:
>> return -1;
>> }
>> ir.addr++;
>> - opcode = (uint16_t) tmpu8 | 0x0f00;
>> + opcode = (uint32_t) tmpu8 | 0x0f00;
>> goto reswitch;
>> break;
>>
>> @@ -4868,7 +4870,7 @@ reswitch:
>> }
>> ir.addr++;
>> if (tmpu8 != 0x80
>> - || gdbarch_tdep (gdbarch)->i386_intx80_record == NULL)
>> + || tdep->i386_intx80_record == NULL)
>> {
>> printf_unfiltered (_("Process record doesn't support "
>> "instruction int 0x%02x.\n"),
>> @@ -4876,7 +4878,7 @@ reswitch:
>> ir.addr -= 2;
>> goto no_support;
>> }
>> - ret = gdbarch_tdep (gdbarch)->i386_intx80_record (ir.regcache);
>> + ret = tdep->i386_intx80_record (ir.regcache);
>> if (ret)
>> return ret;
>> }
>> @@ -4973,14 +4975,14 @@ reswitch:
>> ir.addr -= 2;
>> goto no_support;
>> }
>> - if (gdbarch_tdep (gdbarch)->i386_sysenter_record == NULL)
>> + if (tdep->i386_sysenter_record == NULL)
>> {
>> printf_unfiltered (_("Process record doesn't support "
>> "instruction sysenter.\n"));
>> ir.addr -= 2;
>> goto no_support;
>> }
>> - ret = gdbarch_tdep (gdbarch)->i386_sysenter_record (ir.regcache);
>> + ret = tdep->i386_sysenter_record (ir.regcache);
>> if (ret)
>> return ret;
>> }
>> @@ -4998,14 +5000,14 @@ reswitch:
>> case 0x0f05:
>> {
>> int ret;
>> - if (gdbarch_tdep (gdbarch)->i386_syscall_record == NULL)
>> + if (tdep->i386_syscall_record == NULL)
>> {
>> printf_unfiltered (_("Process record doesn't support "
>> "instruction syscall.\n"));
>> ir.addr -= 2;
>> goto no_support;
>> }
>> - ret = gdbarch_tdep (gdbarch)->i386_syscall_record (ir.regcache);
>> + ret = tdep->i386_syscall_record (ir.regcache);
>> if (ret)
>> return ret;
>> }
>> @@ -5349,14 +5351,1196 @@ reswitch:
>> I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
>> break;
>>
>> - /* MMX/SSE/SSE2/PNI support */
>> - /* XXX */
>> + /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
>> + /* 3DNow! prefetch */
>> + case 0x0f0d:
>> + break;
>> +
>> + /* 3DNow! femms */
>> + case 0x0f0e:
>> + /* emms */
>> + case 0x0f77:
>> + if (i386_fpc_regnum_p (gdbarch, I387_FTAG_REGNUM(tdep)))
>> + goto no_support;
>> + record_arch_list_add_reg (ir.regcache, I387_FTAG_REGNUM(tdep));
>> + break;
>> +
>> + /* 3DNow! data */
>> + case 0x0f0f:
>> + if (i386_record_modrm (&ir))
>> + return -1;
>> + if (target_read_memory (ir.addr, &tmpu8, 1))
>> + {
>> + if (record_debug)
>> + printf_unfiltered (_("Process record: error reading memory at
>> "
>> + "addr %s len = 1.\n"),
>> + paddress (gdbarch, ir.addr));
>> + return -1;
>> + }
>> + ir.addr++;
>> + switch (tmpu8)
>> + {
>> + /* 3DNow! pi2fw */
>> + case 0x0c:
>> + /* 3DNow! pi2fd */
>> + case 0x0d:
>> + /* 3DNow! pf2iw */
>> + case 0x1c:
>> + /* 3DNow! pf2id */
>> + case 0x1d:
>> + /* 3DNow! pfnacc */
>> + case 0x8a:
>> + /* 3DNow! pfpnacc */
>> + case 0x8e:
>> + /* 3DNow! pfcmpge */
>> + case 0x90:
>> + /* 3DNow! pfmin */
>> + case 0x94:
>> + /* 3DNow! pfrcp */
>> + case 0x96:
>> + /* 3DNow! pfrsqrt */
>> + case 0x97:
>> + /* 3DNow! pfsub */
>> + case 0x9a:
>> + /* 3DNow! pfadd */
>> + case 0x9e:
>> + /* 3DNow! pfcmpgt */
>> + case 0xa0:
>> + /* 3DNow! pfmax */
>> + case 0xa4:
>> + /* 3DNow! pfrcpit1 */
>> + case 0xa6:
>> + /* 3DNow! pfrsqit1 */
>> + case 0xa7:
>> + /* 3DNow! pfsubr */
>> + case 0xaa:
>> + /* 3DNow! pfacc */
>> + case 0xae:
>> + /* 3DNow! pfcmpeq */
>> + case 0xb0:
>> + /* 3DNow! pfmul */
>> + case 0xb4:
>> + /* 3DNow! pfrcpit2 */
>> + case 0xb6:
>> + /* 3DNow! pmulhrw */
>> + case 0xb7:
>> + /* 3DNow! pswapd */
>> + case 0xbb:
>> + /* 3DNow! pavgusb */
>> + case 0xbf:
>> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) +
>> ir.reg))
>> + goto no_support_3dnow_data;
>> + record_arch_list_add_reg (ir.regcache, ir.reg);
>> + break;
>> +
>> + default:
>> +no_support_3dnow_data:
>> + opcode = (opcode << 8) | tmpu8;
>> + goto no_support;
>> + break;
>> + }
>> + break;
>> +
>> + /* rsm */
>> + case 0x0faa:
>> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
>> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
>> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
>> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
>> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
>> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
>> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
>> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
>> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
>> + break;
>> +
>> + case 0x0fae:
>> + if (i386_record_modrm (&ir))
>> + return -1;
>> + switch(ir.reg)
>> + {
>> + /* fxsave */
>> + case 0:
>> + {
>> + uint64_t tmpu64;
>> +
>> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
>> + if (i386_record_lea_modrm_addr (&ir, &tmpu64))
>> + return -1;
>> + if (record_arch_list_add_mem (tmpu64, 512))
>> + return -1;
>> + }
>> + break;
>> +
>> + /* fxrstor */
>> + case 1:
>> + {
>> + int i;
>> +
>> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
>> +
>> + for (i = I387_MM0_REGNUM (tdep);
>> + i386_mmx_regnum_p (gdbarch, i); i++)
>> + record_arch_list_add_reg (ir.regcache, i);
>> +
>> + for (i = I387_XMM0_REGNUM (tdep);
>> + i386_sse_regnum_p (gdbarch, i); i++)
>> + record_arch_list_add_reg (ir.regcache, i);
>> +
>> + if (i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
>> + record_arch_list_add_reg (ir.regcache,
>> I387_MXCSR_REGNUM(tdep));
>> +
>> + for (i = I387_ST0_REGNUM (tdep);
>> + i386_fp_regnum_p (gdbarch, i); i++)
>> + record_arch_list_add_reg (ir.regcache, i);
>> +
>> + for (i = I387_FCTRL_REGNUM (tdep);
>> + i386_fpc_regnum_p (gdbarch, i); i++)
>> + record_arch_list_add_reg (ir.regcache, i);
>> + }
>> + break;
>> +
>> + /* ldmxcsr */
>> + case 2:
>> + if (!i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
>> + goto no_support;
>> + record_arch_list_add_reg (ir.regcache,
>> I387_MXCSR_REGNUM(tdep));
>> + break;
>> +
>> + /* stmxcsr */
>> + case 3:
>> + ir.ot = OT_LONG;
>> + if (i386_record_lea_modrm (&ir))
>> + return -1;
>> + break;
>> +
>> + /* lfence */
>> + case 5:
>> + /* mfence */
>> + case 6:
>> + /* sfence clflush */
>> + case 7:
>> + break;
>> +
>> + default:
>> + opcode = (opcode << 8) | ir.modrm;
>> + goto no_support;
>> + break;
>> + }
>> + break;
>> +
>> + /* movnti */
>> + case 0x0fc3:
>> + ir.ot = (ir.dflag == 2) ? OT_QUAD : OT_LONG;
>> + if (i386_record_modrm (&ir))
>> + return -1;
>> + if (ir.mod == 3)
>> + goto no_support;
>> + ir.reg |= rex_r;
>> + if (i386_record_lea_modrm (&ir))
>> + return -1;
>> + break;
>> +
>> + /* Add prefix to opcode. */
>> + case 0x0f10:
>> + case 0x0f11:
>> + case 0x0f12:
>> + case 0x0f13:
>> + case 0x0f14:
>> + case 0x0f16:
>> + case 0x0f17:
>> + case 0x0f28:
>> + case 0x0f29:
>> + case 0x0f2a:
>> + case 0x0f2b:
>> + case 0x0f2c:
>> + case 0x0f2d:
>> + case 0x0f2e:
>> + case 0x0f2f:
>> + case 0x0f38:
>> + case 0x0f39:
>> + case 0x0f3a:
>> + case 0x0f50:
>> + case 0x0f51:
>> + case 0x0f52:
>> + case 0x0f53:
>> + case 0x0f54:
>> + case 0x0f55:
>> + case 0x0f56:
>> + case 0x0f57:
>> + case 0x0f58:
>> + case 0x0f59:
>> + case 0x0f5a:
>> + case 0x0f5b:
>> + case 0x0f5c:
>> + case 0x0f5d:
>> + case 0x0f5e:
>> + case 0x0f5f:
>> + case 0x0f60:
>> + case 0x0f61:
>> + case 0x0f62:
>> + case 0x0f63:
>> + case 0x0f64:
>> + case 0x0f65:
>> + case 0x0f66:
>> + case 0x0f67:
>> + case 0x0f68:
>> + case 0x0f69:
>> + case 0x0f6a:
>> + case 0x0f6b:
>> + case 0x0f6c:
>> + case 0x0f6d:
>> + case 0x0f6e:
>> + case 0x0f6f:
>> + case 0x0f70:
>> + case 0x0f71:
>> + case 0x0f72:
>> + case 0x0f73:
>> + case 0x0f74:
>> + case 0x0f75:
>> + case 0x0f76:
>> + case 0x0f7c:
>> + case 0x0f7d:
>> + case 0x0f7e:
>> + case 0x0f7f:
>> + case 0x0fb8:
>> + case 0x0fc2:
>> + case 0x0fc4:
>> + case 0x0fc5:
>> + case 0x0fc6:
>> + case 0x0fd0:
>> + case 0x0fd1:
>> + case 0x0fd2:
>> + case 0x0fd3:
>> + case 0x0fd4:
>> + case 0x0fd5:
>> + case 0x0fd6:
>> + case 0x0fd7:
>> + case 0x0fd8:
>> + case 0x0fd9:
>> + case 0x0fda:
>> + case 0x0fdb:
>> + case 0x0fdc:
>> + case 0x0fdd:
>> + case 0x0fde:
>> + case 0x0fdf:
>> + case 0x0fe0:
>> + case 0x0fe1:
>> + case 0x0fe2:
>> + case 0x0fe3:
>> + case 0x0fe4:
>> + case 0x0fe5:
>> + case 0x0fe6:
>> + case 0x0fe7:
>> + case 0x0fe8:
>> + case 0x0fe9:
>> + case 0x0fea:
>> + case 0x0feb:
>> + case 0x0fec:
>> + case 0x0fed:
>> + case 0x0fee:
>> + case 0x0fef:
>> + case 0x0ff0:
>> + case 0x0ff1:
>> + case 0x0ff2:
>> + case 0x0ff3:
>> + case 0x0ff4:
>> + case 0x0ff5:
>> + case 0x0ff6:
>> + case 0x0ff7:
>> + case 0x0ff8:
>> + case 0x0ff9:
>> + case 0x0ffa:
>> + case 0x0ffb:
>> + case 0x0ffc:
>> + case 0x0ffd:
>> + case 0x0ffe:
>> + switch (prefixes)
>> + {
>> + case PREFIX_REPNZ:
>> + opcode |= 0xf20000;
>> + break;
>> + case PREFIX_DATA:
>> + opcode |= 0x660000;
>> + break;
>> + case PREFIX_REPZ:
>> + opcode |= 0xf30000;
>> + break;
>> + }
>> +reswitch_prefix_add:
>> + switch (opcode)
>> + {
>> + case 0x0f38:
>> + case 0x660f38:
>> + case 0xf20f38:
>> + case 0x0f3a:
>> + case 0x660f3a:
>> + if (target_read_memory (ir.addr, &tmpu8, 1))
>> + {
>> + if (record_debug)
>> + printf_unfiltered (_("Process record: error reading memory
>> at "
>> + "addr %s len = 1.\n"),
>> + paddress (gdbarch, ir.addr));
>> + return -1;
>> + }
>> + ir.addr++;
>> + opcode = (uint32_t) tmpu8 | opcode << 4;
>> + goto reswitch_prefix_add;
>> + break;
>> +
>> + /* movups */
>> + case 0x0f10:
>> + /* movupd */
>> + case 0x660f10:
>> + /* movss */
>> + case 0xf30f10:
>> + /* movsd */
>> + case 0xf20f10:
>> + /* movlps */
>> + case 0x0f12:
>> + /* movlpd */
>> + case 0x660f12:
>> + /* movsldup */
>> + case 0xf30f12:
>> + /* movddup */
>> + case 0xf20f12:
>> + /* unpcklps */
>> + case 0x0f14:
>> + /* unpcklpd */
>> + case 0x660f14:
>> + /* unpckhps */
>> + case 0x0f15:
>> + /* unpckhpd */
>> + case 0x660f15:
>> + /* movhps */
>> + case 0x0f16:
>> + /* movhpd */
>> + case 0x660f16:
>> + /* movshdup */
>> + case 0xf30f16:
>> + /* movaps */
>> + case 0x0f28:
>> + /* movapd */
>> + case 0x660f28:
>> + /* cvtpi2ps */
>> + case 0x0f2a:
>> + /* cvtpi2pd */
>> + case 0x660f2a:
>> + /* cvtsi2ss */
>> + case 0xf30f2a:
>> + /* cvtsi2sd */
>> + case 0xf20f2a:
>> + /* cvttps2pi */
>> + case 0x0f2c:
>> + /* cvttpd2pi */
>> + case 0x660f2c:
>> + /* cvtps2pi */
>> + case 0x0f2d:
>> + /* cvtpd2pi */
>> + case 0x660f2d:
>> + /* pshufb */
>> + case 0x660f3800:
>> + /* phaddw */
>> + case 0x660f3801:
>> + /* phaddd */
>> + case 0x660f3802:
>> + /* phaddsw */
>> + case 0x660f3803:
>> + /* pmaddubsw */
>> + case 0x660f3804:
>> + /* phsubw */
>> + case 0x660f3805:
>> + /* phsubd */
>> + case 0x660f3806:
>> + /* phaddsw */
>> + case 0x660f3807:
>> + /* psignb */
>> + case 0x660f3808:
>> + /* psignw */
>> + case 0x660f3809:
>> + /* psignd */
>> + case 0x660f380a:
>> + /* pmulhrsw */
>> + case 0x660f380b:
>> + /* pblendvb */
>> + case 0x660f3810:
>> + /* blendvps */
>> + case 0x660f3814:
>> + /* blendvpd */
>> + case 0x660f3815:
>> + /* pabsb */
>> + case 0x660f381c:
>> + /* pabsw */
>> + case 0x660f381d:
>> + /* pabsd */
>> + case 0x660f381e:
>> + /* pmovsxbw */
>> + case 0x660f3820:
>> + /* pmovsxbd */
>> + case 0x660f3821:
>> + /* pmovsxbq */
>> + case 0x660f3822:
>> + /* pmovsxwd */
>> + case 0x660f3823:
>> + /* pmovsxwq */
>> + case 0x660f3824:
>> + /* pmovsxdq */
>> + case 0x660f3825:
>> + /* pmuldq */
>> + case 0x660f3828:
>> + /* pcmpeqq */
>> + case 0x660f3829:
>> + /* movntdqa */
>> + case 0x660f382a:
>> + /* roundps */
>> + case 0x660f3a08:
>> + /* roundpd */
>> + case 0x660f3a09:
>> + /* roundss */
>> + case 0x660f3a0a:
>> + /* roundsd */
>> + case 0x660f3a0b:
>> + /* blendps */
>> + case 0x660f3a0c:
>> + /* blendpd */
>> + case 0x660f3a0d:
>> + /* pblendw */
>> + case 0x660f3a0e:
>> + /* palignr */
>> + case 0x660f3a0f:
>> + /* pinsrb */
>> + case 0x660f3a20:
>> + /* insertps */
>> + case 0x660f3a21:
>> + /* pinsrd pinsrq */
>> + case 0x660f3a22:
>> + /* dpps */
>> + case 0x660f3a40:
>> + /* dppd */
>> + case 0x660f3a41:
>> + /* mpsadbw */
>> + case 0x660f3a42:
>> + /* pcmpestrm */
>> + case 0x660f3a60:
>> + /* pcmpestri */
>> + case 0x660f3a61:
>> + /* pcmpistrm */
>> + case 0x660f3a62:
>> + /* pcmpistri */
>> + case 0x660f3a63:
>> + /* sqrtps */
>> + case 0x0f51:
>> + /* sqrtpd */
>> + case 0x660f51:
>> + /* sqrtsd */
>> + case 0xf20f51:
>> + /* sqrtss */
>> + case 0xf30f51:
>> + /* rsqrtps */
>> + case 0x0f52:
>> + /* rsqrtss */
>> + case 0xf30f52:
>> + /* rcpps */
>> + case 0x0f53:
>> + /* rcpss */
>> + case 0xf30f53:
>> + /* andps */
>> + case 0x0f54:
>> + /* andpd */
>> + case 0x660f54:
>> + /* andnps */
>> + case 0x0f55:
>> + /* andnpd */
>> + case 0x660f55:
>> + /* orps */
>> + case 0x0f56:
>> + /* orpd */
>> + case 0x660f56:
>> + /* xorps */
>> + case 0x0f57:
>> + /* xorpd */
>> + case 0x660f57:
>> + /* addps */
>> + case 0x0f58:
>> + /* addpd */
>> + case 0x660f58:
>> + /* addsd */
>> + case 0xf20f58:
>> + /* addss */
>> + case 0xf30f58:
>> + /* mulps */
>> + case 0x0f59:
>> + /* mulpd */
>> + case 0x660f59:
>> + /* mulsd */
>> + case 0xf20f59:
>> + /* mulss */
>> + case 0xf30f59:
>> + /* cvtps2pd */
>> + case 0x0f5a:
>> + /* cvtpd2ps */
>> + case 0x660f5a:
>> + /* cvtsd2ss */
>> + case 0xf20f5a:
>> + /* cvtss2sd */
>> + case 0xf30f5a:
>> + /* cvtdq2ps */
>> + case 0x0f5b:
>> + /* cvtps2dq */
>> + case 0x660f5b:
>> + /* cvttps2dq */
>> + case 0xf30f5b:
>> + /* subps */
>> + case 0x0f5c:
>> + /* subpd */
>> + case 0x660f5c:
>> + /* subsd */
>> + case 0xf20f5c:
>> + /* subss */
>> + case 0xf30f5c:
>> + /* minps */
>> + case 0x0f5d:
>> + /* minpd */
>> + case 0x660f5d:
>> + /* minsd */
>> + case 0xf20f5d:
>> + /* minss */
>> + case 0xf30f5d:
>> + /* divps */
>> + case 0x0f5e:
>> + /* divpd */
>> + case 0x660f5e:
>> + /* divsd */
>> + case 0xf20f5e:
>> + /* divss */
>> + case 0xf30f5e:
>> + /* maxps */
>> + case 0x0f5f:
>> + /* maxpd */
>> + case 0x660f5f:
>> + /* maxsd */
>> + case 0xf20f5f:
>> + /* maxss */
>> + case 0xf30f5f:
>> + /* punpcklbw */
>> + case 0x660f60:
>> + /* punpcklwd */
>> + case 0x660f61:
>> + /* punpckldq */
>> + case 0x660f62:
>> + /* packsswb */
>> + case 0x660f63:
>> + /* pcmpgtb */
>> + case 0x660f64:
>> + /* pcmpgtw */
>> + case 0x660f65:
>> + /* pcmpgtl */
>> + case 0x660f66:
>> + /* packuswb */
>> + case 0x660f67:
>> + /* punpckhbw */
>> + case 0x660f68:
>> + /* punpckhwd */
>> + case 0x660f69:
>> + /* punpckhdq */
>> + case 0x660f6a:
>> + /* packssdw */
>> + case 0x660f6b:
>> + /* punpcklqdq */
>> + case 0x660f6c:
>> + /* punpckhqdq */
>> + case 0x660f6d:
>> + /* movd */
>> + case 0x660f6e:
>> + /* movdqa */
>> + case 0x660f6f:
>> + /* movdqu */
>> + case 0xf30f6f:
>> + /* pshufd */
>> + case 0x660f70:
>> + /* pshuflw */
>> + case 0xf20f70:
>> + /* pshufhw */
>> + case 0xf30f70:
>> + /* pcmpeqb */
>> + case 0x660f74:
>> + /* pcmpeqw */
>> + case 0x660f75:
>> + /* pcmpeql */
>> + case 0x660f76:
>> + /* haddpd */
>> + case 0x660f7c:
>> + /* haddps */
>> + case 0xf20f7c:
>> + /* hsubpd */
>> + case 0x660f7d:
>> + /* hsubps */
>> + case 0xf20f7d:
>> + /* movq */
>> + case 0xf30f7e:
>> + /* cmpps */
>> + case 0x0fc2:
>> + /* cmppd */
>> + case 0x660fc2:
>> + /* cmpsd */
>> + case 0xf20fc2:
>> + /* cmpss */
>> + case 0xf30fc2:
>> + /* pinsrw */
>> + case 0x660fc4:
>> + /* shufps */
>> + case 0x0fc6:
>> + /* shufpd */
>> + case 0x660fc6:
>> + /* addsubpd */
>> + case 0x660fd0:
>> + /* addsubps */
>> + case 0xf20fd0:
>> + /* psrlw */
>> + case 0x660fd1:
>> + /* psrld */
>> + case 0x660fd2:
>> + /* psrlq */
>> + case 0x660fd3:
>> + /* paddq */
>> + case 0x660fd4:
>> + /* pmullw */
>> + case 0x660fd5:
>> + /* movq2dq */
>> + case 0xf30fd6:
>> + /* psubusb */
>> + case 0x660fd8:
>> + /* psubusw */
>> + case 0x660fd9:
>> + /* pminub */
>> + case 0x660fda:
>> + /* pand */
>> + case 0x660fdb:
>> + /* paddusb */
>> + case 0x660fdc:
>> + /* paddusw */
>> + case 0x660fdd:
>> + /* pmaxub */
>> + case 0x660fde:
>> + /* pandn */
>> + case 0x660fdf:
>> + /* pavgb */
>> + case 0x660fe0:
>> + /* psraw */
>> + case 0x660fe1:
>> + /* psrad */
>> + case 0x660fe2:
>> + /* pavgw */
>> + case 0x660fe3:
>> + /* pmulhuw */
>> + case 0x660fe4:
>> + /* pmulhw */
>> + case 0x660fe5:
>> + /* cvttpd2dq */
>> + case 0x660fe6:
>> + /* cvtpd2dq */
>> + case 0xf20fe6:
>> + /* cvtdq2pd */
>> + case 0xf30fe6:
>> + /* psubsb */
>> + case 0x660fe8:
>> + /* psubsw */
>> + case 0x660fe9:
>> + /* pminsw */
>> + case 0x660fea:
>> + /* por */
>> + case 0x660feb:
>> + /* paddsb */
>> + case 0x660fec:
>> + /* paddsw */
>> + case 0x660fed:
>> + /* pmaxsw */
>> + case 0x660fee:
>> + /* pxor */
>> + case 0x660fef:
>> + /* lddqu */
>> + case 0x660ff0:
>> + /* psllw */
>> + case 0x660ff1:
>> + /* pslld */
>> + case 0x660ff2:
>> + /* psllq */
>> + case 0x660ff3:
>> + /* pmuludq */
>> + case 0x660ff4:
>> + /* pmaddwd */
>> + case 0x660ff5:
>> + /* psadbw */
>> + case 0x660ff6:
>> + /* psubb */
>> + case 0x660ff8:
>> + /* psubw */
>> + case 0x660ff9:
>> + /* psubl */
>> + case 0x660ffa:
>> + /* psubq */
>> + case 0x660ffb:
>> + /* paddb */
>> + case 0x660ffc:
>> + /* paddw */
>> + case 0x660ffd:
>> + /* paddl */
>> + case 0x660ffe:
>> + if (i386_record_modrm (&ir))
>> + return -1;
>> + ir.reg |= rex_r;
>> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) +
>> ir.reg))
>> + goto no_support;
>> + record_arch_list_add_reg (ir.regcache,
>> + I387_XMM0_REGNUM (tdep) + ir.reg);
>> + if ((opcode & 0xfffffffc) == 0x660f3a60)
>> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
>> + break;
>> +
>> + /* movups */
>> + case 0x0f11:
>> + /* movupd */
>> + case 0x660f11:
>> + /* movss */
>> + case 0xf30f11:
>> + /* movsd */
>> + case 0xf20f11:
>> + /* movlps */
>> + case 0x0f13:
>> + /* movlpd */
>> + case 0x660f13:
>> + /* movhps */
>> + case 0x0f17:
>> + /* movhpd */
>> + case 0x660f17:
>> + /* movaps */
>> + case 0x0f29:
>> + /* movapd */
>> + case 0x660f29:
>> + /* pextrb */
>> + case 0x660f3a14:
>> + /* pextrw */
>> + case 0x660f3a15:
>> + /* pextrd pextrq */
>> + case 0x660f3a16:
>> + /* extractps */
>> + case 0x660f3a17:
>> + /* movdqa */
>> + case 0x660f7f:
>> + /* movdqu */
>> + case 0xf30f7f:
>> + if (i386_record_modrm (&ir))
>> + return -1;
>> + if (ir.mod == 3)
>> + {
>> + if (opcode == 0x0f13 || opcode == 0x660f13
>> + || opcode == 0x0f17 || opcode == 0x660f17)
>> + goto no_support;
>> + ir.rm |= ir.rex_b;
>> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM
>> (tdep) + ir.rm))
>> + goto no_support;
>> + record_arch_list_add_reg (ir.regcache,
>> + I387_XMM0_REGNUM (tdep) + ir.rm);
>> + }
>> + else
>> + {
>> + switch (opcode)
>> + {
>> + case 0x660f3a14:
>> + ir.ot = OT_BYTE;
>> + break;
>> + case 0x660f3a15:
>> + ir.ot = OT_WORD;
>> + break;
>> + case 0x660f3a16:
>> + ir.ot = OT_LONG;
>> + break;
>> + case 0x660f3a17:
>> + ir.ot = OT_QUAD;
>> + break;
>> + default:
>> + ir.ot = OT_DQUAD;
>> + break;
>> + }
>> + if (i386_record_lea_modrm (&ir))
>> + return -1;
>> + }
>> + break;
>> +
>> + /* movntps */
>> + case 0x0f2b:
>> + /* movntpd */
>> + case 0x660f2b:
>> + /* movntq */
>> + case 0x0fe7:
>> + /* movntdq */
>> + case 0x660fe7:
>> + if (ir.mod == 3)
>> + goto no_support;
>> + if (opcode == 0x0fe7)
>> + ir.ot = OT_QUAD;
>> + else
>> + ir.ot = OT_DQUAD;
>> + if (i386_record_lea_modrm (&ir))
>> + return -1;
>> + break;
>> +
>> + /* cvttss2si */
>> + case 0xf30f2c:
>> + /* cvttsd2si */
>> + case 0xf20f2c:
>> + /* cvtss2si */
>> + case 0xf30f2d:
>> + /* cvtsd2si */
>> + case 0xf20f2d:
>> + /* crc32 */
>> + case 0xf20f38f0:
>> + /* crc32 */
>> + case 0xf20f38f1:
>> + /* movmskps */
>> + case 0x0f50:
>> + /* movmskpd */
>> + case 0x660f50:
>> + /* pextrw */
>> + case 0x0fc5:
>> + /* pextrw */
>> + case 0x660fc5:
>> + /* pmovmskb */
>> + case 0x0fd7:
>> + /* pmovmskb */
>> + case 0x660fd7:
>> + I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
>> + break;
>> +
>> + /* pshufb */
>> + case 0x0f3800:
>> + /* phaddw */
>> + case 0x0f3801:
>> + /* phaddd */
>> + case 0x0f3802:
>> + /* phaddsw */
>> + case 0x0f3803:
>> + /* pmaddubsw */
>> + case 0x0f3804:
>> + /* phsubw */
>> + case 0x0f3805:
>> + /* phsubd */
>> + case 0x0f3806:
>> + /* phaddsw */
>> + case 0x0f3807:
>> + /* psignb */
>> + case 0x0f3808:
>> + /* psignw */
>> + case 0x0f3809:
>> + /* psignd */
>> + case 0x0f380a:
>> + /* pmulhrsw */
>> + case 0x0f380b:
>> + /* pabsb */
>> + case 0x0f381c:
>> + /* pabsw */
>> + case 0x0f381d:
>> + /* pabsd */
>> + case 0x0f381e:
>> + /* packusdw */
>> + case 0x0f382b:
>> + /* pmovzxbw */
>> + case 0x0f3830:
>> + /* pmovzxbd */
>> + case 0x0f3831:
>> + /* pmovzxbq */
>> + case 0x0f3832:
>> + /* pmovzxwd */
>> + case 0x0f3833:
>> + /* pmovzxwq */
>> + case 0x0f3834:
>> + /* pmovzxdq */
>> + case 0x0f3835:
>> + /* pcmpgtq */
>> + case 0x0f3837:
>> + /* pminsb */
>> + case 0x0f3838:
>> + /* pminsd */
>> + case 0x0f3839:
>> + /* pminuw */
>> + case 0x0f383a:
>> + /* pminud */
>> + case 0x0f383b:
>> + /* pmaxsb */
>> + case 0x0f383c:
>> + /* pmaxsd */
>> + case 0x0f383d:
>> + /* pmaxuw */
>> + case 0x0f383e:
>> + /* pmaxud */
>> + case 0x0f383f:
>> + /* pmulld */
>> + case 0x0f3840:
>> + /* phminposuw */
>> + case 0x0f3841:
>> + /* palignr */
>> + case 0x0f3a0f:
>> + /* punpcklbw */
>> + case 0x0f60:
>> + /* punpcklwd */
>> + case 0x0f61:
>> + /* punpckldq */
>> + case 0x0f62:
>> + /* packsswb */
>> + case 0x0f63:
>> + /* pcmpgtb */
>> + case 0x0f64:
>> + /* pcmpgtw */
>> + case 0x0f65:
>> + /* pcmpgtl */
>> + case 0x0f66:
>> + /* packuswb */
>> + case 0x0f67:
>> + /* punpckhbw */
>> + case 0x0f68:
>> + /* punpckhwd */
>> + case 0x0f69:
>> + /* punpckhdq */
>> + case 0x0f6a:
>> + /* packssdw */
>> + case 0x0f6b:
>> + /* movd */
>> + case 0x0f6e:
>> + /* movq */
>> + case 0x0f6f:
>> + /* pshufw */
>> + case 0x0f70:
>> + /* pcmpeqb */
>> + case 0x0f74:
>> + /* pcmpeqw */
>> + case 0x0f75:
>> + /* pcmpeql */
>> + case 0x0f76:
>> + /* pinsrw */
>> + case 0x0fc4:
>> + /* psrlw */
>> + case 0x0fd1:
>> + /* psrld */
>> + case 0x0fd2:
>> + /* psrlq */
>> + case 0x0fd3:
>> + /* paddq */
>> + case 0x0fd4:
>> + /* pmullw */
>> + case 0x0fd5:
>> + /* movdq2q */
>> + case 0xf20fd6:
>> + /* psubusb */
>> + case 0x0fd8:
>> + /* psubusw */
>> + case 0x0fd9:
>> + /* pminub */
>> + case 0x0fda:
>> + /* pand */
>> + case 0x0fdb:
>> + /* paddusb */
>> + case 0x0fdc:
>> + /* paddusw */
>> + case 0x0fdd:
>> + /* pmaxub */
>> + case 0x0fde:
>> + /* pandn */
>> + case 0x0fdf:
>> + /* pavgb */
>> + case 0x0fe0:
>> + /* psraw */
>> + case 0x0fe1:
>> + /* psrad */
>> + case 0x0fe2:
>> + /* pavgw */
>> + case 0x0fe3:
>> + /* pmulhuw */
>> + case 0x0fe4:
>> + /* pmulhw */
>> + case 0x0fe5:
>> + /* psubsb */
>> + case 0x0fe8:
>> + /* psubsw */
>> + case 0x0fe9:
>> + /* pminsw */
>> + case 0x0fea:
>> + /* por */
>> + case 0x0feb:
>> + /* paddsb */
>> + case 0x0fec:
>> + /* paddsw */
>> + case 0x0fed:
>> + /* pmaxsw */
>> + case 0x0fee:
>> + /* pxor */
>> + case 0x0fef:
>> + /* psllw */
>> + case 0x0ff1:
>> + /* pslld */
>> + case 0x0ff2:
>> + /* psllq */
>> + case 0x0ff3:
>> + /* pmuludq */
>> + case 0x0ff4:
>> + /* pmaddwd */
>> + case 0x0ff5:
>> + /* psadbw */
>> + case 0x0ff6:
>> + /* psubb */
>> + case 0x0ff8:
>> + /* psubw */
>> + case 0x0ff9:
>> + /* psubl */
>> + case 0x0ffa:
>> + /* psubq */
>> + case 0x0ffb:
>> + /* paddb */
>> + case 0x0ffc:
>> + /* paddw */
>> + case 0x0ffd:
>> + /* paddl */
>> + case 0x0ffe:
>> + if (i386_record_modrm (&ir))
>> + return -1;
>> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) +
>> ir.reg))
>> + goto no_support;
>> + record_arch_list_add_reg (ir.regcache,
>> + I387_MM0_REGNUM (tdep) + ir.reg);
>> + break;
>> +
>> + /* psllw */
>> + case 0x0f71:
>> + /* pslld */
>> + case 0x0f72:
>> + /* psllq */
>> + case 0x0f73:
>> + if (i386_record_modrm (&ir))
>> + return -1;
>> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) +
>> ir.rm))
>> + goto no_support;
>> + record_arch_list_add_reg (ir.regcache,
>> + I387_MM0_REGNUM (tdep) + ir.rm);
>> + break;
>> +
>> + /* psllw */
>> + case 0x660f71:
>> + /* pslld */
>> + case 0x660f72:
>> + /* psllq */
>> + case 0x660f73:
>> + if (i386_record_modrm (&ir))
>> + return -1;
>> + ir.rm |= ir.rex_b;
>> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) +
>> ir.rm))
>> + goto no_support;
>> + record_arch_list_add_reg (ir.regcache,
>> + I387_XMM0_REGNUM (tdep) + ir.rm);
>> + break;
>> +
>> + /* movd */
>> + case 0x0f7e:
>> + /* movd */
>> + case 0x660f7e:
>> + if (i386_record_modrm (&ir))
>> + return -1;
>> + if (ir.mod == 3)
>> + I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
>> + else
>> + {
>> + if (ir.dflag == 2)
>> + ir.ot = OT_QUAD;
>> + else
>> + ir.ot = OT_LONG;
>> + if (i386_record_lea_modrm (&ir))
>> + return -1;
>> + }
>> + break;
>> +
>> + /* movq */
>> + case 0x0f7f:
>> + if (i386_record_modrm (&ir))
>> + return -1;
>> + if (ir.mod == 3)
>> + {
>> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) +
>> ir.rm))
>> + goto no_support;
>> + record_arch_list_add_reg (ir.regcache,
>> + I387_MM0_REGNUM (tdep) + ir.rm);
>> + }
>> + else
>> + {
>> + ir.ot = OT_QUAD;
>> + if (i386_record_lea_modrm (&ir))
>> + return -1;
>> + }
>> + break;
>> +
>> + /* popcnt */
>> + case 0xf30fb8:
>> + if (i386_record_modrm (&ir))
>> + return -1;
>> + I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
>> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
>> + break;
>> +
>> + /* movq */
>> + case 0x660fd6:
>> + if (i386_record_modrm (&ir))
>> + return -1;
>> + if (ir.mod == 3)
>> + {
>> + ir.rm |= ir.rex_b;
>> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM
>> (tdep) + ir.rm))
>> + goto no_support;
>> + record_arch_list_add_reg (ir.regcache,
>> + I387_XMM0_REGNUM (tdep) + ir.rm);
>> + }
>> + else
>> + {
>> + ir.ot = OT_QUAD;
>> + if (i386_record_lea_modrm (&ir))
>> + return -1;
>> + }
>> + break;
>> +
>> + /* ptest */
>> + case 0x660f3817:
>> + /* ucomiss */
>> + case 0x0f2e:
>> + /* ucomisd */
>> + case 0x660f2e:
>> + /* comiss */
>> + case 0x0f2f:
>> + /* comisd */
>> + case 0x660f2f:
>> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
>> + break;
>> +
>> + /* maskmovq */
>> + case 0x0ff7:
>> + regcache_raw_read_unsigned (ir.regcache,
>> + ir.regmap[X86_RECORD_REDI_REGNUM],
>> + &tmpulongest);
>> + if (record_arch_list_add_mem (tmpulongest, 64))
>> + return -1;
>> + break;
>> +
>> + /* maskmovdqu */
>> + case 0x660ff7:
>> + regcache_raw_read_unsigned (ir.regcache,
>> + ir.regmap[X86_RECORD_REDI_REGNUM],
>> + &tmpulongest);
>> + if (record_arch_list_add_mem (tmpulongest, 128))
>> + return -1;
>> + break;
>> +
>> + default:
>> + goto no_support;
>> + break;
>> + }
>> + break;
>>
>> default:
>> - if (opcode > 0xff)
>> - ir.addr -= 2;
>> - else
>> - ir.addr -= 1;
>> goto no_support;
>> break;
>> }
>> @@ -5370,8 +6554,9 @@ reswitch:
>>
>> no_support:
>> printf_unfiltered (_("Process record doesn't support instruction 0x%02x
>> "
>> - "at address %s.\n"),
>> - (unsigned int) (opcode), paddress (gdbarch,
>> ir.addr));
>> + "at address %s.\n"),
>> + (unsigned int) (opcode),
>> + paddress (gdbarch, ir.orig_addr));
>> return -1;
>> }
>
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-11 15:00 ` Hui Zhu
@ 2009-12-13 4:28 ` Hui Zhu
2009-12-13 10:35 ` Hui Zhu
2009-12-14 18:24 ` Michael Snyder
0 siblings, 2 replies; 39+ messages in thread
From: Hui Zhu @ 2009-12-13 4:28 UTC (permalink / raw)
To: Michael Snyder; +Cc: gdb-patches ml, Mark Kettenis
[-- Attachment #1: Type: text/plain, Size: 33432 bytes --]
Hi,
This the update sse patch that follow cvs-head update.
And about the testcase, the sse patch fix a lot of fail because some
code in testcase use sse insn.
Now, I just got fail in solib-precsave.exp sigall-reverse.exp
sigall-precsave.exp.
solib-precsave.exp, this fail is because the core solib error that I
report in before.
sigall-reverse.exp sigall-precsave.exp
sigall-reverse.exp sigall-precsave.exp is because some behavior error.
I need check x86 and amd64's different. And try fix it in yesterday.
Thanks,
Hui
2009-12-13 Hui Zhu <teawater@gmail.com>
* i386-tdep.c (OT_DQUAD): New enum.
(i386_process_record): Add code for MMX, 3DNow!, SSE, SSE2,
SSE3, SSSE3 and SSE4.
---
i386-tdep.c | 1216 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 1200 insertions(+), 16 deletions(-)
--- a/i386-tdep.c
+++ b/i386-tdep.c
@@ -2848,6 +2848,7 @@ enum
OT_WORD,
OT_LONG,
OT_QUAD,
+ OT_DQUAD,
};
/* i386 arith/logic operations */
@@ -3295,7 +3296,7 @@ i386_process_record (struct gdbarch *gdb
ir.dflag = 1;
ir.override = -1;
ir.popl_esp_hack = 0;
- ir.regmap = gdbarch_tdep (gdbarch)->record_regmap;
+ ir.regmap = tdep->record_regmap;
ir.gdbarch = gdbarch;
if (record_debug > 1)
@@ -3413,7 +3414,7 @@ i386_process_record (struct gdbarch *gdb
return -1;
}
ir.addr++;
- opcode = (uint16_t) tmpu8 | 0x0f00;
+ opcode = (uint32_t) tmpu8 | 0x0f00;
goto reswitch;
break;
@@ -5217,7 +5218,7 @@ i386_process_record (struct gdbarch *gdb
}
ir.addr++;
if (tmpu8 != 0x80
- || gdbarch_tdep (gdbarch)->i386_intx80_record == NULL)
+ || tdep->i386_intx80_record == NULL)
{
printf_unfiltered (_("Process record doesn't support "
"instruction int 0x%02x.\n"),
@@ -5225,7 +5226,7 @@ i386_process_record (struct gdbarch *gdb
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_intx80_record (ir.regcache);
+ ret = tdep->i386_intx80_record (ir.regcache);
if (ret)
return ret;
}
@@ -5322,14 +5323,14 @@ i386_process_record (struct gdbarch *gdb
ir.addr -= 2;
goto no_support;
}
- if (gdbarch_tdep (gdbarch)->i386_sysenter_record == NULL)
+ if (tdep->i386_sysenter_record == NULL)
{
printf_unfiltered (_("Process record doesn't support "
"instruction sysenter.\n"));
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_sysenter_record (ir.regcache);
+ ret = tdep->i386_sysenter_record (ir.regcache);
if (ret)
return ret;
}
@@ -5347,14 +5348,14 @@ i386_process_record (struct gdbarch *gdb
case 0x0f05:
{
int ret;
- if (gdbarch_tdep (gdbarch)->i386_syscall_record == NULL)
+ if (tdep->i386_syscall_record == NULL)
{
printf_unfiltered (_("Process record doesn't support "
"instruction syscall.\n"));
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_syscall_record (ir.regcache);
+ ret = tdep->i386_syscall_record (ir.regcache);
if (ret)
return ret;
}
@@ -5698,14 +5699,1196 @@ i386_process_record (struct gdbarch *gdb
I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
- /* MMX/SSE/SSE2/PNI support */
- /* XXX */
+ /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
+ /* 3DNow! prefetch */
+ case 0x0f0d:
+ break;
+
+ /* 3DNow! femms */
+ case 0x0f0e:
+ /* emms */
+ case 0x0f77:
+ if (i386_fpc_regnum_p (gdbarch, I387_FTAG_REGNUM(tdep)))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache, I387_FTAG_REGNUM(tdep));
+ break;
+
+ /* 3DNow! data */
+ case 0x0f0f:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (target_read_memory (ir.addr, &tmpu8, 1))
+ {
+ if (record_debug)
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr %s len = 1.\n"),
+ paddress (gdbarch, ir.addr));
+ return -1;
+ }
+ ir.addr++;
+ switch (tmpu8)
+ {
+ /* 3DNow! pi2fw */
+ case 0x0c:
+ /* 3DNow! pi2fd */
+ case 0x0d:
+ /* 3DNow! pf2iw */
+ case 0x1c:
+ /* 3DNow! pf2id */
+ case 0x1d:
+ /* 3DNow! pfnacc */
+ case 0x8a:
+ /* 3DNow! pfpnacc */
+ case 0x8e:
+ /* 3DNow! pfcmpge */
+ case 0x90:
+ /* 3DNow! pfmin */
+ case 0x94:
+ /* 3DNow! pfrcp */
+ case 0x96:
+ /* 3DNow! pfrsqrt */
+ case 0x97:
+ /* 3DNow! pfsub */
+ case 0x9a:
+ /* 3DNow! pfadd */
+ case 0x9e:
+ /* 3DNow! pfcmpgt */
+ case 0xa0:
+ /* 3DNow! pfmax */
+ case 0xa4:
+ /* 3DNow! pfrcpit1 */
+ case 0xa6:
+ /* 3DNow! pfrsqit1 */
+ case 0xa7:
+ /* 3DNow! pfsubr */
+ case 0xaa:
+ /* 3DNow! pfacc */
+ case 0xae:
+ /* 3DNow! pfcmpeq */
+ case 0xb0:
+ /* 3DNow! pfmul */
+ case 0xb4:
+ /* 3DNow! pfrcpit2 */
+ case 0xb6:
+ /* 3DNow! pmulhrw */
+ case 0xb7:
+ /* 3DNow! pswapd */
+ case 0xbb:
+ /* 3DNow! pavgusb */
+ case 0xbf:
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
+ goto no_support_3dnow_data;
+ record_arch_list_add_reg (ir.regcache, ir.reg);
+ break;
+
+ default:
+no_support_3dnow_data:
+ opcode = (opcode << 8) | tmpu8;
+ goto no_support;
+ break;
+ }
+ break;
+
+ /* rsm */
+ case 0x0faa:
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
+ break;
+
+ case 0x0fae:
+ if (i386_record_modrm (&ir))
+ return -1;
+ switch(ir.reg)
+ {
+ /* fxsave */
+ case 0:
+ {
+ uint64_t tmpu64;
+
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ if (i386_record_lea_modrm_addr (&ir, &tmpu64))
+ return -1;
+ if (record_arch_list_add_mem (tmpu64, 512))
+ return -1;
+ }
+ break;
+
+ /* fxrstor */
+ case 1:
+ {
+ int i;
+
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+
+ for (i = I387_MM0_REGNUM (tdep);
+ i386_mmx_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ for (i = I387_XMM0_REGNUM (tdep);
+ i386_sse_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ if (i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
+ record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
+
+ for (i = I387_ST0_REGNUM (tdep);
+ i386_fp_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ for (i = I387_FCTRL_REGNUM (tdep);
+ i386_fpc_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+ }
+ break;
+
+ /* ldmxcsr */
+ case 2:
+ if (!i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
+ break;
+
+ /* stmxcsr */
+ case 3:
+ ir.ot = OT_LONG;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ /* lfence */
+ case 5:
+ /* mfence */
+ case 6:
+ /* sfence clflush */
+ case 7:
+ break;
+
+ default:
+ opcode = (opcode << 8) | ir.modrm;
+ goto no_support;
+ break;
+ }
+ break;
+
+ /* movnti */
+ case 0x0fc3:
+ ir.ot = (ir.dflag == 2) ? OT_QUAD : OT_LONG;
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ goto no_support;
+ ir.reg |= rex_r;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ /* Add prefix to opcode. */
+ case 0x0f10:
+ case 0x0f11:
+ case 0x0f12:
+ case 0x0f13:
+ case 0x0f14:
+ case 0x0f16:
+ case 0x0f17:
+ case 0x0f28:
+ case 0x0f29:
+ case 0x0f2a:
+ case 0x0f2b:
+ case 0x0f2c:
+ case 0x0f2d:
+ case 0x0f2e:
+ case 0x0f2f:
+ case 0x0f38:
+ case 0x0f39:
+ case 0x0f3a:
+ case 0x0f50:
+ case 0x0f51:
+ case 0x0f52:
+ case 0x0f53:
+ case 0x0f54:
+ case 0x0f55:
+ case 0x0f56:
+ case 0x0f57:
+ case 0x0f58:
+ case 0x0f59:
+ case 0x0f5a:
+ case 0x0f5b:
+ case 0x0f5c:
+ case 0x0f5d:
+ case 0x0f5e:
+ case 0x0f5f:
+ case 0x0f60:
+ case 0x0f61:
+ case 0x0f62:
+ case 0x0f63:
+ case 0x0f64:
+ case 0x0f65:
+ case 0x0f66:
+ case 0x0f67:
+ case 0x0f68:
+ case 0x0f69:
+ case 0x0f6a:
+ case 0x0f6b:
+ case 0x0f6c:
+ case 0x0f6d:
+ case 0x0f6e:
+ case 0x0f6f:
+ case 0x0f70:
+ case 0x0f71:
+ case 0x0f72:
+ case 0x0f73:
+ case 0x0f74:
+ case 0x0f75:
+ case 0x0f76:
+ case 0x0f7c:
+ case 0x0f7d:
+ case 0x0f7e:
+ case 0x0f7f:
+ case 0x0fb8:
+ case 0x0fc2:
+ case 0x0fc4:
+ case 0x0fc5:
+ case 0x0fc6:
+ case 0x0fd0:
+ case 0x0fd1:
+ case 0x0fd2:
+ case 0x0fd3:
+ case 0x0fd4:
+ case 0x0fd5:
+ case 0x0fd6:
+ case 0x0fd7:
+ case 0x0fd8:
+ case 0x0fd9:
+ case 0x0fda:
+ case 0x0fdb:
+ case 0x0fdc:
+ case 0x0fdd:
+ case 0x0fde:
+ case 0x0fdf:
+ case 0x0fe0:
+ case 0x0fe1:
+ case 0x0fe2:
+ case 0x0fe3:
+ case 0x0fe4:
+ case 0x0fe5:
+ case 0x0fe6:
+ case 0x0fe7:
+ case 0x0fe8:
+ case 0x0fe9:
+ case 0x0fea:
+ case 0x0feb:
+ case 0x0fec:
+ case 0x0fed:
+ case 0x0fee:
+ case 0x0fef:
+ case 0x0ff0:
+ case 0x0ff1:
+ case 0x0ff2:
+ case 0x0ff3:
+ case 0x0ff4:
+ case 0x0ff5:
+ case 0x0ff6:
+ case 0x0ff7:
+ case 0x0ff8:
+ case 0x0ff9:
+ case 0x0ffa:
+ case 0x0ffb:
+ case 0x0ffc:
+ case 0x0ffd:
+ case 0x0ffe:
+ switch (prefixes)
+ {
+ case PREFIX_REPNZ:
+ opcode |= 0xf20000;
+ break;
+ case PREFIX_DATA:
+ opcode |= 0x660000;
+ break;
+ case PREFIX_REPZ:
+ opcode |= 0xf30000;
+ break;
+ }
+reswitch_prefix_add:
+ switch (opcode)
+ {
+ case 0x0f38:
+ case 0x660f38:
+ case 0xf20f38:
+ case 0x0f3a:
+ case 0x660f3a:
+ if (target_read_memory (ir.addr, &tmpu8, 1))
+ {
+ if (record_debug)
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr %s len = 1.\n"),
+ paddress (gdbarch, ir.addr));
+ return -1;
+ }
+ ir.addr++;
+ opcode = (uint32_t) tmpu8 | opcode << 4;
+ goto reswitch_prefix_add;
+ break;
+
+ /* movups */
+ case 0x0f10:
+ /* movupd */
+ case 0x660f10:
+ /* movss */
+ case 0xf30f10:
+ /* movsd */
+ case 0xf20f10:
+ /* movlps */
+ case 0x0f12:
+ /* movlpd */
+ case 0x660f12:
+ /* movsldup */
+ case 0xf30f12:
+ /* movddup */
+ case 0xf20f12:
+ /* unpcklps */
+ case 0x0f14:
+ /* unpcklpd */
+ case 0x660f14:
+ /* unpckhps */
+ case 0x0f15:
+ /* unpckhpd */
+ case 0x660f15:
+ /* movhps */
+ case 0x0f16:
+ /* movhpd */
+ case 0x660f16:
+ /* movshdup */
+ case 0xf30f16:
+ /* movaps */
+ case 0x0f28:
+ /* movapd */
+ case 0x660f28:
+ /* cvtpi2ps */
+ case 0x0f2a:
+ /* cvtpi2pd */
+ case 0x660f2a:
+ /* cvtsi2ss */
+ case 0xf30f2a:
+ /* cvtsi2sd */
+ case 0xf20f2a:
+ /* cvttps2pi */
+ case 0x0f2c:
+ /* cvttpd2pi */
+ case 0x660f2c:
+ /* cvtps2pi */
+ case 0x0f2d:
+ /* cvtpd2pi */
+ case 0x660f2d:
+ /* pshufb */
+ case 0x660f3800:
+ /* phaddw */
+ case 0x660f3801:
+ /* phaddd */
+ case 0x660f3802:
+ /* phaddsw */
+ case 0x660f3803:
+ /* pmaddubsw */
+ case 0x660f3804:
+ /* phsubw */
+ case 0x660f3805:
+ /* phsubd */
+ case 0x660f3806:
+ /* phaddsw */
+ case 0x660f3807:
+ /* psignb */
+ case 0x660f3808:
+ /* psignw */
+ case 0x660f3809:
+ /* psignd */
+ case 0x660f380a:
+ /* pmulhrsw */
+ case 0x660f380b:
+ /* pblendvb */
+ case 0x660f3810:
+ /* blendvps */
+ case 0x660f3814:
+ /* blendvpd */
+ case 0x660f3815:
+ /* pabsb */
+ case 0x660f381c:
+ /* pabsw */
+ case 0x660f381d:
+ /* pabsd */
+ case 0x660f381e:
+ /* pmovsxbw */
+ case 0x660f3820:
+ /* pmovsxbd */
+ case 0x660f3821:
+ /* pmovsxbq */
+ case 0x660f3822:
+ /* pmovsxwd */
+ case 0x660f3823:
+ /* pmovsxwq */
+ case 0x660f3824:
+ /* pmovsxdq */
+ case 0x660f3825:
+ /* pmuldq */
+ case 0x660f3828:
+ /* pcmpeqq */
+ case 0x660f3829:
+ /* movntdqa */
+ case 0x660f382a:
+ /* roundps */
+ case 0x660f3a08:
+ /* roundpd */
+ case 0x660f3a09:
+ /* roundss */
+ case 0x660f3a0a:
+ /* roundsd */
+ case 0x660f3a0b:
+ /* blendps */
+ case 0x660f3a0c:
+ /* blendpd */
+ case 0x660f3a0d:
+ /* pblendw */
+ case 0x660f3a0e:
+ /* palignr */
+ case 0x660f3a0f:
+ /* pinsrb */
+ case 0x660f3a20:
+ /* insertps */
+ case 0x660f3a21:
+ /* pinsrd pinsrq */
+ case 0x660f3a22:
+ /* dpps */
+ case 0x660f3a40:
+ /* dppd */
+ case 0x660f3a41:
+ /* mpsadbw */
+ case 0x660f3a42:
+ /* pcmpestrm */
+ case 0x660f3a60:
+ /* pcmpestri */
+ case 0x660f3a61:
+ /* pcmpistrm */
+ case 0x660f3a62:
+ /* pcmpistri */
+ case 0x660f3a63:
+ /* sqrtps */
+ case 0x0f51:
+ /* sqrtpd */
+ case 0x660f51:
+ /* sqrtsd */
+ case 0xf20f51:
+ /* sqrtss */
+ case 0xf30f51:
+ /* rsqrtps */
+ case 0x0f52:
+ /* rsqrtss */
+ case 0xf30f52:
+ /* rcpps */
+ case 0x0f53:
+ /* rcpss */
+ case 0xf30f53:
+ /* andps */
+ case 0x0f54:
+ /* andpd */
+ case 0x660f54:
+ /* andnps */
+ case 0x0f55:
+ /* andnpd */
+ case 0x660f55:
+ /* orps */
+ case 0x0f56:
+ /* orpd */
+ case 0x660f56:
+ /* xorps */
+ case 0x0f57:
+ /* xorpd */
+ case 0x660f57:
+ /* addps */
+ case 0x0f58:
+ /* addpd */
+ case 0x660f58:
+ /* addsd */
+ case 0xf20f58:
+ /* addss */
+ case 0xf30f58:
+ /* mulps */
+ case 0x0f59:
+ /* mulpd */
+ case 0x660f59:
+ /* mulsd */
+ case 0xf20f59:
+ /* mulss */
+ case 0xf30f59:
+ /* cvtps2pd */
+ case 0x0f5a:
+ /* cvtpd2ps */
+ case 0x660f5a:
+ /* cvtsd2ss */
+ case 0xf20f5a:
+ /* cvtss2sd */
+ case 0xf30f5a:
+ /* cvtdq2ps */
+ case 0x0f5b:
+ /* cvtps2dq */
+ case 0x660f5b:
+ /* cvttps2dq */
+ case 0xf30f5b:
+ /* subps */
+ case 0x0f5c:
+ /* subpd */
+ case 0x660f5c:
+ /* subsd */
+ case 0xf20f5c:
+ /* subss */
+ case 0xf30f5c:
+ /* minps */
+ case 0x0f5d:
+ /* minpd */
+ case 0x660f5d:
+ /* minsd */
+ case 0xf20f5d:
+ /* minss */
+ case 0xf30f5d:
+ /* divps */
+ case 0x0f5e:
+ /* divpd */
+ case 0x660f5e:
+ /* divsd */
+ case 0xf20f5e:
+ /* divss */
+ case 0xf30f5e:
+ /* maxps */
+ case 0x0f5f:
+ /* maxpd */
+ case 0x660f5f:
+ /* maxsd */
+ case 0xf20f5f:
+ /* maxss */
+ case 0xf30f5f:
+ /* punpcklbw */
+ case 0x660f60:
+ /* punpcklwd */
+ case 0x660f61:
+ /* punpckldq */
+ case 0x660f62:
+ /* packsswb */
+ case 0x660f63:
+ /* pcmpgtb */
+ case 0x660f64:
+ /* pcmpgtw */
+ case 0x660f65:
+ /* pcmpgtl */
+ case 0x660f66:
+ /* packuswb */
+ case 0x660f67:
+ /* punpckhbw */
+ case 0x660f68:
+ /* punpckhwd */
+ case 0x660f69:
+ /* punpckhdq */
+ case 0x660f6a:
+ /* packssdw */
+ case 0x660f6b:
+ /* punpcklqdq */
+ case 0x660f6c:
+ /* punpckhqdq */
+ case 0x660f6d:
+ /* movd */
+ case 0x660f6e:
+ /* movdqa */
+ case 0x660f6f:
+ /* movdqu */
+ case 0xf30f6f:
+ /* pshufd */
+ case 0x660f70:
+ /* pshuflw */
+ case 0xf20f70:
+ /* pshufhw */
+ case 0xf30f70:
+ /* pcmpeqb */
+ case 0x660f74:
+ /* pcmpeqw */
+ case 0x660f75:
+ /* pcmpeql */
+ case 0x660f76:
+ /* haddpd */
+ case 0x660f7c:
+ /* haddps */
+ case 0xf20f7c:
+ /* hsubpd */
+ case 0x660f7d:
+ /* hsubps */
+ case 0xf20f7d:
+ /* movq */
+ case 0xf30f7e:
+ /* cmpps */
+ case 0x0fc2:
+ /* cmppd */
+ case 0x660fc2:
+ /* cmpsd */
+ case 0xf20fc2:
+ /* cmpss */
+ case 0xf30fc2:
+ /* pinsrw */
+ case 0x660fc4:
+ /* shufps */
+ case 0x0fc6:
+ /* shufpd */
+ case 0x660fc6:
+ /* addsubpd */
+ case 0x660fd0:
+ /* addsubps */
+ case 0xf20fd0:
+ /* psrlw */
+ case 0x660fd1:
+ /* psrld */
+ case 0x660fd2:
+ /* psrlq */
+ case 0x660fd3:
+ /* paddq */
+ case 0x660fd4:
+ /* pmullw */
+ case 0x660fd5:
+ /* movq2dq */
+ case 0xf30fd6:
+ /* psubusb */
+ case 0x660fd8:
+ /* psubusw */
+ case 0x660fd9:
+ /* pminub */
+ case 0x660fda:
+ /* pand */
+ case 0x660fdb:
+ /* paddusb */
+ case 0x660fdc:
+ /* paddusw */
+ case 0x660fdd:
+ /* pmaxub */
+ case 0x660fde:
+ /* pandn */
+ case 0x660fdf:
+ /* pavgb */
+ case 0x660fe0:
+ /* psraw */
+ case 0x660fe1:
+ /* psrad */
+ case 0x660fe2:
+ /* pavgw */
+ case 0x660fe3:
+ /* pmulhuw */
+ case 0x660fe4:
+ /* pmulhw */
+ case 0x660fe5:
+ /* cvttpd2dq */
+ case 0x660fe6:
+ /* cvtpd2dq */
+ case 0xf20fe6:
+ /* cvtdq2pd */
+ case 0xf30fe6:
+ /* psubsb */
+ case 0x660fe8:
+ /* psubsw */
+ case 0x660fe9:
+ /* pminsw */
+ case 0x660fea:
+ /* por */
+ case 0x660feb:
+ /* paddsb */
+ case 0x660fec:
+ /* paddsw */
+ case 0x660fed:
+ /* pmaxsw */
+ case 0x660fee:
+ /* pxor */
+ case 0x660fef:
+ /* lddqu */
+ case 0x660ff0:
+ /* psllw */
+ case 0x660ff1:
+ /* pslld */
+ case 0x660ff2:
+ /* psllq */
+ case 0x660ff3:
+ /* pmuludq */
+ case 0x660ff4:
+ /* pmaddwd */
+ case 0x660ff5:
+ /* psadbw */
+ case 0x660ff6:
+ /* psubb */
+ case 0x660ff8:
+ /* psubw */
+ case 0x660ff9:
+ /* psubl */
+ case 0x660ffa:
+ /* psubq */
+ case 0x660ffb:
+ /* paddb */
+ case 0x660ffc:
+ /* paddw */
+ case 0x660ffd:
+ /* paddl */
+ case 0x660ffe:
+ if (i386_record_modrm (&ir))
+ return -1;
+ ir.reg |= rex_r;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.reg))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.reg);
+ if ((opcode & 0xfffffffc) == 0x660f3a60)
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ /* movups */
+ case 0x0f11:
+ /* movupd */
+ case 0x660f11:
+ /* movss */
+ case 0xf30f11:
+ /* movsd */
+ case 0xf20f11:
+ /* movlps */
+ case 0x0f13:
+ /* movlpd */
+ case 0x660f13:
+ /* movhps */
+ case 0x0f17:
+ /* movhpd */
+ case 0x660f17:
+ /* movaps */
+ case 0x0f29:
+ /* movapd */
+ case 0x660f29:
+ /* pextrb */
+ case 0x660f3a14:
+ /* pextrw */
+ case 0x660f3a15:
+ /* pextrd pextrq */
+ case 0x660f3a16:
+ /* extractps */
+ case 0x660f3a17:
+ /* movdqa */
+ case 0x660f7f:
+ /* movdqu */
+ case 0xf30f7f:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ if (opcode == 0x0f13 || opcode == 0x660f13
+ || opcode == 0x0f17 || opcode == 0x660f17)
+ goto no_support;
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM
(tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ switch (opcode)
+ {
+ case 0x660f3a14:
+ ir.ot = OT_BYTE;
+ break;
+ case 0x660f3a15:
+ ir.ot = OT_WORD;
+ break;
+ case 0x660f3a16:
+ ir.ot = OT_LONG;
+ break;
+ case 0x660f3a17:
+ ir.ot = OT_QUAD;
+ break;
+ default:
+ ir.ot = OT_DQUAD;
+ break;
+ }
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* movntps */
+ case 0x0f2b:
+ /* movntpd */
+ case 0x660f2b:
+ /* movntq */
+ case 0x0fe7:
+ /* movntdq */
+ case 0x660fe7:
+ if (ir.mod == 3)
+ goto no_support;
+ if (opcode == 0x0fe7)
+ ir.ot = OT_QUAD;
+ else
+ ir.ot = OT_DQUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ /* cvttss2si */
+ case 0xf30f2c:
+ /* cvttsd2si */
+ case 0xf20f2c:
+ /* cvtss2si */
+ case 0xf30f2d:
+ /* cvtsd2si */
+ case 0xf20f2d:
+ /* crc32 */
+ case 0xf20f38f0:
+ /* crc32 */
+ case 0xf20f38f1:
+ /* movmskps */
+ case 0x0f50:
+ /* movmskpd */
+ case 0x660f50:
+ /* pextrw */
+ case 0x0fc5:
+ /* pextrw */
+ case 0x660fc5:
+ /* pmovmskb */
+ case 0x0fd7:
+ /* pmovmskb */
+ case 0x660fd7:
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
+ break;
+
+ /* pshufb */
+ case 0x0f3800:
+ /* phaddw */
+ case 0x0f3801:
+ /* phaddd */
+ case 0x0f3802:
+ /* phaddsw */
+ case 0x0f3803:
+ /* pmaddubsw */
+ case 0x0f3804:
+ /* phsubw */
+ case 0x0f3805:
+ /* phsubd */
+ case 0x0f3806:
+ /* phaddsw */
+ case 0x0f3807:
+ /* psignb */
+ case 0x0f3808:
+ /* psignw */
+ case 0x0f3809:
+ /* psignd */
+ case 0x0f380a:
+ /* pmulhrsw */
+ case 0x0f380b:
+ /* pabsb */
+ case 0x0f381c:
+ /* pabsw */
+ case 0x0f381d:
+ /* pabsd */
+ case 0x0f381e:
+ /* packusdw */
+ case 0x0f382b:
+ /* pmovzxbw */
+ case 0x0f3830:
+ /* pmovzxbd */
+ case 0x0f3831:
+ /* pmovzxbq */
+ case 0x0f3832:
+ /* pmovzxwd */
+ case 0x0f3833:
+ /* pmovzxwq */
+ case 0x0f3834:
+ /* pmovzxdq */
+ case 0x0f3835:
+ /* pcmpgtq */
+ case 0x0f3837:
+ /* pminsb */
+ case 0x0f3838:
+ /* pminsd */
+ case 0x0f3839:
+ /* pminuw */
+ case 0x0f383a:
+ /* pminud */
+ case 0x0f383b:
+ /* pmaxsb */
+ case 0x0f383c:
+ /* pmaxsd */
+ case 0x0f383d:
+ /* pmaxuw */
+ case 0x0f383e:
+ /* pmaxud */
+ case 0x0f383f:
+ /* pmulld */
+ case 0x0f3840:
+ /* phminposuw */
+ case 0x0f3841:
+ /* palignr */
+ case 0x0f3a0f:
+ /* punpcklbw */
+ case 0x0f60:
+ /* punpcklwd */
+ case 0x0f61:
+ /* punpckldq */
+ case 0x0f62:
+ /* packsswb */
+ case 0x0f63:
+ /* pcmpgtb */
+ case 0x0f64:
+ /* pcmpgtw */
+ case 0x0f65:
+ /* pcmpgtl */
+ case 0x0f66:
+ /* packuswb */
+ case 0x0f67:
+ /* punpckhbw */
+ case 0x0f68:
+ /* punpckhwd */
+ case 0x0f69:
+ /* punpckhdq */
+ case 0x0f6a:
+ /* packssdw */
+ case 0x0f6b:
+ /* movd */
+ case 0x0f6e:
+ /* movq */
+ case 0x0f6f:
+ /* pshufw */
+ case 0x0f70:
+ /* pcmpeqb */
+ case 0x0f74:
+ /* pcmpeqw */
+ case 0x0f75:
+ /* pcmpeql */
+ case 0x0f76:
+ /* pinsrw */
+ case 0x0fc4:
+ /* psrlw */
+ case 0x0fd1:
+ /* psrld */
+ case 0x0fd2:
+ /* psrlq */
+ case 0x0fd3:
+ /* paddq */
+ case 0x0fd4:
+ /* pmullw */
+ case 0x0fd5:
+ /* movdq2q */
+ case 0xf20fd6:
+ /* psubusb */
+ case 0x0fd8:
+ /* psubusw */
+ case 0x0fd9:
+ /* pminub */
+ case 0x0fda:
+ /* pand */
+ case 0x0fdb:
+ /* paddusb */
+ case 0x0fdc:
+ /* paddusw */
+ case 0x0fdd:
+ /* pmaxub */
+ case 0x0fde:
+ /* pandn */
+ case 0x0fdf:
+ /* pavgb */
+ case 0x0fe0:
+ /* psraw */
+ case 0x0fe1:
+ /* psrad */
+ case 0x0fe2:
+ /* pavgw */
+ case 0x0fe3:
+ /* pmulhuw */
+ case 0x0fe4:
+ /* pmulhw */
+ case 0x0fe5:
+ /* psubsb */
+ case 0x0fe8:
+ /* psubsw */
+ case 0x0fe9:
+ /* pminsw */
+ case 0x0fea:
+ /* por */
+ case 0x0feb:
+ /* paddsb */
+ case 0x0fec:
+ /* paddsw */
+ case 0x0fed:
+ /* pmaxsw */
+ case 0x0fee:
+ /* pxor */
+ case 0x0fef:
+ /* psllw */
+ case 0x0ff1:
+ /* pslld */
+ case 0x0ff2:
+ /* psllq */
+ case 0x0ff3:
+ /* pmuludq */
+ case 0x0ff4:
+ /* pmaddwd */
+ case 0x0ff5:
+ /* psadbw */
+ case 0x0ff6:
+ /* psubb */
+ case 0x0ff8:
+ /* psubw */
+ case 0x0ff9:
+ /* psubl */
+ case 0x0ffa:
+ /* psubq */
+ case 0x0ffb:
+ /* paddb */
+ case 0x0ffc:
+ /* paddw */
+ case 0x0ffd:
+ /* paddl */
+ case 0x0ffe:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.reg);
+ break;
+
+ /* psllw */
+ case 0x0f71:
+ /* pslld */
+ case 0x0f72:
+ /* psllq */
+ case 0x0f73:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.rm);
+ break;
+
+ /* psllw */
+ case 0x660f71:
+ /* pslld */
+ case 0x660f72:
+ /* psllq */
+ case 0x660f73:
+ if (i386_record_modrm (&ir))
+ return -1;
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ break;
+
+ /* movd */
+ case 0x0f7e:
+ /* movd */
+ case 0x660f7e:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ else
+ {
+ if (ir.dflag == 2)
+ ir.ot = OT_QUAD;
+ else
+ ir.ot = OT_LONG;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* movq */
+ case 0x0f7f:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ ir.ot = OT_QUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* popcnt */
+ case 0xf30fb8:
+ if (i386_record_modrm (&ir))
+ return -1;
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ /* movq */
+ case 0x660fd6:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM
(tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ ir.ot = OT_QUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* ptest */
+ case 0x660f3817:
+ /* ucomiss */
+ case 0x0f2e:
+ /* ucomisd */
+ case 0x660f2e:
+ /* comiss */
+ case 0x0f2f:
+ /* comisd */
+ case 0x660f2f:
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ /* maskmovq */
+ case 0x0ff7:
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_REDI_REGNUM],
+ &tmpulongest);
+ if (record_arch_list_add_mem (tmpulongest, 64))
+ return -1;
+ break;
+
+ /* maskmovdqu */
+ case 0x660ff7:
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_REDI_REGNUM],
+ &tmpulongest);
+ if (record_arch_list_add_mem (tmpulongest, 128))
+ return -1;
+ break;
+
+ default:
+ goto no_support;
+ break;
+ }
+ break;
default:
- if (opcode > 0xff)
- ir.addr -= 2;
- else
- ir.addr -= 1;
goto no_support;
break;
}
@@ -5719,8 +6902,9 @@ i386_process_record (struct gdbarch *gdb
no_support:
printf_unfiltered (_("Process record doesn't support instruction 0x%02x "
- "at address %s.\n"),
- (unsigned int) (opcode), paddress (gdbarch, ir.addr));
+ "at address %s.\n"),
+ (unsigned int) (opcode),
+ paddress (gdbarch, ir.orig_addr));
return -1;
}
[-- Attachment #2: prec-x86-sse.txt --]
[-- Type: text/plain, Size: 32748 bytes --]
---
i386-tdep.c | 1216 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 1200 insertions(+), 16 deletions(-)
--- a/i386-tdep.c
+++ b/i386-tdep.c
@@ -2848,6 +2848,7 @@ enum
OT_WORD,
OT_LONG,
OT_QUAD,
+ OT_DQUAD,
};
/* i386 arith/logic operations */
@@ -3295,7 +3296,7 @@ i386_process_record (struct gdbarch *gdb
ir.dflag = 1;
ir.override = -1;
ir.popl_esp_hack = 0;
- ir.regmap = gdbarch_tdep (gdbarch)->record_regmap;
+ ir.regmap = tdep->record_regmap;
ir.gdbarch = gdbarch;
if (record_debug > 1)
@@ -3413,7 +3414,7 @@ i386_process_record (struct gdbarch *gdb
return -1;
}
ir.addr++;
- opcode = (uint16_t) tmpu8 | 0x0f00;
+ opcode = (uint32_t) tmpu8 | 0x0f00;
goto reswitch;
break;
@@ -5217,7 +5218,7 @@ i386_process_record (struct gdbarch *gdb
}
ir.addr++;
if (tmpu8 != 0x80
- || gdbarch_tdep (gdbarch)->i386_intx80_record == NULL)
+ || tdep->i386_intx80_record == NULL)
{
printf_unfiltered (_("Process record doesn't support "
"instruction int 0x%02x.\n"),
@@ -5225,7 +5226,7 @@ i386_process_record (struct gdbarch *gdb
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_intx80_record (ir.regcache);
+ ret = tdep->i386_intx80_record (ir.regcache);
if (ret)
return ret;
}
@@ -5322,14 +5323,14 @@ i386_process_record (struct gdbarch *gdb
ir.addr -= 2;
goto no_support;
}
- if (gdbarch_tdep (gdbarch)->i386_sysenter_record == NULL)
+ if (tdep->i386_sysenter_record == NULL)
{
printf_unfiltered (_("Process record doesn't support "
"instruction sysenter.\n"));
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_sysenter_record (ir.regcache);
+ ret = tdep->i386_sysenter_record (ir.regcache);
if (ret)
return ret;
}
@@ -5347,14 +5348,14 @@ i386_process_record (struct gdbarch *gdb
case 0x0f05:
{
int ret;
- if (gdbarch_tdep (gdbarch)->i386_syscall_record == NULL)
+ if (tdep->i386_syscall_record == NULL)
{
printf_unfiltered (_("Process record doesn't support "
"instruction syscall.\n"));
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_syscall_record (ir.regcache);
+ ret = tdep->i386_syscall_record (ir.regcache);
if (ret)
return ret;
}
@@ -5698,14 +5699,1196 @@ i386_process_record (struct gdbarch *gdb
I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
- /* MMX/SSE/SSE2/PNI support */
- /* XXX */
+ /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
+ /* 3DNow! prefetch */
+ case 0x0f0d:
+ break;
+
+ /* 3DNow! femms */
+ case 0x0f0e:
+ /* emms */
+ case 0x0f77:
+ if (i386_fpc_regnum_p (gdbarch, I387_FTAG_REGNUM(tdep)))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache, I387_FTAG_REGNUM(tdep));
+ break;
+
+ /* 3DNow! data */
+ case 0x0f0f:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (target_read_memory (ir.addr, &tmpu8, 1))
+ {
+ if (record_debug)
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr %s len = 1.\n"),
+ paddress (gdbarch, ir.addr));
+ return -1;
+ }
+ ir.addr++;
+ switch (tmpu8)
+ {
+ /* 3DNow! pi2fw */
+ case 0x0c:
+ /* 3DNow! pi2fd */
+ case 0x0d:
+ /* 3DNow! pf2iw */
+ case 0x1c:
+ /* 3DNow! pf2id */
+ case 0x1d:
+ /* 3DNow! pfnacc */
+ case 0x8a:
+ /* 3DNow! pfpnacc */
+ case 0x8e:
+ /* 3DNow! pfcmpge */
+ case 0x90:
+ /* 3DNow! pfmin */
+ case 0x94:
+ /* 3DNow! pfrcp */
+ case 0x96:
+ /* 3DNow! pfrsqrt */
+ case 0x97:
+ /* 3DNow! pfsub */
+ case 0x9a:
+ /* 3DNow! pfadd */
+ case 0x9e:
+ /* 3DNow! pfcmpgt */
+ case 0xa0:
+ /* 3DNow! pfmax */
+ case 0xa4:
+ /* 3DNow! pfrcpit1 */
+ case 0xa6:
+ /* 3DNow! pfrsqit1 */
+ case 0xa7:
+ /* 3DNow! pfsubr */
+ case 0xaa:
+ /* 3DNow! pfacc */
+ case 0xae:
+ /* 3DNow! pfcmpeq */
+ case 0xb0:
+ /* 3DNow! pfmul */
+ case 0xb4:
+ /* 3DNow! pfrcpit2 */
+ case 0xb6:
+ /* 3DNow! pmulhrw */
+ case 0xb7:
+ /* 3DNow! pswapd */
+ case 0xbb:
+ /* 3DNow! pavgusb */
+ case 0xbf:
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
+ goto no_support_3dnow_data;
+ record_arch_list_add_reg (ir.regcache, ir.reg);
+ break;
+
+ default:
+no_support_3dnow_data:
+ opcode = (opcode << 8) | tmpu8;
+ goto no_support;
+ break;
+ }
+ break;
+
+ /* rsm */
+ case 0x0faa:
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
+ break;
+
+ case 0x0fae:
+ if (i386_record_modrm (&ir))
+ return -1;
+ switch(ir.reg)
+ {
+ /* fxsave */
+ case 0:
+ {
+ uint64_t tmpu64;
+
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ if (i386_record_lea_modrm_addr (&ir, &tmpu64))
+ return -1;
+ if (record_arch_list_add_mem (tmpu64, 512))
+ return -1;
+ }
+ break;
+
+ /* fxrstor */
+ case 1:
+ {
+ int i;
+
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+
+ for (i = I387_MM0_REGNUM (tdep);
+ i386_mmx_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ for (i = I387_XMM0_REGNUM (tdep);
+ i386_sse_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ if (i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
+ record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
+
+ for (i = I387_ST0_REGNUM (tdep);
+ i386_fp_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ for (i = I387_FCTRL_REGNUM (tdep);
+ i386_fpc_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+ }
+ break;
+
+ /* ldmxcsr */
+ case 2:
+ if (!i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
+ break;
+
+ /* stmxcsr */
+ case 3:
+ ir.ot = OT_LONG;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ /* lfence */
+ case 5:
+ /* mfence */
+ case 6:
+ /* sfence clflush */
+ case 7:
+ break;
+
+ default:
+ opcode = (opcode << 8) | ir.modrm;
+ goto no_support;
+ break;
+ }
+ break;
+
+ /* movnti */
+ case 0x0fc3:
+ ir.ot = (ir.dflag == 2) ? OT_QUAD : OT_LONG;
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ goto no_support;
+ ir.reg |= rex_r;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ /* Add prefix to opcode. */
+ case 0x0f10:
+ case 0x0f11:
+ case 0x0f12:
+ case 0x0f13:
+ case 0x0f14:
+ case 0x0f16:
+ case 0x0f17:
+ case 0x0f28:
+ case 0x0f29:
+ case 0x0f2a:
+ case 0x0f2b:
+ case 0x0f2c:
+ case 0x0f2d:
+ case 0x0f2e:
+ case 0x0f2f:
+ case 0x0f38:
+ case 0x0f39:
+ case 0x0f3a:
+ case 0x0f50:
+ case 0x0f51:
+ case 0x0f52:
+ case 0x0f53:
+ case 0x0f54:
+ case 0x0f55:
+ case 0x0f56:
+ case 0x0f57:
+ case 0x0f58:
+ case 0x0f59:
+ case 0x0f5a:
+ case 0x0f5b:
+ case 0x0f5c:
+ case 0x0f5d:
+ case 0x0f5e:
+ case 0x0f5f:
+ case 0x0f60:
+ case 0x0f61:
+ case 0x0f62:
+ case 0x0f63:
+ case 0x0f64:
+ case 0x0f65:
+ case 0x0f66:
+ case 0x0f67:
+ case 0x0f68:
+ case 0x0f69:
+ case 0x0f6a:
+ case 0x0f6b:
+ case 0x0f6c:
+ case 0x0f6d:
+ case 0x0f6e:
+ case 0x0f6f:
+ case 0x0f70:
+ case 0x0f71:
+ case 0x0f72:
+ case 0x0f73:
+ case 0x0f74:
+ case 0x0f75:
+ case 0x0f76:
+ case 0x0f7c:
+ case 0x0f7d:
+ case 0x0f7e:
+ case 0x0f7f:
+ case 0x0fb8:
+ case 0x0fc2:
+ case 0x0fc4:
+ case 0x0fc5:
+ case 0x0fc6:
+ case 0x0fd0:
+ case 0x0fd1:
+ case 0x0fd2:
+ case 0x0fd3:
+ case 0x0fd4:
+ case 0x0fd5:
+ case 0x0fd6:
+ case 0x0fd7:
+ case 0x0fd8:
+ case 0x0fd9:
+ case 0x0fda:
+ case 0x0fdb:
+ case 0x0fdc:
+ case 0x0fdd:
+ case 0x0fde:
+ case 0x0fdf:
+ case 0x0fe0:
+ case 0x0fe1:
+ case 0x0fe2:
+ case 0x0fe3:
+ case 0x0fe4:
+ case 0x0fe5:
+ case 0x0fe6:
+ case 0x0fe7:
+ case 0x0fe8:
+ case 0x0fe9:
+ case 0x0fea:
+ case 0x0feb:
+ case 0x0fec:
+ case 0x0fed:
+ case 0x0fee:
+ case 0x0fef:
+ case 0x0ff0:
+ case 0x0ff1:
+ case 0x0ff2:
+ case 0x0ff3:
+ case 0x0ff4:
+ case 0x0ff5:
+ case 0x0ff6:
+ case 0x0ff7:
+ case 0x0ff8:
+ case 0x0ff9:
+ case 0x0ffa:
+ case 0x0ffb:
+ case 0x0ffc:
+ case 0x0ffd:
+ case 0x0ffe:
+ switch (prefixes)
+ {
+ case PREFIX_REPNZ:
+ opcode |= 0xf20000;
+ break;
+ case PREFIX_DATA:
+ opcode |= 0x660000;
+ break;
+ case PREFIX_REPZ:
+ opcode |= 0xf30000;
+ break;
+ }
+reswitch_prefix_add:
+ switch (opcode)
+ {
+ case 0x0f38:
+ case 0x660f38:
+ case 0xf20f38:
+ case 0x0f3a:
+ case 0x660f3a:
+ if (target_read_memory (ir.addr, &tmpu8, 1))
+ {
+ if (record_debug)
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr %s len = 1.\n"),
+ paddress (gdbarch, ir.addr));
+ return -1;
+ }
+ ir.addr++;
+ opcode = (uint32_t) tmpu8 | opcode << 4;
+ goto reswitch_prefix_add;
+ break;
+
+ /* movups */
+ case 0x0f10:
+ /* movupd */
+ case 0x660f10:
+ /* movss */
+ case 0xf30f10:
+ /* movsd */
+ case 0xf20f10:
+ /* movlps */
+ case 0x0f12:
+ /* movlpd */
+ case 0x660f12:
+ /* movsldup */
+ case 0xf30f12:
+ /* movddup */
+ case 0xf20f12:
+ /* unpcklps */
+ case 0x0f14:
+ /* unpcklpd */
+ case 0x660f14:
+ /* unpckhps */
+ case 0x0f15:
+ /* unpckhpd */
+ case 0x660f15:
+ /* movhps */
+ case 0x0f16:
+ /* movhpd */
+ case 0x660f16:
+ /* movshdup */
+ case 0xf30f16:
+ /* movaps */
+ case 0x0f28:
+ /* movapd */
+ case 0x660f28:
+ /* cvtpi2ps */
+ case 0x0f2a:
+ /* cvtpi2pd */
+ case 0x660f2a:
+ /* cvtsi2ss */
+ case 0xf30f2a:
+ /* cvtsi2sd */
+ case 0xf20f2a:
+ /* cvttps2pi */
+ case 0x0f2c:
+ /* cvttpd2pi */
+ case 0x660f2c:
+ /* cvtps2pi */
+ case 0x0f2d:
+ /* cvtpd2pi */
+ case 0x660f2d:
+ /* pshufb */
+ case 0x660f3800:
+ /* phaddw */
+ case 0x660f3801:
+ /* phaddd */
+ case 0x660f3802:
+ /* phaddsw */
+ case 0x660f3803:
+ /* pmaddubsw */
+ case 0x660f3804:
+ /* phsubw */
+ case 0x660f3805:
+ /* phsubd */
+ case 0x660f3806:
+ /* phaddsw */
+ case 0x660f3807:
+ /* psignb */
+ case 0x660f3808:
+ /* psignw */
+ case 0x660f3809:
+ /* psignd */
+ case 0x660f380a:
+ /* pmulhrsw */
+ case 0x660f380b:
+ /* pblendvb */
+ case 0x660f3810:
+ /* blendvps */
+ case 0x660f3814:
+ /* blendvpd */
+ case 0x660f3815:
+ /* pabsb */
+ case 0x660f381c:
+ /* pabsw */
+ case 0x660f381d:
+ /* pabsd */
+ case 0x660f381e:
+ /* pmovsxbw */
+ case 0x660f3820:
+ /* pmovsxbd */
+ case 0x660f3821:
+ /* pmovsxbq */
+ case 0x660f3822:
+ /* pmovsxwd */
+ case 0x660f3823:
+ /* pmovsxwq */
+ case 0x660f3824:
+ /* pmovsxdq */
+ case 0x660f3825:
+ /* pmuldq */
+ case 0x660f3828:
+ /* pcmpeqq */
+ case 0x660f3829:
+ /* movntdqa */
+ case 0x660f382a:
+ /* roundps */
+ case 0x660f3a08:
+ /* roundpd */
+ case 0x660f3a09:
+ /* roundss */
+ case 0x660f3a0a:
+ /* roundsd */
+ case 0x660f3a0b:
+ /* blendps */
+ case 0x660f3a0c:
+ /* blendpd */
+ case 0x660f3a0d:
+ /* pblendw */
+ case 0x660f3a0e:
+ /* palignr */
+ case 0x660f3a0f:
+ /* pinsrb */
+ case 0x660f3a20:
+ /* insertps */
+ case 0x660f3a21:
+ /* pinsrd pinsrq */
+ case 0x660f3a22:
+ /* dpps */
+ case 0x660f3a40:
+ /* dppd */
+ case 0x660f3a41:
+ /* mpsadbw */
+ case 0x660f3a42:
+ /* pcmpestrm */
+ case 0x660f3a60:
+ /* pcmpestri */
+ case 0x660f3a61:
+ /* pcmpistrm */
+ case 0x660f3a62:
+ /* pcmpistri */
+ case 0x660f3a63:
+ /* sqrtps */
+ case 0x0f51:
+ /* sqrtpd */
+ case 0x660f51:
+ /* sqrtsd */
+ case 0xf20f51:
+ /* sqrtss */
+ case 0xf30f51:
+ /* rsqrtps */
+ case 0x0f52:
+ /* rsqrtss */
+ case 0xf30f52:
+ /* rcpps */
+ case 0x0f53:
+ /* rcpss */
+ case 0xf30f53:
+ /* andps */
+ case 0x0f54:
+ /* andpd */
+ case 0x660f54:
+ /* andnps */
+ case 0x0f55:
+ /* andnpd */
+ case 0x660f55:
+ /* orps */
+ case 0x0f56:
+ /* orpd */
+ case 0x660f56:
+ /* xorps */
+ case 0x0f57:
+ /* xorpd */
+ case 0x660f57:
+ /* addps */
+ case 0x0f58:
+ /* addpd */
+ case 0x660f58:
+ /* addsd */
+ case 0xf20f58:
+ /* addss */
+ case 0xf30f58:
+ /* mulps */
+ case 0x0f59:
+ /* mulpd */
+ case 0x660f59:
+ /* mulsd */
+ case 0xf20f59:
+ /* mulss */
+ case 0xf30f59:
+ /* cvtps2pd */
+ case 0x0f5a:
+ /* cvtpd2ps */
+ case 0x660f5a:
+ /* cvtsd2ss */
+ case 0xf20f5a:
+ /* cvtss2sd */
+ case 0xf30f5a:
+ /* cvtdq2ps */
+ case 0x0f5b:
+ /* cvtps2dq */
+ case 0x660f5b:
+ /* cvttps2dq */
+ case 0xf30f5b:
+ /* subps */
+ case 0x0f5c:
+ /* subpd */
+ case 0x660f5c:
+ /* subsd */
+ case 0xf20f5c:
+ /* subss */
+ case 0xf30f5c:
+ /* minps */
+ case 0x0f5d:
+ /* minpd */
+ case 0x660f5d:
+ /* minsd */
+ case 0xf20f5d:
+ /* minss */
+ case 0xf30f5d:
+ /* divps */
+ case 0x0f5e:
+ /* divpd */
+ case 0x660f5e:
+ /* divsd */
+ case 0xf20f5e:
+ /* divss */
+ case 0xf30f5e:
+ /* maxps */
+ case 0x0f5f:
+ /* maxpd */
+ case 0x660f5f:
+ /* maxsd */
+ case 0xf20f5f:
+ /* maxss */
+ case 0xf30f5f:
+ /* punpcklbw */
+ case 0x660f60:
+ /* punpcklwd */
+ case 0x660f61:
+ /* punpckldq */
+ case 0x660f62:
+ /* packsswb */
+ case 0x660f63:
+ /* pcmpgtb */
+ case 0x660f64:
+ /* pcmpgtw */
+ case 0x660f65:
+ /* pcmpgtl */
+ case 0x660f66:
+ /* packuswb */
+ case 0x660f67:
+ /* punpckhbw */
+ case 0x660f68:
+ /* punpckhwd */
+ case 0x660f69:
+ /* punpckhdq */
+ case 0x660f6a:
+ /* packssdw */
+ case 0x660f6b:
+ /* punpcklqdq */
+ case 0x660f6c:
+ /* punpckhqdq */
+ case 0x660f6d:
+ /* movd */
+ case 0x660f6e:
+ /* movdqa */
+ case 0x660f6f:
+ /* movdqu */
+ case 0xf30f6f:
+ /* pshufd */
+ case 0x660f70:
+ /* pshuflw */
+ case 0xf20f70:
+ /* pshufhw */
+ case 0xf30f70:
+ /* pcmpeqb */
+ case 0x660f74:
+ /* pcmpeqw */
+ case 0x660f75:
+ /* pcmpeql */
+ case 0x660f76:
+ /* haddpd */
+ case 0x660f7c:
+ /* haddps */
+ case 0xf20f7c:
+ /* hsubpd */
+ case 0x660f7d:
+ /* hsubps */
+ case 0xf20f7d:
+ /* movq */
+ case 0xf30f7e:
+ /* cmpps */
+ case 0x0fc2:
+ /* cmppd */
+ case 0x660fc2:
+ /* cmpsd */
+ case 0xf20fc2:
+ /* cmpss */
+ case 0xf30fc2:
+ /* pinsrw */
+ case 0x660fc4:
+ /* shufps */
+ case 0x0fc6:
+ /* shufpd */
+ case 0x660fc6:
+ /* addsubpd */
+ case 0x660fd0:
+ /* addsubps */
+ case 0xf20fd0:
+ /* psrlw */
+ case 0x660fd1:
+ /* psrld */
+ case 0x660fd2:
+ /* psrlq */
+ case 0x660fd3:
+ /* paddq */
+ case 0x660fd4:
+ /* pmullw */
+ case 0x660fd5:
+ /* movq2dq */
+ case 0xf30fd6:
+ /* psubusb */
+ case 0x660fd8:
+ /* psubusw */
+ case 0x660fd9:
+ /* pminub */
+ case 0x660fda:
+ /* pand */
+ case 0x660fdb:
+ /* paddusb */
+ case 0x660fdc:
+ /* paddusw */
+ case 0x660fdd:
+ /* pmaxub */
+ case 0x660fde:
+ /* pandn */
+ case 0x660fdf:
+ /* pavgb */
+ case 0x660fe0:
+ /* psraw */
+ case 0x660fe1:
+ /* psrad */
+ case 0x660fe2:
+ /* pavgw */
+ case 0x660fe3:
+ /* pmulhuw */
+ case 0x660fe4:
+ /* pmulhw */
+ case 0x660fe5:
+ /* cvttpd2dq */
+ case 0x660fe6:
+ /* cvtpd2dq */
+ case 0xf20fe6:
+ /* cvtdq2pd */
+ case 0xf30fe6:
+ /* psubsb */
+ case 0x660fe8:
+ /* psubsw */
+ case 0x660fe9:
+ /* pminsw */
+ case 0x660fea:
+ /* por */
+ case 0x660feb:
+ /* paddsb */
+ case 0x660fec:
+ /* paddsw */
+ case 0x660fed:
+ /* pmaxsw */
+ case 0x660fee:
+ /* pxor */
+ case 0x660fef:
+ /* lddqu */
+ case 0x660ff0:
+ /* psllw */
+ case 0x660ff1:
+ /* pslld */
+ case 0x660ff2:
+ /* psllq */
+ case 0x660ff3:
+ /* pmuludq */
+ case 0x660ff4:
+ /* pmaddwd */
+ case 0x660ff5:
+ /* psadbw */
+ case 0x660ff6:
+ /* psubb */
+ case 0x660ff8:
+ /* psubw */
+ case 0x660ff9:
+ /* psubl */
+ case 0x660ffa:
+ /* psubq */
+ case 0x660ffb:
+ /* paddb */
+ case 0x660ffc:
+ /* paddw */
+ case 0x660ffd:
+ /* paddl */
+ case 0x660ffe:
+ if (i386_record_modrm (&ir))
+ return -1;
+ ir.reg |= rex_r;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.reg))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.reg);
+ if ((opcode & 0xfffffffc) == 0x660f3a60)
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ /* movups */
+ case 0x0f11:
+ /* movupd */
+ case 0x660f11:
+ /* movss */
+ case 0xf30f11:
+ /* movsd */
+ case 0xf20f11:
+ /* movlps */
+ case 0x0f13:
+ /* movlpd */
+ case 0x660f13:
+ /* movhps */
+ case 0x0f17:
+ /* movhpd */
+ case 0x660f17:
+ /* movaps */
+ case 0x0f29:
+ /* movapd */
+ case 0x660f29:
+ /* pextrb */
+ case 0x660f3a14:
+ /* pextrw */
+ case 0x660f3a15:
+ /* pextrd pextrq */
+ case 0x660f3a16:
+ /* extractps */
+ case 0x660f3a17:
+ /* movdqa */
+ case 0x660f7f:
+ /* movdqu */
+ case 0xf30f7f:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ if (opcode == 0x0f13 || opcode == 0x660f13
+ || opcode == 0x0f17 || opcode == 0x660f17)
+ goto no_support;
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ switch (opcode)
+ {
+ case 0x660f3a14:
+ ir.ot = OT_BYTE;
+ break;
+ case 0x660f3a15:
+ ir.ot = OT_WORD;
+ break;
+ case 0x660f3a16:
+ ir.ot = OT_LONG;
+ break;
+ case 0x660f3a17:
+ ir.ot = OT_QUAD;
+ break;
+ default:
+ ir.ot = OT_DQUAD;
+ break;
+ }
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* movntps */
+ case 0x0f2b:
+ /* movntpd */
+ case 0x660f2b:
+ /* movntq */
+ case 0x0fe7:
+ /* movntdq */
+ case 0x660fe7:
+ if (ir.mod == 3)
+ goto no_support;
+ if (opcode == 0x0fe7)
+ ir.ot = OT_QUAD;
+ else
+ ir.ot = OT_DQUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ /* cvttss2si */
+ case 0xf30f2c:
+ /* cvttsd2si */
+ case 0xf20f2c:
+ /* cvtss2si */
+ case 0xf30f2d:
+ /* cvtsd2si */
+ case 0xf20f2d:
+ /* crc32 */
+ case 0xf20f38f0:
+ /* crc32 */
+ case 0xf20f38f1:
+ /* movmskps */
+ case 0x0f50:
+ /* movmskpd */
+ case 0x660f50:
+ /* pextrw */
+ case 0x0fc5:
+ /* pextrw */
+ case 0x660fc5:
+ /* pmovmskb */
+ case 0x0fd7:
+ /* pmovmskb */
+ case 0x660fd7:
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
+ break;
+
+ /* pshufb */
+ case 0x0f3800:
+ /* phaddw */
+ case 0x0f3801:
+ /* phaddd */
+ case 0x0f3802:
+ /* phaddsw */
+ case 0x0f3803:
+ /* pmaddubsw */
+ case 0x0f3804:
+ /* phsubw */
+ case 0x0f3805:
+ /* phsubd */
+ case 0x0f3806:
+ /* phaddsw */
+ case 0x0f3807:
+ /* psignb */
+ case 0x0f3808:
+ /* psignw */
+ case 0x0f3809:
+ /* psignd */
+ case 0x0f380a:
+ /* pmulhrsw */
+ case 0x0f380b:
+ /* pabsb */
+ case 0x0f381c:
+ /* pabsw */
+ case 0x0f381d:
+ /* pabsd */
+ case 0x0f381e:
+ /* packusdw */
+ case 0x0f382b:
+ /* pmovzxbw */
+ case 0x0f3830:
+ /* pmovzxbd */
+ case 0x0f3831:
+ /* pmovzxbq */
+ case 0x0f3832:
+ /* pmovzxwd */
+ case 0x0f3833:
+ /* pmovzxwq */
+ case 0x0f3834:
+ /* pmovzxdq */
+ case 0x0f3835:
+ /* pcmpgtq */
+ case 0x0f3837:
+ /* pminsb */
+ case 0x0f3838:
+ /* pminsd */
+ case 0x0f3839:
+ /* pminuw */
+ case 0x0f383a:
+ /* pminud */
+ case 0x0f383b:
+ /* pmaxsb */
+ case 0x0f383c:
+ /* pmaxsd */
+ case 0x0f383d:
+ /* pmaxuw */
+ case 0x0f383e:
+ /* pmaxud */
+ case 0x0f383f:
+ /* pmulld */
+ case 0x0f3840:
+ /* phminposuw */
+ case 0x0f3841:
+ /* palignr */
+ case 0x0f3a0f:
+ /* punpcklbw */
+ case 0x0f60:
+ /* punpcklwd */
+ case 0x0f61:
+ /* punpckldq */
+ case 0x0f62:
+ /* packsswb */
+ case 0x0f63:
+ /* pcmpgtb */
+ case 0x0f64:
+ /* pcmpgtw */
+ case 0x0f65:
+ /* pcmpgtl */
+ case 0x0f66:
+ /* packuswb */
+ case 0x0f67:
+ /* punpckhbw */
+ case 0x0f68:
+ /* punpckhwd */
+ case 0x0f69:
+ /* punpckhdq */
+ case 0x0f6a:
+ /* packssdw */
+ case 0x0f6b:
+ /* movd */
+ case 0x0f6e:
+ /* movq */
+ case 0x0f6f:
+ /* pshufw */
+ case 0x0f70:
+ /* pcmpeqb */
+ case 0x0f74:
+ /* pcmpeqw */
+ case 0x0f75:
+ /* pcmpeql */
+ case 0x0f76:
+ /* pinsrw */
+ case 0x0fc4:
+ /* psrlw */
+ case 0x0fd1:
+ /* psrld */
+ case 0x0fd2:
+ /* psrlq */
+ case 0x0fd3:
+ /* paddq */
+ case 0x0fd4:
+ /* pmullw */
+ case 0x0fd5:
+ /* movdq2q */
+ case 0xf20fd6:
+ /* psubusb */
+ case 0x0fd8:
+ /* psubusw */
+ case 0x0fd9:
+ /* pminub */
+ case 0x0fda:
+ /* pand */
+ case 0x0fdb:
+ /* paddusb */
+ case 0x0fdc:
+ /* paddusw */
+ case 0x0fdd:
+ /* pmaxub */
+ case 0x0fde:
+ /* pandn */
+ case 0x0fdf:
+ /* pavgb */
+ case 0x0fe0:
+ /* psraw */
+ case 0x0fe1:
+ /* psrad */
+ case 0x0fe2:
+ /* pavgw */
+ case 0x0fe3:
+ /* pmulhuw */
+ case 0x0fe4:
+ /* pmulhw */
+ case 0x0fe5:
+ /* psubsb */
+ case 0x0fe8:
+ /* psubsw */
+ case 0x0fe9:
+ /* pminsw */
+ case 0x0fea:
+ /* por */
+ case 0x0feb:
+ /* paddsb */
+ case 0x0fec:
+ /* paddsw */
+ case 0x0fed:
+ /* pmaxsw */
+ case 0x0fee:
+ /* pxor */
+ case 0x0fef:
+ /* psllw */
+ case 0x0ff1:
+ /* pslld */
+ case 0x0ff2:
+ /* psllq */
+ case 0x0ff3:
+ /* pmuludq */
+ case 0x0ff4:
+ /* pmaddwd */
+ case 0x0ff5:
+ /* psadbw */
+ case 0x0ff6:
+ /* psubb */
+ case 0x0ff8:
+ /* psubw */
+ case 0x0ff9:
+ /* psubl */
+ case 0x0ffa:
+ /* psubq */
+ case 0x0ffb:
+ /* paddb */
+ case 0x0ffc:
+ /* paddw */
+ case 0x0ffd:
+ /* paddl */
+ case 0x0ffe:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.reg);
+ break;
+
+ /* psllw */
+ case 0x0f71:
+ /* pslld */
+ case 0x0f72:
+ /* psllq */
+ case 0x0f73:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.rm);
+ break;
+
+ /* psllw */
+ case 0x660f71:
+ /* pslld */
+ case 0x660f72:
+ /* psllq */
+ case 0x660f73:
+ if (i386_record_modrm (&ir))
+ return -1;
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ break;
+
+ /* movd */
+ case 0x0f7e:
+ /* movd */
+ case 0x660f7e:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ else
+ {
+ if (ir.dflag == 2)
+ ir.ot = OT_QUAD;
+ else
+ ir.ot = OT_LONG;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* movq */
+ case 0x0f7f:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ ir.ot = OT_QUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* popcnt */
+ case 0xf30fb8:
+ if (i386_record_modrm (&ir))
+ return -1;
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ /* movq */
+ case 0x660fd6:
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ ir.ot = OT_QUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ /* ptest */
+ case 0x660f3817:
+ /* ucomiss */
+ case 0x0f2e:
+ /* ucomisd */
+ case 0x660f2e:
+ /* comiss */
+ case 0x0f2f:
+ /* comisd */
+ case 0x660f2f:
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ /* maskmovq */
+ case 0x0ff7:
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_REDI_REGNUM],
+ &tmpulongest);
+ if (record_arch_list_add_mem (tmpulongest, 64))
+ return -1;
+ break;
+
+ /* maskmovdqu */
+ case 0x660ff7:
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_REDI_REGNUM],
+ &tmpulongest);
+ if (record_arch_list_add_mem (tmpulongest, 128))
+ return -1;
+ break;
+
+ default:
+ goto no_support;
+ break;
+ }
+ break;
default:
- if (opcode > 0xff)
- ir.addr -= 2;
- else
- ir.addr -= 1;
goto no_support;
break;
}
@@ -5719,8 +6902,9 @@ i386_process_record (struct gdbarch *gdb
no_support:
printf_unfiltered (_("Process record doesn't support instruction 0x%02x "
- "at address %s.\n"),
- (unsigned int) (opcode), paddress (gdbarch, ir.addr));
+ "at address %s.\n"),
+ (unsigned int) (opcode),
+ paddress (gdbarch, ir.orig_addr));
return -1;
}
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-13 4:28 ` Hui Zhu
@ 2009-12-13 10:35 ` Hui Zhu
2009-12-14 18:24 ` Michael Snyder
1 sibling, 0 replies; 39+ messages in thread
From: Hui Zhu @ 2009-12-13 10:35 UTC (permalink / raw)
To: Michael Snyder; +Cc: gdb-patches ml, Mark Kettenis
Sorry guys, I make a mistake, sigall-reverse.exp sigall-precsave.exp
is OK with this patch.
Thanks,
Hui
On Sun, Dec 13, 2009 at 00:59, Hui Zhu <teawater@gmail.com> wrote:
> Hi,
>
> This the update sse patch that follow cvs-head update.
>
> And about the testcase, the sse patch fix a lot of fail because some
> code in testcase use sse insn.
> Now, I just got fail in solib-precsave.exp sigall-reverse.exp
> sigall-precsave.exp.
>
> solib-precsave.exp, this fail is because the core solib error that I
> report in before.
> sigall-reverse.exp sigall-precsave.exp
> sigall-reverse.exp sigall-precsave.exp is because some behavior error.
> I need check x86 and amd64's different. And try fix it in yesterday.
>
> Thanks,
> Hui
>
> 2009-12-13 Hui Zhu <teawater@gmail.com>
>
> * i386-tdep.c (OT_DQUAD): New enum.
> (i386_process_record): Add code for MMX, 3DNow!, SSE, SSE2,
> SSE3, SSSE3 and SSE4.
>
> ---
> i386-tdep.c | 1216 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 1200 insertions(+), 16 deletions(-)
>
> --- a/i386-tdep.c
> +++ b/i386-tdep.c
> @@ -2848,6 +2848,7 @@ enum
> OT_WORD,
> OT_LONG,
> OT_QUAD,
> + OT_DQUAD,
> };
>
> /* i386 arith/logic operations */
> @@ -3295,7 +3296,7 @@ i386_process_record (struct gdbarch *gdb
> ir.dflag = 1;
> ir.override = -1;
> ir.popl_esp_hack = 0;
> - ir.regmap = gdbarch_tdep (gdbarch)->record_regmap;
> + ir.regmap = tdep->record_regmap;
> ir.gdbarch = gdbarch;
>
> if (record_debug > 1)
> @@ -3413,7 +3414,7 @@ i386_process_record (struct gdbarch *gdb
> return -1;
> }
> ir.addr++;
> - opcode = (uint16_t) tmpu8 | 0x0f00;
> + opcode = (uint32_t) tmpu8 | 0x0f00;
> goto reswitch;
> break;
>
> @@ -5217,7 +5218,7 @@ i386_process_record (struct gdbarch *gdb
> }
> ir.addr++;
> if (tmpu8 != 0x80
> - || gdbarch_tdep (gdbarch)->i386_intx80_record == NULL)
> + || tdep->i386_intx80_record == NULL)
> {
> printf_unfiltered (_("Process record doesn't support "
> "instruction int 0x%02x.\n"),
> @@ -5225,7 +5226,7 @@ i386_process_record (struct gdbarch *gdb
> ir.addr -= 2;
> goto no_support;
> }
> - ret = gdbarch_tdep (gdbarch)->i386_intx80_record (ir.regcache);
> + ret = tdep->i386_intx80_record (ir.regcache);
> if (ret)
> return ret;
> }
> @@ -5322,14 +5323,14 @@ i386_process_record (struct gdbarch *gdb
> ir.addr -= 2;
> goto no_support;
> }
> - if (gdbarch_tdep (gdbarch)->i386_sysenter_record == NULL)
> + if (tdep->i386_sysenter_record == NULL)
> {
> printf_unfiltered (_("Process record doesn't support "
> "instruction sysenter.\n"));
> ir.addr -= 2;
> goto no_support;
> }
> - ret = gdbarch_tdep (gdbarch)->i386_sysenter_record (ir.regcache);
> + ret = tdep->i386_sysenter_record (ir.regcache);
> if (ret)
> return ret;
> }
> @@ -5347,14 +5348,14 @@ i386_process_record (struct gdbarch *gdb
> case 0x0f05:
> {
> int ret;
> - if (gdbarch_tdep (gdbarch)->i386_syscall_record == NULL)
> + if (tdep->i386_syscall_record == NULL)
> {
> printf_unfiltered (_("Process record doesn't support "
> "instruction syscall.\n"));
> ir.addr -= 2;
> goto no_support;
> }
> - ret = gdbarch_tdep (gdbarch)->i386_syscall_record (ir.regcache);
> + ret = tdep->i386_syscall_record (ir.regcache);
> if (ret)
> return ret;
> }
> @@ -5698,14 +5699,1196 @@ i386_process_record (struct gdbarch *gdb
> I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> break;
>
> - /* MMX/SSE/SSE2/PNI support */
> - /* XXX */
> + /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
> + /* 3DNow! prefetch */
> + case 0x0f0d:
> + break;
> +
> + /* 3DNow! femms */
> + case 0x0f0e:
> + /* emms */
> + case 0x0f77:
> + if (i386_fpc_regnum_p (gdbarch, I387_FTAG_REGNUM(tdep)))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache, I387_FTAG_REGNUM(tdep));
> + break;
> +
> + /* 3DNow! data */
> + case 0x0f0f:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (target_read_memory (ir.addr, &tmpu8, 1))
> + {
> + if (record_debug)
> + printf_unfiltered (_("Process record: error reading memory at "
> + "addr %s len = 1.\n"),
> + paddress (gdbarch, ir.addr));
> + return -1;
> + }
> + ir.addr++;
> + switch (tmpu8)
> + {
> + /* 3DNow! pi2fw */
> + case 0x0c:
> + /* 3DNow! pi2fd */
> + case 0x0d:
> + /* 3DNow! pf2iw */
> + case 0x1c:
> + /* 3DNow! pf2id */
> + case 0x1d:
> + /* 3DNow! pfnacc */
> + case 0x8a:
> + /* 3DNow! pfpnacc */
> + case 0x8e:
> + /* 3DNow! pfcmpge */
> + case 0x90:
> + /* 3DNow! pfmin */
> + case 0x94:
> + /* 3DNow! pfrcp */
> + case 0x96:
> + /* 3DNow! pfrsqrt */
> + case 0x97:
> + /* 3DNow! pfsub */
> + case 0x9a:
> + /* 3DNow! pfadd */
> + case 0x9e:
> + /* 3DNow! pfcmpgt */
> + case 0xa0:
> + /* 3DNow! pfmax */
> + case 0xa4:
> + /* 3DNow! pfrcpit1 */
> + case 0xa6:
> + /* 3DNow! pfrsqit1 */
> + case 0xa7:
> + /* 3DNow! pfsubr */
> + case 0xaa:
> + /* 3DNow! pfacc */
> + case 0xae:
> + /* 3DNow! pfcmpeq */
> + case 0xb0:
> + /* 3DNow! pfmul */
> + case 0xb4:
> + /* 3DNow! pfrcpit2 */
> + case 0xb6:
> + /* 3DNow! pmulhrw */
> + case 0xb7:
> + /* 3DNow! pswapd */
> + case 0xbb:
> + /* 3DNow! pavgusb */
> + case 0xbf:
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
> + goto no_support_3dnow_data;
> + record_arch_list_add_reg (ir.regcache, ir.reg);
> + break;
> +
> + default:
> +no_support_3dnow_data:
> + opcode = (opcode << 8) | tmpu8;
> + goto no_support;
> + break;
> + }
> + break;
> +
> + /* rsm */
> + case 0x0faa:
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
> + break;
> +
> + case 0x0fae:
> + if (i386_record_modrm (&ir))
> + return -1;
> + switch(ir.reg)
> + {
> + /* fxsave */
> + case 0:
> + {
> + uint64_t tmpu64;
> +
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + if (i386_record_lea_modrm_addr (&ir, &tmpu64))
> + return -1;
> + if (record_arch_list_add_mem (tmpu64, 512))
> + return -1;
> + }
> + break;
> +
> + /* fxrstor */
> + case 1:
> + {
> + int i;
> +
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> +
> + for (i = I387_MM0_REGNUM (tdep);
> + i386_mmx_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> +
> + for (i = I387_XMM0_REGNUM (tdep);
> + i386_sse_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> +
> + if (i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
> + record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
> +
> + for (i = I387_ST0_REGNUM (tdep);
> + i386_fp_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> +
> + for (i = I387_FCTRL_REGNUM (tdep);
> + i386_fpc_regnum_p (gdbarch, i); i++)
> + record_arch_list_add_reg (ir.regcache, i);
> + }
> + break;
> +
> + /* ldmxcsr */
> + case 2:
> + if (!i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
> + break;
> +
> + /* stmxcsr */
> + case 3:
> + ir.ot = OT_LONG;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + break;
> +
> + /* lfence */
> + case 5:
> + /* mfence */
> + case 6:
> + /* sfence clflush */
> + case 7:
> + break;
> +
> + default:
> + opcode = (opcode << 8) | ir.modrm;
> + goto no_support;
> + break;
> + }
> + break;
> +
> + /* movnti */
> + case 0x0fc3:
> + ir.ot = (ir.dflag == 2) ? OT_QUAD : OT_LONG;
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + goto no_support;
> + ir.reg |= rex_r;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + break;
> +
> + /* Add prefix to opcode. */
> + case 0x0f10:
> + case 0x0f11:
> + case 0x0f12:
> + case 0x0f13:
> + case 0x0f14:
> + case 0x0f16:
> + case 0x0f17:
> + case 0x0f28:
> + case 0x0f29:
> + case 0x0f2a:
> + case 0x0f2b:
> + case 0x0f2c:
> + case 0x0f2d:
> + case 0x0f2e:
> + case 0x0f2f:
> + case 0x0f38:
> + case 0x0f39:
> + case 0x0f3a:
> + case 0x0f50:
> + case 0x0f51:
> + case 0x0f52:
> + case 0x0f53:
> + case 0x0f54:
> + case 0x0f55:
> + case 0x0f56:
> + case 0x0f57:
> + case 0x0f58:
> + case 0x0f59:
> + case 0x0f5a:
> + case 0x0f5b:
> + case 0x0f5c:
> + case 0x0f5d:
> + case 0x0f5e:
> + case 0x0f5f:
> + case 0x0f60:
> + case 0x0f61:
> + case 0x0f62:
> + case 0x0f63:
> + case 0x0f64:
> + case 0x0f65:
> + case 0x0f66:
> + case 0x0f67:
> + case 0x0f68:
> + case 0x0f69:
> + case 0x0f6a:
> + case 0x0f6b:
> + case 0x0f6c:
> + case 0x0f6d:
> + case 0x0f6e:
> + case 0x0f6f:
> + case 0x0f70:
> + case 0x0f71:
> + case 0x0f72:
> + case 0x0f73:
> + case 0x0f74:
> + case 0x0f75:
> + case 0x0f76:
> + case 0x0f7c:
> + case 0x0f7d:
> + case 0x0f7e:
> + case 0x0f7f:
> + case 0x0fb8:
> + case 0x0fc2:
> + case 0x0fc4:
> + case 0x0fc5:
> + case 0x0fc6:
> + case 0x0fd0:
> + case 0x0fd1:
> + case 0x0fd2:
> + case 0x0fd3:
> + case 0x0fd4:
> + case 0x0fd5:
> + case 0x0fd6:
> + case 0x0fd7:
> + case 0x0fd8:
> + case 0x0fd9:
> + case 0x0fda:
> + case 0x0fdb:
> + case 0x0fdc:
> + case 0x0fdd:
> + case 0x0fde:
> + case 0x0fdf:
> + case 0x0fe0:
> + case 0x0fe1:
> + case 0x0fe2:
> + case 0x0fe3:
> + case 0x0fe4:
> + case 0x0fe5:
> + case 0x0fe6:
> + case 0x0fe7:
> + case 0x0fe8:
> + case 0x0fe9:
> + case 0x0fea:
> + case 0x0feb:
> + case 0x0fec:
> + case 0x0fed:
> + case 0x0fee:
> + case 0x0fef:
> + case 0x0ff0:
> + case 0x0ff1:
> + case 0x0ff2:
> + case 0x0ff3:
> + case 0x0ff4:
> + case 0x0ff5:
> + case 0x0ff6:
> + case 0x0ff7:
> + case 0x0ff8:
> + case 0x0ff9:
> + case 0x0ffa:
> + case 0x0ffb:
> + case 0x0ffc:
> + case 0x0ffd:
> + case 0x0ffe:
> + switch (prefixes)
> + {
> + case PREFIX_REPNZ:
> + opcode |= 0xf20000;
> + break;
> + case PREFIX_DATA:
> + opcode |= 0x660000;
> + break;
> + case PREFIX_REPZ:
> + opcode |= 0xf30000;
> + break;
> + }
> +reswitch_prefix_add:
> + switch (opcode)
> + {
> + case 0x0f38:
> + case 0x660f38:
> + case 0xf20f38:
> + case 0x0f3a:
> + case 0x660f3a:
> + if (target_read_memory (ir.addr, &tmpu8, 1))
> + {
> + if (record_debug)
> + printf_unfiltered (_("Process record: error reading memory at "
> + "addr %s len = 1.\n"),
> + paddress (gdbarch, ir.addr));
> + return -1;
> + }
> + ir.addr++;
> + opcode = (uint32_t) tmpu8 | opcode << 4;
> + goto reswitch_prefix_add;
> + break;
> +
> + /* movups */
> + case 0x0f10:
> + /* movupd */
> + case 0x660f10:
> + /* movss */
> + case 0xf30f10:
> + /* movsd */
> + case 0xf20f10:
> + /* movlps */
> + case 0x0f12:
> + /* movlpd */
> + case 0x660f12:
> + /* movsldup */
> + case 0xf30f12:
> + /* movddup */
> + case 0xf20f12:
> + /* unpcklps */
> + case 0x0f14:
> + /* unpcklpd */
> + case 0x660f14:
> + /* unpckhps */
> + case 0x0f15:
> + /* unpckhpd */
> + case 0x660f15:
> + /* movhps */
> + case 0x0f16:
> + /* movhpd */
> + case 0x660f16:
> + /* movshdup */
> + case 0xf30f16:
> + /* movaps */
> + case 0x0f28:
> + /* movapd */
> + case 0x660f28:
> + /* cvtpi2ps */
> + case 0x0f2a:
> + /* cvtpi2pd */
> + case 0x660f2a:
> + /* cvtsi2ss */
> + case 0xf30f2a:
> + /* cvtsi2sd */
> + case 0xf20f2a:
> + /* cvttps2pi */
> + case 0x0f2c:
> + /* cvttpd2pi */
> + case 0x660f2c:
> + /* cvtps2pi */
> + case 0x0f2d:
> + /* cvtpd2pi */
> + case 0x660f2d:
> + /* pshufb */
> + case 0x660f3800:
> + /* phaddw */
> + case 0x660f3801:
> + /* phaddd */
> + case 0x660f3802:
> + /* phaddsw */
> + case 0x660f3803:
> + /* pmaddubsw */
> + case 0x660f3804:
> + /* phsubw */
> + case 0x660f3805:
> + /* phsubd */
> + case 0x660f3806:
> + /* phaddsw */
> + case 0x660f3807:
> + /* psignb */
> + case 0x660f3808:
> + /* psignw */
> + case 0x660f3809:
> + /* psignd */
> + case 0x660f380a:
> + /* pmulhrsw */
> + case 0x660f380b:
> + /* pblendvb */
> + case 0x660f3810:
> + /* blendvps */
> + case 0x660f3814:
> + /* blendvpd */
> + case 0x660f3815:
> + /* pabsb */
> + case 0x660f381c:
> + /* pabsw */
> + case 0x660f381d:
> + /* pabsd */
> + case 0x660f381e:
> + /* pmovsxbw */
> + case 0x660f3820:
> + /* pmovsxbd */
> + case 0x660f3821:
> + /* pmovsxbq */
> + case 0x660f3822:
> + /* pmovsxwd */
> + case 0x660f3823:
> + /* pmovsxwq */
> + case 0x660f3824:
> + /* pmovsxdq */
> + case 0x660f3825:
> + /* pmuldq */
> + case 0x660f3828:
> + /* pcmpeqq */
> + case 0x660f3829:
> + /* movntdqa */
> + case 0x660f382a:
> + /* roundps */
> + case 0x660f3a08:
> + /* roundpd */
> + case 0x660f3a09:
> + /* roundss */
> + case 0x660f3a0a:
> + /* roundsd */
> + case 0x660f3a0b:
> + /* blendps */
> + case 0x660f3a0c:
> + /* blendpd */
> + case 0x660f3a0d:
> + /* pblendw */
> + case 0x660f3a0e:
> + /* palignr */
> + case 0x660f3a0f:
> + /* pinsrb */
> + case 0x660f3a20:
> + /* insertps */
> + case 0x660f3a21:
> + /* pinsrd pinsrq */
> + case 0x660f3a22:
> + /* dpps */
> + case 0x660f3a40:
> + /* dppd */
> + case 0x660f3a41:
> + /* mpsadbw */
> + case 0x660f3a42:
> + /* pcmpestrm */
> + case 0x660f3a60:
> + /* pcmpestri */
> + case 0x660f3a61:
> + /* pcmpistrm */
> + case 0x660f3a62:
> + /* pcmpistri */
> + case 0x660f3a63:
> + /* sqrtps */
> + case 0x0f51:
> + /* sqrtpd */
> + case 0x660f51:
> + /* sqrtsd */
> + case 0xf20f51:
> + /* sqrtss */
> + case 0xf30f51:
> + /* rsqrtps */
> + case 0x0f52:
> + /* rsqrtss */
> + case 0xf30f52:
> + /* rcpps */
> + case 0x0f53:
> + /* rcpss */
> + case 0xf30f53:
> + /* andps */
> + case 0x0f54:
> + /* andpd */
> + case 0x660f54:
> + /* andnps */
> + case 0x0f55:
> + /* andnpd */
> + case 0x660f55:
> + /* orps */
> + case 0x0f56:
> + /* orpd */
> + case 0x660f56:
> + /* xorps */
> + case 0x0f57:
> + /* xorpd */
> + case 0x660f57:
> + /* addps */
> + case 0x0f58:
> + /* addpd */
> + case 0x660f58:
> + /* addsd */
> + case 0xf20f58:
> + /* addss */
> + case 0xf30f58:
> + /* mulps */
> + case 0x0f59:
> + /* mulpd */
> + case 0x660f59:
> + /* mulsd */
> + case 0xf20f59:
> + /* mulss */
> + case 0xf30f59:
> + /* cvtps2pd */
> + case 0x0f5a:
> + /* cvtpd2ps */
> + case 0x660f5a:
> + /* cvtsd2ss */
> + case 0xf20f5a:
> + /* cvtss2sd */
> + case 0xf30f5a:
> + /* cvtdq2ps */
> + case 0x0f5b:
> + /* cvtps2dq */
> + case 0x660f5b:
> + /* cvttps2dq */
> + case 0xf30f5b:
> + /* subps */
> + case 0x0f5c:
> + /* subpd */
> + case 0x660f5c:
> + /* subsd */
> + case 0xf20f5c:
> + /* subss */
> + case 0xf30f5c:
> + /* minps */
> + case 0x0f5d:
> + /* minpd */
> + case 0x660f5d:
> + /* minsd */
> + case 0xf20f5d:
> + /* minss */
> + case 0xf30f5d:
> + /* divps */
> + case 0x0f5e:
> + /* divpd */
> + case 0x660f5e:
> + /* divsd */
> + case 0xf20f5e:
> + /* divss */
> + case 0xf30f5e:
> + /* maxps */
> + case 0x0f5f:
> + /* maxpd */
> + case 0x660f5f:
> + /* maxsd */
> + case 0xf20f5f:
> + /* maxss */
> + case 0xf30f5f:
> + /* punpcklbw */
> + case 0x660f60:
> + /* punpcklwd */
> + case 0x660f61:
> + /* punpckldq */
> + case 0x660f62:
> + /* packsswb */
> + case 0x660f63:
> + /* pcmpgtb */
> + case 0x660f64:
> + /* pcmpgtw */
> + case 0x660f65:
> + /* pcmpgtl */
> + case 0x660f66:
> + /* packuswb */
> + case 0x660f67:
> + /* punpckhbw */
> + case 0x660f68:
> + /* punpckhwd */
> + case 0x660f69:
> + /* punpckhdq */
> + case 0x660f6a:
> + /* packssdw */
> + case 0x660f6b:
> + /* punpcklqdq */
> + case 0x660f6c:
> + /* punpckhqdq */
> + case 0x660f6d:
> + /* movd */
> + case 0x660f6e:
> + /* movdqa */
> + case 0x660f6f:
> + /* movdqu */
> + case 0xf30f6f:
> + /* pshufd */
> + case 0x660f70:
> + /* pshuflw */
> + case 0xf20f70:
> + /* pshufhw */
> + case 0xf30f70:
> + /* pcmpeqb */
> + case 0x660f74:
> + /* pcmpeqw */
> + case 0x660f75:
> + /* pcmpeql */
> + case 0x660f76:
> + /* haddpd */
> + case 0x660f7c:
> + /* haddps */
> + case 0xf20f7c:
> + /* hsubpd */
> + case 0x660f7d:
> + /* hsubps */
> + case 0xf20f7d:
> + /* movq */
> + case 0xf30f7e:
> + /* cmpps */
> + case 0x0fc2:
> + /* cmppd */
> + case 0x660fc2:
> + /* cmpsd */
> + case 0xf20fc2:
> + /* cmpss */
> + case 0xf30fc2:
> + /* pinsrw */
> + case 0x660fc4:
> + /* shufps */
> + case 0x0fc6:
> + /* shufpd */
> + case 0x660fc6:
> + /* addsubpd */
> + case 0x660fd0:
> + /* addsubps */
> + case 0xf20fd0:
> + /* psrlw */
> + case 0x660fd1:
> + /* psrld */
> + case 0x660fd2:
> + /* psrlq */
> + case 0x660fd3:
> + /* paddq */
> + case 0x660fd4:
> + /* pmullw */
> + case 0x660fd5:
> + /* movq2dq */
> + case 0xf30fd6:
> + /* psubusb */
> + case 0x660fd8:
> + /* psubusw */
> + case 0x660fd9:
> + /* pminub */
> + case 0x660fda:
> + /* pand */
> + case 0x660fdb:
> + /* paddusb */
> + case 0x660fdc:
> + /* paddusw */
> + case 0x660fdd:
> + /* pmaxub */
> + case 0x660fde:
> + /* pandn */
> + case 0x660fdf:
> + /* pavgb */
> + case 0x660fe0:
> + /* psraw */
> + case 0x660fe1:
> + /* psrad */
> + case 0x660fe2:
> + /* pavgw */
> + case 0x660fe3:
> + /* pmulhuw */
> + case 0x660fe4:
> + /* pmulhw */
> + case 0x660fe5:
> + /* cvttpd2dq */
> + case 0x660fe6:
> + /* cvtpd2dq */
> + case 0xf20fe6:
> + /* cvtdq2pd */
> + case 0xf30fe6:
> + /* psubsb */
> + case 0x660fe8:
> + /* psubsw */
> + case 0x660fe9:
> + /* pminsw */
> + case 0x660fea:
> + /* por */
> + case 0x660feb:
> + /* paddsb */
> + case 0x660fec:
> + /* paddsw */
> + case 0x660fed:
> + /* pmaxsw */
> + case 0x660fee:
> + /* pxor */
> + case 0x660fef:
> + /* lddqu */
> + case 0x660ff0:
> + /* psllw */
> + case 0x660ff1:
> + /* pslld */
> + case 0x660ff2:
> + /* psllq */
> + case 0x660ff3:
> + /* pmuludq */
> + case 0x660ff4:
> + /* pmaddwd */
> + case 0x660ff5:
> + /* psadbw */
> + case 0x660ff6:
> + /* psubb */
> + case 0x660ff8:
> + /* psubw */
> + case 0x660ff9:
> + /* psubl */
> + case 0x660ffa:
> + /* psubq */
> + case 0x660ffb:
> + /* paddb */
> + case 0x660ffc:
> + /* paddw */
> + case 0x660ffd:
> + /* paddl */
> + case 0x660ffe:
> + if (i386_record_modrm (&ir))
> + return -1;
> + ir.reg |= rex_r;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.reg))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.reg);
> + if ((opcode & 0xfffffffc) == 0x660f3a60)
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + break;
> +
> + /* movups */
> + case 0x0f11:
> + /* movupd */
> + case 0x660f11:
> + /* movss */
> + case 0xf30f11:
> + /* movsd */
> + case 0xf20f11:
> + /* movlps */
> + case 0x0f13:
> + /* movlpd */
> + case 0x660f13:
> + /* movhps */
> + case 0x0f17:
> + /* movhpd */
> + case 0x660f17:
> + /* movaps */
> + case 0x0f29:
> + /* movapd */
> + case 0x660f29:
> + /* pextrb */
> + case 0x660f3a14:
> + /* pextrw */
> + case 0x660f3a15:
> + /* pextrd pextrq */
> + case 0x660f3a16:
> + /* extractps */
> + case 0x660f3a17:
> + /* movdqa */
> + case 0x660f7f:
> + /* movdqu */
> + case 0xf30f7f:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + {
> + if (opcode == 0x0f13 || opcode == 0x660f13
> + || opcode == 0x0f17 || opcode == 0x660f17)
> + goto no_support;
> + ir.rm |= ir.rex_b;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM
> (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.rm);
> + }
> + else
> + {
> + switch (opcode)
> + {
> + case 0x660f3a14:
> + ir.ot = OT_BYTE;
> + break;
> + case 0x660f3a15:
> + ir.ot = OT_WORD;
> + break;
> + case 0x660f3a16:
> + ir.ot = OT_LONG;
> + break;
> + case 0x660f3a17:
> + ir.ot = OT_QUAD;
> + break;
> + default:
> + ir.ot = OT_DQUAD;
> + break;
> + }
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* movntps */
> + case 0x0f2b:
> + /* movntpd */
> + case 0x660f2b:
> + /* movntq */
> + case 0x0fe7:
> + /* movntdq */
> + case 0x660fe7:
> + if (ir.mod == 3)
> + goto no_support;
> + if (opcode == 0x0fe7)
> + ir.ot = OT_QUAD;
> + else
> + ir.ot = OT_DQUAD;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + break;
> +
> + /* cvttss2si */
> + case 0xf30f2c:
> + /* cvttsd2si */
> + case 0xf20f2c:
> + /* cvtss2si */
> + case 0xf30f2d:
> + /* cvtsd2si */
> + case 0xf20f2d:
> + /* crc32 */
> + case 0xf20f38f0:
> + /* crc32 */
> + case 0xf20f38f1:
> + /* movmskps */
> + case 0x0f50:
> + /* movmskpd */
> + case 0x660f50:
> + /* pextrw */
> + case 0x0fc5:
> + /* pextrw */
> + case 0x660fc5:
> + /* pmovmskb */
> + case 0x0fd7:
> + /* pmovmskb */
> + case 0x660fd7:
> + I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
> + break;
> +
> + /* pshufb */
> + case 0x0f3800:
> + /* phaddw */
> + case 0x0f3801:
> + /* phaddd */
> + case 0x0f3802:
> + /* phaddsw */
> + case 0x0f3803:
> + /* pmaddubsw */
> + case 0x0f3804:
> + /* phsubw */
> + case 0x0f3805:
> + /* phsubd */
> + case 0x0f3806:
> + /* phaddsw */
> + case 0x0f3807:
> + /* psignb */
> + case 0x0f3808:
> + /* psignw */
> + case 0x0f3809:
> + /* psignd */
> + case 0x0f380a:
> + /* pmulhrsw */
> + case 0x0f380b:
> + /* pabsb */
> + case 0x0f381c:
> + /* pabsw */
> + case 0x0f381d:
> + /* pabsd */
> + case 0x0f381e:
> + /* packusdw */
> + case 0x0f382b:
> + /* pmovzxbw */
> + case 0x0f3830:
> + /* pmovzxbd */
> + case 0x0f3831:
> + /* pmovzxbq */
> + case 0x0f3832:
> + /* pmovzxwd */
> + case 0x0f3833:
> + /* pmovzxwq */
> + case 0x0f3834:
> + /* pmovzxdq */
> + case 0x0f3835:
> + /* pcmpgtq */
> + case 0x0f3837:
> + /* pminsb */
> + case 0x0f3838:
> + /* pminsd */
> + case 0x0f3839:
> + /* pminuw */
> + case 0x0f383a:
> + /* pminud */
> + case 0x0f383b:
> + /* pmaxsb */
> + case 0x0f383c:
> + /* pmaxsd */
> + case 0x0f383d:
> + /* pmaxuw */
> + case 0x0f383e:
> + /* pmaxud */
> + case 0x0f383f:
> + /* pmulld */
> + case 0x0f3840:
> + /* phminposuw */
> + case 0x0f3841:
> + /* palignr */
> + case 0x0f3a0f:
> + /* punpcklbw */
> + case 0x0f60:
> + /* punpcklwd */
> + case 0x0f61:
> + /* punpckldq */
> + case 0x0f62:
> + /* packsswb */
> + case 0x0f63:
> + /* pcmpgtb */
> + case 0x0f64:
> + /* pcmpgtw */
> + case 0x0f65:
> + /* pcmpgtl */
> + case 0x0f66:
> + /* packuswb */
> + case 0x0f67:
> + /* punpckhbw */
> + case 0x0f68:
> + /* punpckhwd */
> + case 0x0f69:
> + /* punpckhdq */
> + case 0x0f6a:
> + /* packssdw */
> + case 0x0f6b:
> + /* movd */
> + case 0x0f6e:
> + /* movq */
> + case 0x0f6f:
> + /* pshufw */
> + case 0x0f70:
> + /* pcmpeqb */
> + case 0x0f74:
> + /* pcmpeqw */
> + case 0x0f75:
> + /* pcmpeql */
> + case 0x0f76:
> + /* pinsrw */
> + case 0x0fc4:
> + /* psrlw */
> + case 0x0fd1:
> + /* psrld */
> + case 0x0fd2:
> + /* psrlq */
> + case 0x0fd3:
> + /* paddq */
> + case 0x0fd4:
> + /* pmullw */
> + case 0x0fd5:
> + /* movdq2q */
> + case 0xf20fd6:
> + /* psubusb */
> + case 0x0fd8:
> + /* psubusw */
> + case 0x0fd9:
> + /* pminub */
> + case 0x0fda:
> + /* pand */
> + case 0x0fdb:
> + /* paddusb */
> + case 0x0fdc:
> + /* paddusw */
> + case 0x0fdd:
> + /* pmaxub */
> + case 0x0fde:
> + /* pandn */
> + case 0x0fdf:
> + /* pavgb */
> + case 0x0fe0:
> + /* psraw */
> + case 0x0fe1:
> + /* psrad */
> + case 0x0fe2:
> + /* pavgw */
> + case 0x0fe3:
> + /* pmulhuw */
> + case 0x0fe4:
> + /* pmulhw */
> + case 0x0fe5:
> + /* psubsb */
> + case 0x0fe8:
> + /* psubsw */
> + case 0x0fe9:
> + /* pminsw */
> + case 0x0fea:
> + /* por */
> + case 0x0feb:
> + /* paddsb */
> + case 0x0fec:
> + /* paddsw */
> + case 0x0fed:
> + /* pmaxsw */
> + case 0x0fee:
> + /* pxor */
> + case 0x0fef:
> + /* psllw */
> + case 0x0ff1:
> + /* pslld */
> + case 0x0ff2:
> + /* psllq */
> + case 0x0ff3:
> + /* pmuludq */
> + case 0x0ff4:
> + /* pmaddwd */
> + case 0x0ff5:
> + /* psadbw */
> + case 0x0ff6:
> + /* psubb */
> + case 0x0ff8:
> + /* psubw */
> + case 0x0ff9:
> + /* psubl */
> + case 0x0ffa:
> + /* psubq */
> + case 0x0ffb:
> + /* paddb */
> + case 0x0ffc:
> + /* paddw */
> + case 0x0ffd:
> + /* paddl */
> + case 0x0ffe:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_MM0_REGNUM (tdep) + ir.reg);
> + break;
> +
> + /* psllw */
> + case 0x0f71:
> + /* pslld */
> + case 0x0f72:
> + /* psllq */
> + case 0x0f73:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_MM0_REGNUM (tdep) + ir.rm);
> + break;
> +
> + /* psllw */
> + case 0x660f71:
> + /* pslld */
> + case 0x660f72:
> + /* psllq */
> + case 0x660f73:
> + if (i386_record_modrm (&ir))
> + return -1;
> + ir.rm |= ir.rex_b;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.rm);
> + break;
> +
> + /* movd */
> + case 0x0f7e:
> + /* movd */
> + case 0x660f7e:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
> + else
> + {
> + if (ir.dflag == 2)
> + ir.ot = OT_QUAD;
> + else
> + ir.ot = OT_LONG;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* movq */
> + case 0x0f7f:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + {
> + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_MM0_REGNUM (tdep) + ir.rm);
> + }
> + else
> + {
> + ir.ot = OT_QUAD;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* popcnt */
> + case 0xf30fb8:
> + if (i386_record_modrm (&ir))
> + return -1;
> + I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + break;
> +
> + /* movq */
> + case 0x660fd6:
> + if (i386_record_modrm (&ir))
> + return -1;
> + if (ir.mod == 3)
> + {
> + ir.rm |= ir.rex_b;
> + if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM
> (tdep) + ir.rm))
> + goto no_support;
> + record_arch_list_add_reg (ir.regcache,
> + I387_XMM0_REGNUM (tdep) + ir.rm);
> + }
> + else
> + {
> + ir.ot = OT_QUAD;
> + if (i386_record_lea_modrm (&ir))
> + return -1;
> + }
> + break;
> +
> + /* ptest */
> + case 0x660f3817:
> + /* ucomiss */
> + case 0x0f2e:
> + /* ucomisd */
> + case 0x660f2e:
> + /* comiss */
> + case 0x0f2f:
> + /* comisd */
> + case 0x660f2f:
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + break;
> +
> + /* maskmovq */
> + case 0x0ff7:
> + regcache_raw_read_unsigned (ir.regcache,
> + ir.regmap[X86_RECORD_REDI_REGNUM],
> + &tmpulongest);
> + if (record_arch_list_add_mem (tmpulongest, 64))
> + return -1;
> + break;
> +
> + /* maskmovdqu */
> + case 0x660ff7:
> + regcache_raw_read_unsigned (ir.regcache,
> + ir.regmap[X86_RECORD_REDI_REGNUM],
> + &tmpulongest);
> + if (record_arch_list_add_mem (tmpulongest, 128))
> + return -1;
> + break;
> +
> + default:
> + goto no_support;
> + break;
> + }
> + break;
>
> default:
> - if (opcode > 0xff)
> - ir.addr -= 2;
> - else
> - ir.addr -= 1;
> goto no_support;
> break;
> }
> @@ -5719,8 +6902,9 @@ i386_process_record (struct gdbarch *gdb
>
> no_support:
> printf_unfiltered (_("Process record doesn't support instruction 0x%02x "
> - "at address %s.\n"),
> - (unsigned int) (opcode), paddress (gdbarch, ir.addr));
> + "at address %s.\n"),
> + (unsigned int) (opcode),
> + paddress (gdbarch, ir.orig_addr));
> return -1;
> }
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-13 4:28 ` Hui Zhu
2009-12-13 10:35 ` Hui Zhu
@ 2009-12-14 18:24 ` Michael Snyder
2009-12-15 1:47 ` Hui Zhu
1 sibling, 1 reply; 39+ messages in thread
From: Michael Snyder @ 2009-12-14 18:24 UTC (permalink / raw)
To: Hui Zhu; +Cc: gdb-patches ml
Hui Zhu wrote:
> solib-precsave.exp, this fail is because the core solib error that I
> report in before.
Can you say more about that?
I don't remember it, and it never fails for me (before or after
this patch).
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-14 18:24 ` Michael Snyder
@ 2009-12-15 1:47 ` Hui Zhu
2009-12-18 19:44 ` Michael Snyder
0 siblings, 1 reply; 39+ messages in thread
From: Hui Zhu @ 2009-12-15 1:47 UTC (permalink / raw)
To: Michael Snyder; +Cc: gdb-patches ml
http://sourceware.org/ml/gdb/2009-10/msg00414.html
this bug just reproduce in amd64 ubuntu 9.0.4 and i386 ubuntu 9.0.4
that's gcc is 4.3.3. glibc is 2.9.
In amd64 gcc 4.1.2 glibc 2.5 and i386 gcc 4.2.4 glibc 2.7, it cannot
be reproduced.
I think this is a bug in corelow or gcore.
Thanks,
Hui
On Tue, Dec 15, 2009 at 02:22, Michael Snyder <msnyder@vmware.com> wrote:
> Hui Zhu wrote:
>
>> solib-precsave.exp, this fail is because the core solib error that I
>> report in before.
>
> Can you say more about that?
>
> I don't remember it, and it never fails for me (before or after
> this patch).
>
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-15 1:47 ` Hui Zhu
@ 2009-12-18 19:44 ` Michael Snyder
2010-01-08 16:07 ` Hui Zhu
0 siblings, 1 reply; 39+ messages in thread
From: Michael Snyder @ 2009-12-18 19:44 UTC (permalink / raw)
To: Hui Zhu; +Cc: gdb-patches ml
Sounds like this patch waits only for new test suites?
Hui Zhu wrote:
> http://sourceware.org/ml/gdb/2009-10/msg00414.html
>
> this bug just reproduce in amd64 ubuntu 9.0.4 and i386 ubuntu 9.0.4
> that's gcc is 4.3.3. glibc is 2.9.
>
> In amd64 gcc 4.1.2 glibc 2.5 and i386 gcc 4.2.4 glibc 2.7, it cannot
> be reproduced.
>
> I think this is a bug in corelow or gcore.
>
> Thanks,
> Hui
>
> On Tue, Dec 15, 2009 at 02:22, Michael Snyder <msnyder@vmware.com> wrote:
>> Hui Zhu wrote:
>>
>>> solib-precsave.exp, this fail is because the core solib error that I
>>> report in before.
>> Can you say more about that?
>>
>> I don't remember it, and it never fails for me (before or after
>> this patch).
>>
>>
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2009-12-18 19:44 ` Michael Snyder
@ 2010-01-08 16:07 ` Hui Zhu
2010-01-08 18:45 ` Michael Snyder
2010-01-09 12:28 ` [RFA/i386] " Joel Brobecker
0 siblings, 2 replies; 39+ messages in thread
From: Hui Zhu @ 2010-01-08 16:07 UTC (permalink / raw)
To: Michael Snyder, Joel Brobecker; +Cc: gdb-patches ml
[-- Attachment #1: Type: text/plain, Size: 1103 bytes --]
Hello guys,
I make a new version patch according to Joel's comments.
Please help me reveiw it.
Thanks,
Hui
2010-01-09 Hui Zhu <teawater@gmail.com>
* i386-tdep.c (OT_DQUAD): New enum.
(i386_process_record): Add code for MMX, 3DNow!, SSE, SSE2,
SSE3, SSSE3 and SSE4.
On Sat, Dec 19, 2009 at 03:41, Michael Snyder <msnyder@vmware.com> wrote:
> Sounds like this patch waits only for new test suites?
>
> Hui Zhu wrote:
>>
>> http://sourceware.org/ml/gdb/2009-10/msg00414.html
>>
>> this bug just reproduce in amd64 ubuntu 9.0.4 and i386 ubuntu 9.0.4
>> that's gcc is 4.3.3. glibc is 2.9.
>>
>> In amd64 gcc 4.1.2 glibc 2.5 and i386 gcc 4.2.4 glibc 2.7, it cannot
>> be reproduced.
>>
>> I think this is a bug in corelow or gcore.
>>
>> Thanks,
>> Hui
>>
>> On Tue, Dec 15, 2009 at 02:22, Michael Snyder <msnyder@vmware.com> wrote:
>>>
>>> Hui Zhu wrote:
>>>
>>>> solib-precsave.exp, this fail is because the core solib error that I
>>>> report in before.
>>>
>>> Can you say more about that?
>>>
>>> I don't remember it, and it never fails for me (before or after
>>> this patch).
>>>
>>>
>>
>
>
[-- Attachment #2: prec-x86-sse.txt --]
[-- Type: text/plain, Size: 33837 bytes --]
---
i386-tdep.c | 861 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 832 insertions(+), 29 deletions(-)
--- a/i386-tdep.c
+++ b/i386-tdep.c
@@ -2849,6 +2849,7 @@ enum
OT_WORD,
OT_LONG,
OT_QUAD,
+ OT_DQUAD,
};
/* i386 arith/logic operations */
@@ -3296,7 +3297,7 @@ i386_process_record (struct gdbarch *gdb
ir.dflag = 1;
ir.override = -1;
ir.popl_esp_hack = 0;
- ir.regmap = gdbarch_tdep (gdbarch)->record_regmap;
+ ir.regmap = tdep->record_regmap;
ir.gdbarch = gdbarch;
if (record_debug > 1)
@@ -3414,7 +3415,7 @@ i386_process_record (struct gdbarch *gdb
return -1;
}
ir.addr++;
- opcode = (uint16_t) tmpu8 | 0x0f00;
+ opcode = (uint32_t) tmpu8 | 0x0f00;
goto reswitch;
break;
@@ -5075,7 +5076,7 @@ i386_process_record (struct gdbarch *gdb
/* XXX */
case 0xcc: /* int3 */
- printf_unfiltered (_("Process record doesn't support instruction "
+ printf_unfiltered (_("Process record does not support instruction "
"int3.\n"));
ir.addr -= 1;
goto no_support;
@@ -5095,15 +5096,15 @@ i386_process_record (struct gdbarch *gdb
}
ir.addr++;
if (tmpu8 != 0x80
- || gdbarch_tdep (gdbarch)->i386_intx80_record == NULL)
+ || tdep->i386_intx80_record == NULL)
{
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction int 0x%02x.\n"),
tmpu8);
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_intx80_record (ir.regcache);
+ ret = tdep->i386_intx80_record (ir.regcache);
if (ret)
return ret;
}
@@ -5111,7 +5112,7 @@ i386_process_record (struct gdbarch *gdb
/* XXX */
case 0xce: /* into */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction into.\n"));
ir.addr -= 1;
goto no_support;
@@ -5122,7 +5123,7 @@ i386_process_record (struct gdbarch *gdb
break;
case 0x62: /* bound */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction bound.\n"));
ir.addr -= 1;
goto no_support;
@@ -5158,21 +5159,21 @@ i386_process_record (struct gdbarch *gdb
break;
case 0x0f30: /* wrmsr */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction wrmsr.\n"));
ir.addr -= 2;
goto no_support;
break;
case 0x0f32: /* rdmsr */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction rdmsr.\n"));
ir.addr -= 2;
goto no_support;
break;
case 0x0f31: /* rdtsc */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction rdtsc.\n"));
ir.addr -= 2;
goto no_support;
@@ -5186,21 +5187,21 @@ i386_process_record (struct gdbarch *gdb
ir.addr -= 2;
goto no_support;
}
- if (gdbarch_tdep (gdbarch)->i386_sysenter_record == NULL)
+ if (tdep->i386_sysenter_record == NULL)
{
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction sysenter.\n"));
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_sysenter_record (ir.regcache);
+ ret = tdep->i386_sysenter_record (ir.regcache);
if (ret)
return ret;
}
break;
case 0x0f35: /* sysexit */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction sysexit.\n"));
ir.addr -= 2;
goto no_support;
@@ -5209,21 +5210,21 @@ i386_process_record (struct gdbarch *gdb
case 0x0f05: /* syscall */
{
int ret;
- if (gdbarch_tdep (gdbarch)->i386_syscall_record == NULL)
+ if (tdep->i386_syscall_record == NULL)
{
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction syscall.\n"));
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_syscall_record (ir.regcache);
+ ret = tdep->i386_syscall_record (ir.regcache);
if (ret)
return ret;
}
break;
case 0x0f07: /* sysret */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction sysret.\n"));
ir.addr -= 2;
goto no_support;
@@ -5237,7 +5238,7 @@ i386_process_record (struct gdbarch *gdb
break;
case 0xf4: /* hlt */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction hlt.\n"));
ir.addr -= 1;
goto no_support;
@@ -5533,14 +5534,815 @@ i386_process_record (struct gdbarch *gdb
I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
- /* MMX/SSE/SSE2/PNI support */
- /* XXX */
+ /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
+
+ case 0x0f0d: /* 3DNow! prefetch */
+ break;
+
+ case 0x0f0e: /* 3DNow! femms */
+ case 0x0f77: /* emms */
+ if (i386_fpc_regnum_p (gdbarch, I387_FTAG_REGNUM(tdep)))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache, I387_FTAG_REGNUM(tdep));
+ break;
+
+ case 0x0f0f: /* 3DNow! data */
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (target_read_memory (ir.addr, &tmpu8, 1))
+ {
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr %s len = 1.\n"),
+ paddress (gdbarch, ir.addr));
+ return -1;
+ }
+ ir.addr++;
+ switch (tmpu8)
+ {
+ case 0x0c: /* 3DNow! pi2fw */
+ case 0x0d: /* 3DNow! pi2fd */
+ case 0x1c: /* 3DNow! pf2iw */
+ case 0x1d: /* 3DNow! pf2id */
+ case 0x8a: /* 3DNow! pfnacc */
+ case 0x8e: /* 3DNow! pfpnacc */
+ case 0x90: /* 3DNow! pfcmpge */
+ case 0x94: /* 3DNow! pfmin */
+ case 0x96: /* 3DNow! pfrcp */
+ case 0x97: /* 3DNow! pfrsqrt */
+ case 0x9a: /* 3DNow! pfsub */
+ case 0x9e: /* 3DNow! pfadd */
+ case 0xa0: /* 3DNow! pfcmpgt */
+ case 0xa4: /* 3DNow! pfmax */
+ case 0xa6: /* 3DNow! pfrcpit1 */
+ case 0xa7: /* 3DNow! pfrsqit1 */
+ case 0xaa: /* 3DNow! pfsubr */
+ case 0xae: /* 3DNow! pfacc */
+ case 0xb0: /* 3DNow! pfcmpeq */
+ case 0xb4: /* 3DNow! pfmul */
+ case 0xb6: /* 3DNow! pfrcpit2 */
+ case 0xb7: /* 3DNow! pmulhrw */
+ case 0xbb: /* 3DNow! pswapd */
+ case 0xbf: /* 3DNow! pavgusb */
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
+ goto no_support_3dnow_data;
+ record_arch_list_add_reg (ir.regcache, ir.reg);
+ break;
+
+ default:
+no_support_3dnow_data:
+ opcode = (opcode << 8) | tmpu8;
+ goto no_support;
+ break;
+ }
+ break;
+
+ case 0x0faa: /* rsm */
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
+ break;
+
+ case 0x0fae:
+ if (i386_record_modrm (&ir))
+ return -1;
+ switch(ir.reg)
+ {
+ case 0: /* fxsave */
+ {
+ uint64_t tmpu64;
+
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ if (i386_record_lea_modrm_addr (&ir, &tmpu64))
+ return -1;
+ if (record_arch_list_add_mem (tmpu64, 512))
+ return -1;
+ }
+ break;
+
+ case 1: /* fxrstor */
+ {
+ int i;
+
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+
+ for (i = I387_MM0_REGNUM (tdep);
+ i386_mmx_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ for (i = I387_XMM0_REGNUM (tdep);
+ i386_sse_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ if (i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
+ record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
+
+ for (i = I387_ST0_REGNUM (tdep);
+ i386_fp_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ for (i = I387_FCTRL_REGNUM (tdep);
+ i386_fpc_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+ }
+ break;
+
+ case 2: /* ldmxcsr */
+ if (!i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
+ break;
+
+ case 3: /* stmxcsr */
+ ir.ot = OT_LONG;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ case 5: /* lfence */
+ case 6: /* mfence */
+ case 7: /* sfence clflush */
+ break;
+
+ default:
+ opcode = (opcode << 8) | ir.modrm;
+ goto no_support;
+ break;
+ }
+ break;
+
+ case 0x0fc3: /* movnti */
+ ir.ot = (ir.dflag == 2) ? OT_QUAD : OT_LONG;
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ goto no_support;
+ ir.reg |= rex_r;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ /* Add prefix to opcode. */
+ case 0x0f10:
+ case 0x0f11:
+ case 0x0f12:
+ case 0x0f13:
+ case 0x0f14:
+ case 0x0f16:
+ case 0x0f17:
+ case 0x0f28:
+ case 0x0f29:
+ case 0x0f2a:
+ case 0x0f2b:
+ case 0x0f2c:
+ case 0x0f2d:
+ case 0x0f2e:
+ case 0x0f2f:
+ case 0x0f38:
+ case 0x0f39:
+ case 0x0f3a:
+ case 0x0f50:
+ case 0x0f51:
+ case 0x0f52:
+ case 0x0f53:
+ case 0x0f54:
+ case 0x0f55:
+ case 0x0f56:
+ case 0x0f57:
+ case 0x0f58:
+ case 0x0f59:
+ case 0x0f5a:
+ case 0x0f5b:
+ case 0x0f5c:
+ case 0x0f5d:
+ case 0x0f5e:
+ case 0x0f5f:
+ case 0x0f60:
+ case 0x0f61:
+ case 0x0f62:
+ case 0x0f63:
+ case 0x0f64:
+ case 0x0f65:
+ case 0x0f66:
+ case 0x0f67:
+ case 0x0f68:
+ case 0x0f69:
+ case 0x0f6a:
+ case 0x0f6b:
+ case 0x0f6c:
+ case 0x0f6d:
+ case 0x0f6e:
+ case 0x0f6f:
+ case 0x0f70:
+ case 0x0f71:
+ case 0x0f72:
+ case 0x0f73:
+ case 0x0f74:
+ case 0x0f75:
+ case 0x0f76:
+ case 0x0f7c:
+ case 0x0f7d:
+ case 0x0f7e:
+ case 0x0f7f:
+ case 0x0fb8:
+ case 0x0fc2:
+ case 0x0fc4:
+ case 0x0fc5:
+ case 0x0fc6:
+ case 0x0fd0:
+ case 0x0fd1:
+ case 0x0fd2:
+ case 0x0fd3:
+ case 0x0fd4:
+ case 0x0fd5:
+ case 0x0fd6:
+ case 0x0fd7:
+ case 0x0fd8:
+ case 0x0fd9:
+ case 0x0fda:
+ case 0x0fdb:
+ case 0x0fdc:
+ case 0x0fdd:
+ case 0x0fde:
+ case 0x0fdf:
+ case 0x0fe0:
+ case 0x0fe1:
+ case 0x0fe2:
+ case 0x0fe3:
+ case 0x0fe4:
+ case 0x0fe5:
+ case 0x0fe6:
+ case 0x0fe7:
+ case 0x0fe8:
+ case 0x0fe9:
+ case 0x0fea:
+ case 0x0feb:
+ case 0x0fec:
+ case 0x0fed:
+ case 0x0fee:
+ case 0x0fef:
+ case 0x0ff0:
+ case 0x0ff1:
+ case 0x0ff2:
+ case 0x0ff3:
+ case 0x0ff4:
+ case 0x0ff5:
+ case 0x0ff6:
+ case 0x0ff7:
+ case 0x0ff8:
+ case 0x0ff9:
+ case 0x0ffa:
+ case 0x0ffb:
+ case 0x0ffc:
+ case 0x0ffd:
+ case 0x0ffe:
+ switch (prefixes)
+ {
+ case PREFIX_REPNZ:
+ opcode |= 0xf20000;
+ break;
+ case PREFIX_DATA:
+ opcode |= 0x660000;
+ break;
+ case PREFIX_REPZ:
+ opcode |= 0xf30000;
+ break;
+ }
+reswitch_prefix_add:
+ switch (opcode)
+ {
+ case 0x0f38:
+ case 0x660f38:
+ case 0xf20f38:
+ case 0x0f3a:
+ case 0x660f3a:
+ if (target_read_memory (ir.addr, &tmpu8, 1))
+ {
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr %s len = 1.\n"),
+ paddress (gdbarch, ir.addr));
+ return -1;
+ }
+ ir.addr++;
+ opcode = (uint32_t) tmpu8 | opcode << 4;
+ goto reswitch_prefix_add;
+ break;
+
+ case 0x0f10: /* movups */
+ case 0x660f10: /* movupd */
+ case 0xf30f10: /* movss */
+ case 0xf20f10: /* movsd */
+ case 0x0f12: /* movlps */
+ case 0x660f12: /* movlpd */
+ case 0xf30f12: /* movsldup */
+ case 0xf20f12: /* movddup */
+ case 0x0f14: /* unpcklps */
+ case 0x660f14: /* unpcklpd */
+ case 0x0f15: /* unpckhps */
+ case 0x660f15: /* unpckhpd */
+ case 0x0f16: /* movhps */
+ case 0x660f16: /* movhpd */
+ case 0xf30f16: /* movshdup */
+ case 0x0f28: /* movaps */
+ case 0x660f28: /* movapd */
+ case 0x0f2a: /* cvtpi2ps */
+ case 0x660f2a: /* cvtpi2pd */
+ case 0xf30f2a: /* cvtsi2ss */
+ case 0xf20f2a: /* cvtsi2sd */
+ case 0x0f2c: /* cvttps2pi */
+ case 0x660f2c: /* cvttpd2pi */
+ case 0x0f2d: /* cvtps2pi */
+ case 0x660f2d: /* cvtpd2pi */
+ case 0x660f3800: /* pshufb */
+ case 0x660f3801: /* phaddw */
+ case 0x660f3802: /* phaddd */
+ case 0x660f3803: /* phaddsw */
+ case 0x660f3804: /* pmaddubsw */
+ case 0x660f3805: /* phsubw */
+ case 0x660f3806: /* phsubd */
+ case 0x660f3807: /* phaddsw */
+ case 0x660f3808: /* psignb */
+ case 0x660f3809: /* psignw */
+ case 0x660f380a: /* psignd */
+ case 0x660f380b: /* pmulhrsw */
+ case 0x660f3810: /* pblendvb */
+ case 0x660f3814: /* blendvps */
+ case 0x660f3815: /* blendvpd */
+ case 0x660f381c: /* pabsb */
+ case 0x660f381d: /* pabsw */
+ case 0x660f381e: /* pabsd */
+ case 0x660f3820: /* pmovsxbw */
+ case 0x660f3821: /* pmovsxbd */
+ case 0x660f3822: /* pmovsxbq */
+ case 0x660f3823: /* pmovsxwd */
+ case 0x660f3824: /* pmovsxwq */
+ case 0x660f3825: /* pmovsxdq */
+ case 0x660f3828: /* pmuldq */
+ case 0x660f3829: /* pcmpeqq */
+ case 0x660f382a: /* movntdqa */
+ case 0x660f3a08: /* roundps */
+ case 0x660f3a09: /* roundpd */
+ case 0x660f3a0a: /* roundss */
+ case 0x660f3a0b: /* roundsd */
+ case 0x660f3a0c: /* blendps */
+ case 0x660f3a0d: /* blendpd */
+ case 0x660f3a0e: /* pblendw */
+ case 0x660f3a0f: /* palignr */
+ case 0x660f3a20: /* pinsrb */
+ case 0x660f3a21: /* insertps */
+ case 0x660f3a22: /* pinsrd pinsrq */
+ case 0x660f3a40: /* dpps */
+ case 0x660f3a41: /* dppd */
+ case 0x660f3a42: /* mpsadbw */
+ case 0x660f3a60: /* pcmpestrm */
+ case 0x660f3a61: /* pcmpestri */
+ case 0x660f3a62: /* pcmpistrm */
+ case 0x660f3a63: /* pcmpistri */
+ case 0x0f51: /* sqrtps */
+ case 0x660f51: /* sqrtpd */
+ case 0xf20f51: /* sqrtsd */
+ case 0xf30f51: /* sqrtss */
+ case 0x0f52: /* rsqrtps */
+ case 0xf30f52: /* rsqrtss */
+ case 0x0f53: /* rcpps */
+ case 0xf30f53: /* rcpss */
+ case 0x0f54: /* andps */
+ case 0x660f54: /* andpd */
+ case 0x0f55: /* andnps */
+ case 0x660f55: /* andnpd */
+ case 0x0f56: /* orps */
+ case 0x660f56: /* orpd */
+ case 0x0f57: /* xorps */
+ case 0x660f57: /* xorpd */
+ case 0x0f58: /* addps */
+ case 0x660f58: /* addpd */
+ case 0xf20f58: /* addsd */
+ case 0xf30f58: /* addss */
+ case 0x0f59: /* mulps */
+ case 0x660f59: /* mulpd */
+ case 0xf20f59: /* mulsd */
+ case 0xf30f59: /* mulss */
+ case 0x0f5a: /* cvtps2pd */
+ case 0x660f5a: /* cvtpd2ps */
+ case 0xf20f5a: /* cvtsd2ss */
+ case 0xf30f5a: /* cvtss2sd */
+ case 0x0f5b: /* cvtdq2ps */
+ case 0x660f5b: /* cvtps2dq */
+ case 0xf30f5b: /* cvttps2dq */
+ case 0x0f5c: /* subps */
+ case 0x660f5c: /* subpd */
+ case 0xf20f5c: /* subsd */
+ case 0xf30f5c: /* subss */
+ case 0x0f5d: /* minps */
+ case 0x660f5d: /* minpd */
+ case 0xf20f5d: /* minsd */
+ case 0xf30f5d: /* minss */
+ case 0x0f5e: /* divps */
+ case 0x660f5e: /* divpd */
+ case 0xf20f5e: /* divsd */
+ case 0xf30f5e: /* divss */
+ case 0x0f5f: /* maxps */
+ case 0x660f5f: /* maxpd */
+ case 0xf20f5f: /* maxsd */
+ case 0xf30f5f: /* maxss */
+ case 0x660f60: /* punpcklbw */
+ case 0x660f61: /* punpcklwd */
+ case 0x660f62: /* punpckldq */
+ case 0x660f63: /* packsswb */
+ case 0x660f64: /* pcmpgtb */
+ case 0x660f65: /* pcmpgtw */
+ case 0x660f66: /* pcmpgtl */
+ case 0x660f67: /* packuswb */
+ case 0x660f68: /* punpckhbw */
+ case 0x660f69: /* punpckhwd */
+ case 0x660f6a: /* punpckhdq */
+ case 0x660f6b: /* packssdw */
+ case 0x660f6c: /* punpcklqdq */
+ case 0x660f6d: /* punpckhqdq */
+ case 0x660f6e: /* movd */
+ case 0x660f6f: /* movdqa */
+ case 0xf30f6f: /* movdqu */
+ case 0x660f70: /* pshufd */
+ case 0xf20f70: /* pshuflw */
+ case 0xf30f70: /* pshufhw */
+ case 0x660f74: /* pcmpeqb */
+ case 0x660f75: /* pcmpeqw */
+ case 0x660f76: /* pcmpeql */
+ case 0x660f7c: /* haddpd */
+ case 0xf20f7c: /* haddps */
+ case 0x660f7d: /* hsubpd */
+ case 0xf20f7d: /* hsubps */
+ case 0xf30f7e: /* movq */
+ case 0x0fc2: /* cmpps */
+ case 0x660fc2: /* cmppd */
+ case 0xf20fc2: /* cmpsd */
+ case 0xf30fc2: /* cmpss */
+ case 0x660fc4: /* pinsrw */
+ case 0x0fc6: /* shufps */
+ case 0x660fc6: /* shufpd */
+ case 0x660fd0: /* addsubpd */
+ case 0xf20fd0: /* addsubps */
+ case 0x660fd1: /* psrlw */
+ case 0x660fd2: /* psrld */
+ case 0x660fd3: /* psrlq */
+ case 0x660fd4: /* paddq */
+ case 0x660fd5: /* pmullw */
+ case 0xf30fd6: /* movq2dq */
+ case 0x660fd8: /* psubusb */
+ case 0x660fd9: /* psubusw */
+ case 0x660fda: /* pminub */
+ case 0x660fdb: /* pand */
+ case 0x660fdc: /* paddusb */
+ case 0x660fdd: /* paddusw */
+ case 0x660fde: /* pmaxub */
+ case 0x660fdf: /* pandn */
+ case 0x660fe0: /* pavgb */
+ case 0x660fe1: /* psraw */
+ case 0x660fe2: /* psrad */
+ case 0x660fe3: /* pavgw */
+ case 0x660fe4: /* pmulhuw */
+ case 0x660fe5: /* pmulhw */
+ case 0x660fe6: /* cvttpd2dq */
+ case 0xf20fe6: /* cvtpd2dq */
+ case 0xf30fe6: /* cvtdq2pd */
+ case 0x660fe8: /* psubsb */
+ case 0x660fe9: /* psubsw */
+ case 0x660fea: /* pminsw */
+ case 0x660feb: /* por */
+ case 0x660fec: /* paddsb */
+ case 0x660fed: /* paddsw */
+ case 0x660fee: /* pmaxsw */
+ case 0x660fef: /* pxor */
+ case 0x660ff0: /* lddqu */
+ case 0x660ff1: /* psllw */
+ case 0x660ff2: /* pslld */
+ case 0x660ff3: /* psllq */
+ case 0x660ff4: /* pmuludq */
+ case 0x660ff5: /* pmaddwd */
+ case 0x660ff6: /* psadbw */
+ case 0x660ff8: /* psubb */
+ case 0x660ff9: /* psubw */
+ case 0x660ffa: /* psubl */
+ case 0x660ffb: /* psubq */
+ case 0x660ffc: /* paddb */
+ case 0x660ffd: /* paddw */
+ case 0x660ffe: /* paddl */
+ if (i386_record_modrm (&ir))
+ return -1;
+ ir.reg |= rex_r;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.reg))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.reg);
+ if ((opcode & 0xfffffffc) == 0x660f3a60)
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ case 0x0f11: /* movups */
+ case 0x660f11: /* movupd */
+ case 0xf30f11: /* movss */
+ case 0xf20f11: /* movsd */
+ case 0x0f13: /* movlps */
+ case 0x660f13: /* movlpd */
+ case 0x0f17: /* movhps */
+ case 0x660f17: /* movhpd */
+ case 0x0f29: /* movaps */
+ case 0x660f29: /* movapd */
+ case 0x660f3a14: /* pextrb */
+ case 0x660f3a15: /* pextrw */
+ case 0x660f3a16: /* pextrd pextrq */
+ case 0x660f3a17: /* extractps */
+ case 0x660f7f: /* movdqa */
+ case 0xf30f7f: /* movdqu */
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ if (opcode == 0x0f13 || opcode == 0x660f13
+ || opcode == 0x0f17 || opcode == 0x660f17)
+ goto no_support;
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ switch (opcode)
+ {
+ case 0x660f3a14:
+ ir.ot = OT_BYTE;
+ break;
+ case 0x660f3a15:
+ ir.ot = OT_WORD;
+ break;
+ case 0x660f3a16:
+ ir.ot = OT_LONG;
+ break;
+ case 0x660f3a17:
+ ir.ot = OT_QUAD;
+ break;
+ default:
+ ir.ot = OT_DQUAD;
+ break;
+ }
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ case 0x0f2b: /* movntps */
+ case 0x660f2b: /* movntpd */
+ case 0x0fe7: /* movntq */
+ case 0x660fe7: /* movntdq */
+ if (ir.mod == 3)
+ goto no_support;
+ if (opcode == 0x0fe7)
+ ir.ot = OT_QUAD;
+ else
+ ir.ot = OT_DQUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ case 0xf30f2c: /* cvttss2si */
+ case 0xf20f2c: /* cvttsd2si */
+ case 0xf30f2d: /* cvtss2si */
+ case 0xf20f2d: /* cvtsd2si */
+ case 0xf20f38f0: /* crc32 */
+ case 0xf20f38f1: /* crc32 */
+ case 0x0f50: /* movmskps */
+ case 0x660f50: /* movmskpd */
+ case 0x0fc5: /* pextrw */
+ case 0x660fc5: /* pextrw */
+ case 0x0fd7: /* pmovmskb */
+ case 0x660fd7: /* pmovmskb */
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
+ break;
+
+ case 0x0f3800: /* pshufb */
+ case 0x0f3801: /* phaddw */
+ case 0x0f3802: /* phaddd */
+ case 0x0f3803: /* phaddsw */
+ case 0x0f3804: /* pmaddubsw */
+ case 0x0f3805: /* phsubw */
+ case 0x0f3806: /* phsubd */
+ case 0x0f3807: /* phaddsw */
+ case 0x0f3808: /* psignb */
+ case 0x0f3809: /* psignw */
+ case 0x0f380a: /* psignd */
+ case 0x0f380b: /* pmulhrsw */
+ case 0x0f381c: /* pabsb */
+ case 0x0f381d: /* pabsw */
+ case 0x0f381e: /* pabsd */
+ case 0x0f382b: /* packusdw */
+ case 0x0f3830: /* pmovzxbw */
+ case 0x0f3831: /* pmovzxbd */
+ case 0x0f3832: /* pmovzxbq */
+ case 0x0f3833: /* pmovzxwd */
+ case 0x0f3834: /* pmovzxwq */
+ case 0x0f3835: /* pmovzxdq */
+ case 0x0f3837: /* pcmpgtq */
+ case 0x0f3838: /* pminsb */
+ case 0x0f3839: /* pminsd */
+ case 0x0f383a: /* pminuw */
+ case 0x0f383b: /* pminud */
+ case 0x0f383c: /* pmaxsb */
+ case 0x0f383d: /* pmaxsd */
+ case 0x0f383e: /* pmaxuw */
+ case 0x0f383f: /* pmaxud */
+ case 0x0f3840: /* pmulld */
+ case 0x0f3841: /* phminposuw */
+ case 0x0f3a0f: /* palignr */
+ case 0x0f60: /* punpcklbw */
+ case 0x0f61: /* punpcklwd */
+ case 0x0f62: /* punpckldq */
+ case 0x0f63: /* packsswb */
+ case 0x0f64: /* pcmpgtb */
+ case 0x0f65: /* pcmpgtw */
+ case 0x0f66: /* pcmpgtl */
+ case 0x0f67: /* packuswb */
+ case 0x0f68: /* punpckhbw */
+ case 0x0f69: /* punpckhwd */
+ case 0x0f6a: /* punpckhdq */
+ case 0x0f6b: /* packssdw */
+ case 0x0f6e: /* movd */
+ case 0x0f6f: /* movq */
+ case 0x0f70: /* pshufw */
+ case 0x0f74: /* pcmpeqb */
+ case 0x0f75: /* pcmpeqw */
+ case 0x0f76: /* pcmpeql */
+ case 0x0fc4: /* pinsrw */
+ case 0x0fd1: /* psrlw */
+ case 0x0fd2: /* psrld */
+ case 0x0fd3: /* psrlq */
+ case 0x0fd4: /* paddq */
+ case 0x0fd5: /* pmullw */
+ case 0xf20fd6: /* movdq2q */
+ case 0x0fd8: /* psubusb */
+ case 0x0fd9: /* psubusw */
+ case 0x0fda: /* pminub */
+ case 0x0fdb: /* pand */
+ case 0x0fdc: /* paddusb */
+ case 0x0fdd: /* paddusw */
+ case 0x0fde: /* pmaxub */
+ case 0x0fdf: /* pandn */
+ case 0x0fe0: /* pavgb */
+ case 0x0fe1: /* psraw */
+ case 0x0fe2: /* psrad */
+ case 0x0fe3: /* pavgw */
+ case 0x0fe4: /* pmulhuw */
+ case 0x0fe5: /* pmulhw */
+ case 0x0fe8: /* psubsb */
+ case 0x0fe9: /* psubsw */
+ case 0x0fea: /* pminsw */
+ case 0x0feb: /* por */
+ case 0x0fec: /* paddsb */
+ case 0x0fed: /* paddsw */
+ case 0x0fee: /* pmaxsw */
+ case 0x0fef: /* pxor */
+ case 0x0ff1: /* psllw */
+ case 0x0ff2: /* pslld */
+ case 0x0ff3: /* psllq */
+ case 0x0ff4: /* pmuludq */
+ case 0x0ff5: /* pmaddwd */
+ case 0x0ff6: /* psadbw */
+ case 0x0ff8: /* psubb */
+ case 0x0ff9: /* psubw */
+ case 0x0ffa: /* psubl */
+ case 0x0ffb: /* psubq */
+ case 0x0ffc: /* paddb */
+ case 0x0ffd: /* paddw */
+ case 0x0ffe: /* paddl */
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.reg);
+ break;
+
+ case 0x0f71: /* psllw */
+ case 0x0f72: /* pslld */
+ case 0x0f73: /* psllq */
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.rm);
+ break;
+
+ case 0x660f71: /* psllw */
+ case 0x660f72: /* pslld */
+ case 0x660f73: /* psllq */
+ if (i386_record_modrm (&ir))
+ return -1;
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ break;
+
+ case 0x0f7e: /* movd */
+ case 0x660f7e: /* movd */
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ else
+ {
+ if (ir.dflag == 2)
+ ir.ot = OT_QUAD;
+ else
+ ir.ot = OT_LONG;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ case 0x0f7f: /* movq */
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ ir.ot = OT_QUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ case 0xf30fb8: /* popcnt */
+ if (i386_record_modrm (&ir))
+ return -1;
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ case 0x660fd6: /* movq */
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ ir.ot = OT_QUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ case 0x660f3817: /* ptest */
+ case 0x0f2e: /* ucomiss */
+ case 0x660f2e: /* ucomisd */
+ case 0x0f2f: /* comiss */
+ case 0x660f2f: /* comisd */
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ case 0x0ff7: /* maskmovq */
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_REDI_REGNUM],
+ &tmpulongest);
+ if (record_arch_list_add_mem (tmpulongest, 64))
+ return -1;
+ break;
+
+ case 0x660ff7: /* maskmovdqu */
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_REDI_REGNUM],
+ &tmpulongest);
+ if (record_arch_list_add_mem (tmpulongest, 128))
+ return -1;
+ break;
+
+ default:
+ goto no_support;
+ break;
+ }
+ break;
default:
- if (opcode > 0xff)
- ir.addr -= 2;
- else
- ir.addr -= 1;
goto no_support;
break;
}
@@ -5553,9 +6355,10 @@ i386_process_record (struct gdbarch *gdb
return 0;
no_support:
- printf_unfiltered (_("Process record doesn't support instruction 0x%02x "
- "at address %s.\n"),
- (unsigned int) (opcode), paddress (gdbarch, ir.addr));
+ printf_unfiltered (_("Process record does not support instruction 0x%02x "
+ "at address %s.\n"),
+ (unsigned int) (opcode),
+ paddress (gdbarch, ir.orig_addr));
return -1;
}
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-01-08 16:07 ` Hui Zhu
@ 2010-01-08 18:45 ` Michael Snyder
2010-01-09 12:28 ` [RFA/i386] " Joel Brobecker
1 sibling, 0 replies; 39+ messages in thread
From: Michael Snyder @ 2010-01-08 18:45 UTC (permalink / raw)
To: Hui Zhu; +Cc: Joel Brobecker, gdb-patches ml
Hui Zhu wrote:
> Hello guys,
>
> I make a new version patch according to Joel's comments.
>
> Please help me reveiw it.
Hui, still looking for tests...
> 2010-01-09 Hui Zhu <teawater@gmail.com>
>
> * i386-tdep.c (OT_DQUAD): New enum.
> (i386_process_record): Add code for MMX, 3DNow!, SSE, SSE2,
> SSE3, SSSE3 and SSE4.
>
> On Sat, Dec 19, 2009 at 03:41, Michael Snyder <msnyder@vmware.com> wrote:
>> Sounds like this patch waits only for new test suites?
>>
>> Hui Zhu wrote:
>>> http://sourceware.org/ml/gdb/2009-10/msg00414.html
>>>
>>> this bug just reproduce in amd64 ubuntu 9.0.4 and i386 ubuntu 9.0.4
>>> that's gcc is 4.3.3. glibc is 2.9.
>>>
>>> In amd64 gcc 4.1.2 glibc 2.5 and i386 gcc 4.2.4 glibc 2.7, it cannot
>>> be reproduced.
>>>
>>> I think this is a bug in corelow or gcore.
>>>
>>> Thanks,
>>> Hui
>>>
>>> On Tue, Dec 15, 2009 at 02:22, Michael Snyder <msnyder@vmware.com> wrote:
>>>> Hui Zhu wrote:
>>>>
>>>>> solib-precsave.exp, this fail is because the core solib error that I
>>>>> report in before.
>>>> Can you say more about that?
>>>>
>>>> I don't remember it, and it never fails for me (before or after
>>>> this patch).
>>>>
>>>>
>>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-01-08 16:07 ` Hui Zhu
2010-01-08 18:45 ` Michael Snyder
@ 2010-01-09 12:28 ` Joel Brobecker
2010-01-11 2:48 ` Hui Zhu
1 sibling, 1 reply; 39+ messages in thread
From: Joel Brobecker @ 2010-01-09 12:28 UTC (permalink / raw)
To: Hui Zhu; +Cc: Michael Snyder, gdb-patches ml
> 2010-01-09 Hui Zhu <teawater@gmail.com>
>
> * i386-tdep.c (OT_DQUAD): New enum.
> (i386_process_record): Add code for MMX, 3DNow!, SSE, SSE2,
> SSE3, SSSE3 and SSE4.
My two cents below. Although I have not seen anything incorrect with this
patch, I am reluctant to approve it outright. MarkK has been maintaining
the x86 target for a while, so it'd be nice if he could take a look
(unless he doesn't want to). Please ping me in a week if no one else
has looked at this patch.
Please also start adding testcases if you can. This is a lot of code,
with lots of hard-coded numbers and very little comments. Perhaps
the code is self-explanatory for an x86 specialist, but I'm not, so...
> @@ -5122,7 +5123,7 @@ i386_process_record (struct gdbarch *gdb
> break;
>
> case 0x62: /* bound */
> - printf_unfiltered (_("Process record doesn't support "
> + printf_unfiltered (_("Process record does not support "
> "instruction bound.\n"));
> ir.addr -= 1;
> goto no_support;
Generally speaking, I find the error message phrased in a way that
they can be confusing sometimes, such as in the example above.
I suggest instead something such as:
Instruction 'bound' is not supported by Process Record.
or:
Instruction not supported by Process Record: bound.
Instruction not supported by Process Record ("bound")
etc...
Also, the design you are using to bail out, is using labels and
gotos unnecessarily. This, in turn, leads to the following oddity
in the case above:
(gdb) cont
Process record does not support instruction bound.
Process record does not support instruction 0x62 at address 0xdeadbeef.
error: Process record: failed to record execution log.
The first two error messages are almost identical and the second one
should simply go. I also think that the reason for failing to record
the execution log should be placed *after* the error message, but
that may be a personal preference. For instance:
error: Process record: Failed to record execution log:
Process record does not support instruction bound at address 0xfeedface.
Again, let's not address this issue as part of this patch, but once
this patch is in, can you please start preparing another one which
cleans this up by getting rid of these labels:
1. Define a new function:
i386_insn_record_not_supported (struct gdbarch *gdbarch,
const char *insn_name,
CORE_ADDR insn_addr);
Change the code above to:
i386_insn_record_not_supported (gdbarch, "bound", ir.addr);
return -1;
2. Define a new function:
i386_opcode_record_not_supported (strct gdbarch* gdbarch,
uint32_t opcode,
CORE_ADDR insn_addr);
Change the goto no_support into:
i386_opcode_record_not_supported (gdbarch, opcode, ir.addr);
return -1;
I would even consider the idea of changing the semantics of your
function, and raise an error whose message carries the reason for
the error, instead of doing the printing yourself before returning -1.
> + case 0x0f0f: /* 3DNow! data */
> + if (i386_record_modrm (&ir))
> + return -1;
This is the type of code that could definitely use some comments.
Why are you return -1 (error condition, right?) in this case? Because
of this immediate return, there won't even been any feedback to the user
as to why the recording failed.
> + switch (tmpu8)
This is also for another followup patch, but if you could use more
meaningful variable names, that would help improve the code quality
(IMO).
--
Joel
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-01-09 12:28 ` [RFA/i386] " Joel Brobecker
@ 2010-01-11 2:48 ` Hui Zhu
2010-01-11 4:05 ` Joel Brobecker
2010-01-12 1:38 ` Michael Snyder
0 siblings, 2 replies; 39+ messages in thread
From: Hui Zhu @ 2010-01-11 2:48 UTC (permalink / raw)
To: Joel Brobecker; +Cc: Michael Snyder, gdb-patches ml
Thanks Joel,
On Sat, Jan 9, 2010 at 20:28, Joel Brobecker <brobecker@adacore.com> wrote:
>> 2010-01-09 Hui Zhu <teawater@gmail.com>
>>
>> * i386-tdep.c (OT_DQUAD): New enum.
>> (i386_process_record): Add code for MMX, 3DNow!, SSE, SSE2,
>> SSE3, SSSE3 and SSE4.
>
> My two cents below. Although I have not seen anything incorrect with this
> patch, I am reluctant to approve it outright. MarkK has been maintaining
> the x86 target for a while, so it'd be nice if he could take a look
> (unless he doesn't want to). Please ping me in a week if no one else
> has looked at this patch.
>
> Please also start adding testcases if you can. This is a lot of code,
> with lots of hard-coded numbers and very little comments. Perhaps
> the code is self-explanatory for an x86 specialist, but I'm not, so...
Now, the current testcases will use some sse insn. I think they are
test for it.
For the sse insn special test, when I write the code for it, I just
read the spec and write the prec code. I don't good at write sse asm.
Sorry for it. I need a people help me with it.
>
>> @@ -5122,7 +5123,7 @@ i386_process_record (struct gdbarch *gdb
>> break;
>>
>> case 0x62: /* bound */
>> - printf_unfiltered (_("Process record doesn't support "
>> + printf_unfiltered (_("Process record does not support "
>> "instruction bound.\n"));
>> ir.addr -= 1;
>> goto no_support;
>
> Generally speaking, I find the error message phrased in a way that
> they can be confusing sometimes, such as in the example above.
> I suggest instead something such as:
>
> Instruction 'bound' is not supported by Process Record.
>
> or:
>
> Instruction not supported by Process Record: bound.
> Instruction not supported by Process Record ("bound")
>
> etc...
>
> Also, the design you are using to bail out, is using labels and
> gotos unnecessarily. This, in turn, leads to the following oddity
> in the case above:
>
> (gdb) cont
> Process record does not support instruction bound.
> Process record does not support instruction 0x62 at address 0xdeadbeef.
> error: Process record: failed to record execution log.
>
> The first two error messages are almost identical and the second one
> should simply go. I also think that the reason for failing to record
> the execution log should be placed *after* the error message, but
> that may be a personal preference. For instance:
>
> error: Process record: Failed to record execution log:
> Process record does not support instruction bound at address 0xfeedface.
>
> Again, let's not address this issue as part of this patch, but once
> this patch is in, can you please start preparing another one which
> cleans this up by getting rid of these labels:
>
> 1. Define a new function:
> i386_insn_record_not_supported (struct gdbarch *gdbarch,
> const char *insn_name,
> CORE_ADDR insn_addr);
>
> Change the code above to:
> i386_insn_record_not_supported (gdbarch, "bound", ir.addr);
> return -1;
>
> 2. Define a new function:
> i386_opcode_record_not_supported (strct gdbarch* gdbarch,
> uint32_t opcode,
> CORE_ADDR insn_addr);
>
> Change the goto no_support into:
> i386_opcode_record_not_supported (gdbarch, opcode, ir.addr);
> return -1;
>
> I would even consider the idea of changing the semantics of your
> function, and raise an error whose message carries the reason for
> the error, instead of doing the printing yourself before returning -1.
>
>> + case 0x0f0f: /* 3DNow! data */
>> + if (i386_record_modrm (&ir))
>> + return -1;
>
I am not sure it better can be the part of this patch. It doesn't
have relationship with sse insn support, right?
Looks you have a lot of idea on it. I suggest you can work on it. :)
> This is the type of code that could definitely use some comments.
> Why are you return -1 (error condition, right?) in this case? Because
> of this immediate return, there won't even been any feedback to the user
> as to why the recording failed.
>
>> + switch (tmpu8)
>
> This is also for another followup patch, but if you could use more
> meaningful variable names, that would help improve the code quality
> (IMO).
>
+ if (target_read_memory (ir.addr, &tmpu8, 1))
+ {
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr %s len = 1.\n"),
+ paddress (gdbarch, ir.addr));
+ return -1;
+ }
+ ir.addr++;
+ switch (tmpu8)
Im not sure it clear or not. I think add more vals will make the code
not clear.
Best regards,
Hui
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-01-11 2:48 ` Hui Zhu
@ 2010-01-11 4:05 ` Joel Brobecker
2010-01-12 1:38 ` Michael Snyder
1 sibling, 0 replies; 39+ messages in thread
From: Joel Brobecker @ 2010-01-11 4:05 UTC (permalink / raw)
To: Hui Zhu; +Cc: Michael Snyder, gdb-patches ml
> I am not sure it better can be the part of this patch. It doesn't
> have relationship with sse insn support, right?
This is why I said that this could be done in a followup patch.
> Looks you have a lot of idea on it. I suggest you can work on it. :)
Sorry, I have no interest at this point in time in working on the process
record support. I am, however, spending a very large amount of time trying
to review your code, provide comments, and answering your emails.
The suggestion about fixing the way you handle errors, in particular
the use of labels, is an important one, so please do not discard it
on the basis that someone else can work on it.
> + switch (tmpu8)
>
> Im not sure it clear or not. I think add more vals will make the code
> not clear.
I think you are wrong, but we can only know by comparing the two
alternatives. Your code is using switch statements inside switch
statements, and this allows this type of practice. But if it was me,
I would have asked for each case block that requires non-trivial
processing to be moved to a separate function. With that in mind,
you'd have had to declare a new variable instead of reusing a generic
one which has a meaningless name. In the present case, you can
certainly declare a variable local to where you need it. For instance:
case bla:
{
int regno;
target_read_memory (addr, ®no);
[...]
This code looks a lot clearer to me than:
case bla:
target_read_memory (addr, &tmpu);
That being said, this is not the most important part in the list of
things I'd like to see being improved in the process record code.
So, in the grand scheme of things, I'm fine if you are still not
convinced.
--
Joel
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-01-11 2:48 ` Hui Zhu
2010-01-11 4:05 ` Joel Brobecker
@ 2010-01-12 1:38 ` Michael Snyder
2010-03-28 16:27 ` Hui Zhu
1 sibling, 1 reply; 39+ messages in thread
From: Michael Snyder @ 2010-01-12 1:38 UTC (permalink / raw)
To: Hui Zhu; +Cc: Joel Brobecker, gdb-patches ml
Hui Zhu wrote:
>
> For the sse insn special test, when I write the code for it, I just
> read the spec and write the prec code. I don't good at write sse asm.
> Sorry for it. I need a people help me with it.
I'll help you get started, but you've got to do some of the work!
You want to be a gdb maintainer / contributor, well,
the job includes writing tests! ;-)
And I don't know any SSE assembly language either!
Let's take it off line until we have something to submit.
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-01-12 1:38 ` Michael Snyder
@ 2010-03-28 16:27 ` Hui Zhu
2010-03-29 1:35 ` Michael Snyder
` (3 more replies)
0 siblings, 4 replies; 39+ messages in thread
From: Hui Zhu @ 2010-03-28 16:27 UTC (permalink / raw)
To: Michael Snyder; +Cc: Joel Brobecker, gdb-patches ml
[-- Attachment #1: Type: text/plain, Size: 1199 bytes --]
Hello,
I make a testsute for sse. I make it just support x86-64 target
because I got insn unsupport trap in a x86-32 pc. Maybe the CPU of
this pc is too old. :)
And I found some bug in sse patch. I make a new one.
Please help me review them. Thanks.
Best regards,
Hui
2010-03-29 Hui Zhu <teawater@gmail.com>
* i386-tdep.c (OT_DQUAD): New enum.
(i386_process_record): Add code for MMX, 3DNow!, SSE, SSE2,
SSE3, SSSE3 and SSE4.
2010-03-29 Hui Zhu <teawater@gmail.com>
* gdb.reverse/i386-sse-reverse.exp: New file.
* gdb.reverse/i386-sse-reverse.c: New file.
On Tue, Jan 12, 2010 at 09:38, Michael Snyder <msnyder@vmware.com> wrote:
> Hui Zhu wrote:
>>
>> For the sse insn special test, when I write the code for it, I just
>> read the spec and write the prec code. I don't good at write sse asm.
>> Sorry for it. I need a people help me with it.
>
> I'll help you get started, but you've got to do some of the work!
> You want to be a gdb maintainer / contributor, well,
> the job includes writing tests! ;-)
>
> And I don't know any SSE assembly language either!
>
> Let's take it off line until we have something to submit.
>
>
[-- Attachment #2: prec-x86-sse.txt --]
[-- Type: text/plain, Size: 33849 bytes --]
---
i386-tdep.c | 862 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 833 insertions(+), 29 deletions(-)
--- a/i386-tdep.c
+++ b/i386-tdep.c
@@ -2882,6 +2882,7 @@ enum
OT_WORD,
OT_LONG,
OT_QUAD,
+ OT_DQUAD,
};
/* i386 arith/logic operations */
@@ -3329,7 +3330,7 @@ i386_process_record (struct gdbarch *gdb
ir.dflag = 1;
ir.override = -1;
ir.popl_esp_hack = 0;
- ir.regmap = gdbarch_tdep (gdbarch)->record_regmap;
+ ir.regmap = tdep->record_regmap;
ir.gdbarch = gdbarch;
if (record_debug > 1)
@@ -3447,7 +3448,7 @@ i386_process_record (struct gdbarch *gdb
return -1;
}
ir.addr++;
- opcode = (uint16_t) opcode8 | 0x0f00;
+ opcode = (uint32_t) opcode8 | 0x0f00;
goto reswitch;
break;
@@ -5110,7 +5111,7 @@ i386_process_record (struct gdbarch *gdb
/* XXX */
case 0xcc: /* int3 */
- printf_unfiltered (_("Process record doesn't support instruction "
+ printf_unfiltered (_("Process record does not support instruction "
"int3.\n"));
ir.addr -= 1;
goto no_support;
@@ -5131,15 +5132,15 @@ i386_process_record (struct gdbarch *gdb
}
ir.addr++;
if (interrupt != 0x80
- || gdbarch_tdep (gdbarch)->i386_intx80_record == NULL)
+ || tdep->i386_intx80_record == NULL)
{
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction int 0x%02x.\n"),
interrupt);
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_intx80_record (ir.regcache);
+ ret = tdep->i386_intx80_record (ir.regcache);
if (ret)
return ret;
}
@@ -5147,7 +5148,7 @@ i386_process_record (struct gdbarch *gdb
/* XXX */
case 0xce: /* into */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction into.\n"));
ir.addr -= 1;
goto no_support;
@@ -5158,7 +5159,7 @@ i386_process_record (struct gdbarch *gdb
break;
case 0x62: /* bound */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction bound.\n"));
ir.addr -= 1;
goto no_support;
@@ -5194,21 +5195,21 @@ i386_process_record (struct gdbarch *gdb
break;
case 0x0f30: /* wrmsr */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction wrmsr.\n"));
ir.addr -= 2;
goto no_support;
break;
case 0x0f32: /* rdmsr */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction rdmsr.\n"));
ir.addr -= 2;
goto no_support;
break;
case 0x0f31: /* rdtsc */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction rdtsc.\n"));
ir.addr -= 2;
goto no_support;
@@ -5222,21 +5223,21 @@ i386_process_record (struct gdbarch *gdb
ir.addr -= 2;
goto no_support;
}
- if (gdbarch_tdep (gdbarch)->i386_sysenter_record == NULL)
+ if (tdep->i386_sysenter_record == NULL)
{
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction sysenter.\n"));
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_sysenter_record (ir.regcache);
+ ret = tdep->i386_sysenter_record (ir.regcache);
if (ret)
return ret;
}
break;
case 0x0f35: /* sysexit */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction sysexit.\n"));
ir.addr -= 2;
goto no_support;
@@ -5245,21 +5246,21 @@ i386_process_record (struct gdbarch *gdb
case 0x0f05: /* syscall */
{
int ret;
- if (gdbarch_tdep (gdbarch)->i386_syscall_record == NULL)
+ if (tdep->i386_syscall_record == NULL)
{
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction syscall.\n"));
ir.addr -= 2;
goto no_support;
}
- ret = gdbarch_tdep (gdbarch)->i386_syscall_record (ir.regcache);
+ ret = tdep->i386_syscall_record (ir.regcache);
if (ret)
return ret;
}
break;
case 0x0f07: /* sysret */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction sysret.\n"));
ir.addr -= 2;
goto no_support;
@@ -5273,7 +5274,7 @@ i386_process_record (struct gdbarch *gdb
break;
case 0xf4: /* hlt */
- printf_unfiltered (_("Process record doesn't support "
+ printf_unfiltered (_("Process record does not support "
"instruction hlt.\n"));
ir.addr -= 1;
goto no_support;
@@ -5569,14 +5570,816 @@ i386_process_record (struct gdbarch *gdb
I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
break;
- /* MMX/SSE/SSE2/PNI support */
- /* XXX */
+ /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
+
+ case 0x0f0d: /* 3DNow! prefetch */
+ break;
+
+ case 0x0f0e: /* 3DNow! femms */
+ case 0x0f77: /* emms */
+ if (i386_fpc_regnum_p (gdbarch, I387_FTAG_REGNUM(tdep)))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache, I387_FTAG_REGNUM(tdep));
+ break;
+
+ case 0x0f0f: /* 3DNow! data */
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (target_read_memory (ir.addr, &opcode8, 1))
+ {
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr %s len = 1.\n"),
+ paddress (gdbarch, ir.addr));
+ return -1;
+ }
+ ir.addr++;
+ switch (opcode8)
+ {
+ case 0x0c: /* 3DNow! pi2fw */
+ case 0x0d: /* 3DNow! pi2fd */
+ case 0x1c: /* 3DNow! pf2iw */
+ case 0x1d: /* 3DNow! pf2id */
+ case 0x8a: /* 3DNow! pfnacc */
+ case 0x8e: /* 3DNow! pfpnacc */
+ case 0x90: /* 3DNow! pfcmpge */
+ case 0x94: /* 3DNow! pfmin */
+ case 0x96: /* 3DNow! pfrcp */
+ case 0x97: /* 3DNow! pfrsqrt */
+ case 0x9a: /* 3DNow! pfsub */
+ case 0x9e: /* 3DNow! pfadd */
+ case 0xa0: /* 3DNow! pfcmpgt */
+ case 0xa4: /* 3DNow! pfmax */
+ case 0xa6: /* 3DNow! pfrcpit1 */
+ case 0xa7: /* 3DNow! pfrsqit1 */
+ case 0xaa: /* 3DNow! pfsubr */
+ case 0xae: /* 3DNow! pfacc */
+ case 0xb0: /* 3DNow! pfcmpeq */
+ case 0xb4: /* 3DNow! pfmul */
+ case 0xb6: /* 3DNow! pfrcpit2 */
+ case 0xb7: /* 3DNow! pmulhrw */
+ case 0xbb: /* 3DNow! pswapd */
+ case 0xbf: /* 3DNow! pavgusb */
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
+ goto no_support_3dnow_data;
+ record_arch_list_add_reg (ir.regcache, ir.reg);
+ break;
+
+ default:
+no_support_3dnow_data:
+ opcode = (opcode << 8) | opcode8;
+ goto no_support;
+ break;
+ }
+ break;
+
+ case 0x0faa: /* rsm */
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
+ break;
+
+ case 0x0fae:
+ if (i386_record_modrm (&ir))
+ return -1;
+ switch(ir.reg)
+ {
+ case 0: /* fxsave */
+ {
+ uint64_t tmpu64;
+
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ if (i386_record_lea_modrm_addr (&ir, &tmpu64))
+ return -1;
+ if (record_arch_list_add_mem (tmpu64, 512))
+ return -1;
+ }
+ break;
+
+ case 1: /* fxrstor */
+ {
+ int i;
+
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+
+ for (i = I387_MM0_REGNUM (tdep);
+ i386_mmx_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ for (i = I387_XMM0_REGNUM (tdep);
+ i386_sse_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ if (i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
+ record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
+
+ for (i = I387_ST0_REGNUM (tdep);
+ i386_fp_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+
+ for (i = I387_FCTRL_REGNUM (tdep);
+ i386_fpc_regnum_p (gdbarch, i); i++)
+ record_arch_list_add_reg (ir.regcache, i);
+ }
+ break;
+
+ case 2: /* ldmxcsr */
+ if (!i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep)))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep));
+ break;
+
+ case 3: /* stmxcsr */
+ ir.ot = OT_LONG;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ case 5: /* lfence */
+ case 6: /* mfence */
+ case 7: /* sfence clflush */
+ break;
+
+ default:
+ opcode = (opcode << 8) | ir.modrm;
+ goto no_support;
+ break;
+ }
+ break;
+
+ case 0x0fc3: /* movnti */
+ ir.ot = (ir.dflag == 2) ? OT_QUAD : OT_LONG;
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ goto no_support;
+ ir.reg |= rex_r;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ /* Add prefix to opcode. */
+ case 0x0f10:
+ case 0x0f11:
+ case 0x0f12:
+ case 0x0f13:
+ case 0x0f14:
+ case 0x0f15:
+ case 0x0f16:
+ case 0x0f17:
+ case 0x0f28:
+ case 0x0f29:
+ case 0x0f2a:
+ case 0x0f2b:
+ case 0x0f2c:
+ case 0x0f2d:
+ case 0x0f2e:
+ case 0x0f2f:
+ case 0x0f38:
+ case 0x0f39:
+ case 0x0f3a:
+ case 0x0f50:
+ case 0x0f51:
+ case 0x0f52:
+ case 0x0f53:
+ case 0x0f54:
+ case 0x0f55:
+ case 0x0f56:
+ case 0x0f57:
+ case 0x0f58:
+ case 0x0f59:
+ case 0x0f5a:
+ case 0x0f5b:
+ case 0x0f5c:
+ case 0x0f5d:
+ case 0x0f5e:
+ case 0x0f5f:
+ case 0x0f60:
+ case 0x0f61:
+ case 0x0f62:
+ case 0x0f63:
+ case 0x0f64:
+ case 0x0f65:
+ case 0x0f66:
+ case 0x0f67:
+ case 0x0f68:
+ case 0x0f69:
+ case 0x0f6a:
+ case 0x0f6b:
+ case 0x0f6c:
+ case 0x0f6d:
+ case 0x0f6e:
+ case 0x0f6f:
+ case 0x0f70:
+ case 0x0f71:
+ case 0x0f72:
+ case 0x0f73:
+ case 0x0f74:
+ case 0x0f75:
+ case 0x0f76:
+ case 0x0f7c:
+ case 0x0f7d:
+ case 0x0f7e:
+ case 0x0f7f:
+ case 0x0fb8:
+ case 0x0fc2:
+ case 0x0fc4:
+ case 0x0fc5:
+ case 0x0fc6:
+ case 0x0fd0:
+ case 0x0fd1:
+ case 0x0fd2:
+ case 0x0fd3:
+ case 0x0fd4:
+ case 0x0fd5:
+ case 0x0fd6:
+ case 0x0fd7:
+ case 0x0fd8:
+ case 0x0fd9:
+ case 0x0fda:
+ case 0x0fdb:
+ case 0x0fdc:
+ case 0x0fdd:
+ case 0x0fde:
+ case 0x0fdf:
+ case 0x0fe0:
+ case 0x0fe1:
+ case 0x0fe2:
+ case 0x0fe3:
+ case 0x0fe4:
+ case 0x0fe5:
+ case 0x0fe6:
+ case 0x0fe7:
+ case 0x0fe8:
+ case 0x0fe9:
+ case 0x0fea:
+ case 0x0feb:
+ case 0x0fec:
+ case 0x0fed:
+ case 0x0fee:
+ case 0x0fef:
+ case 0x0ff0:
+ case 0x0ff1:
+ case 0x0ff2:
+ case 0x0ff3:
+ case 0x0ff4:
+ case 0x0ff5:
+ case 0x0ff6:
+ case 0x0ff7:
+ case 0x0ff8:
+ case 0x0ff9:
+ case 0x0ffa:
+ case 0x0ffb:
+ case 0x0ffc:
+ case 0x0ffd:
+ case 0x0ffe:
+ switch (prefixes)
+ {
+ case PREFIX_REPNZ:
+ opcode |= 0xf20000;
+ break;
+ case PREFIX_DATA:
+ opcode |= 0x660000;
+ break;
+ case PREFIX_REPZ:
+ opcode |= 0xf30000;
+ break;
+ }
+reswitch_prefix_add:
+ switch (opcode)
+ {
+ case 0x0f38:
+ case 0x660f38:
+ case 0xf20f38:
+ case 0x0f3a:
+ case 0x660f3a:
+ if (target_read_memory (ir.addr, &opcode8, 1))
+ {
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr %s len = 1.\n"),
+ paddress (gdbarch, ir.addr));
+ return -1;
+ }
+ ir.addr++;
+ opcode = (uint32_t) opcode8 | opcode << 8;
+ goto reswitch_prefix_add;
+ break;
+
+ case 0x0f10: /* movups */
+ case 0x660f10: /* movupd */
+ case 0xf30f10: /* movss */
+ case 0xf20f10: /* movsd */
+ case 0x0f12: /* movlps */
+ case 0x660f12: /* movlpd */
+ case 0xf30f12: /* movsldup */
+ case 0xf20f12: /* movddup */
+ case 0x0f14: /* unpcklps */
+ case 0x660f14: /* unpcklpd */
+ case 0x0f15: /* unpckhps */
+ case 0x660f15: /* unpckhpd */
+ case 0x0f16: /* movhps */
+ case 0x660f16: /* movhpd */
+ case 0xf30f16: /* movshdup */
+ case 0x0f28: /* movaps */
+ case 0x660f28: /* movapd */
+ case 0x0f2a: /* cvtpi2ps */
+ case 0x660f2a: /* cvtpi2pd */
+ case 0xf30f2a: /* cvtsi2ss */
+ case 0xf20f2a: /* cvtsi2sd */
+ case 0x0f2c: /* cvttps2pi */
+ case 0x660f2c: /* cvttpd2pi */
+ case 0x0f2d: /* cvtps2pi */
+ case 0x660f2d: /* cvtpd2pi */
+ case 0x660f3800: /* pshufb */
+ case 0x660f3801: /* phaddw */
+ case 0x660f3802: /* phaddd */
+ case 0x660f3803: /* phaddsw */
+ case 0x660f3804: /* pmaddubsw */
+ case 0x660f3805: /* phsubw */
+ case 0x660f3806: /* phsubd */
+ case 0x660f3807: /* phaddsw */
+ case 0x660f3808: /* psignb */
+ case 0x660f3809: /* psignw */
+ case 0x660f380a: /* psignd */
+ case 0x660f380b: /* pmulhrsw */
+ case 0x660f3810: /* pblendvb */
+ case 0x660f3814: /* blendvps */
+ case 0x660f3815: /* blendvpd */
+ case 0x660f381c: /* pabsb */
+ case 0x660f381d: /* pabsw */
+ case 0x660f381e: /* pabsd */
+ case 0x660f3820: /* pmovsxbw */
+ case 0x660f3821: /* pmovsxbd */
+ case 0x660f3822: /* pmovsxbq */
+ case 0x660f3823: /* pmovsxwd */
+ case 0x660f3824: /* pmovsxwq */
+ case 0x660f3825: /* pmovsxdq */
+ case 0x660f3828: /* pmuldq */
+ case 0x660f3829: /* pcmpeqq */
+ case 0x660f382a: /* movntdqa */
+ case 0x660f3a08: /* roundps */
+ case 0x660f3a09: /* roundpd */
+ case 0x660f3a0a: /* roundss */
+ case 0x660f3a0b: /* roundsd */
+ case 0x660f3a0c: /* blendps */
+ case 0x660f3a0d: /* blendpd */
+ case 0x660f3a0e: /* pblendw */
+ case 0x660f3a0f: /* palignr */
+ case 0x660f3a20: /* pinsrb */
+ case 0x660f3a21: /* insertps */
+ case 0x660f3a22: /* pinsrd pinsrq */
+ case 0x660f3a40: /* dpps */
+ case 0x660f3a41: /* dppd */
+ case 0x660f3a42: /* mpsadbw */
+ case 0x660f3a60: /* pcmpestrm */
+ case 0x660f3a61: /* pcmpestri */
+ case 0x660f3a62: /* pcmpistrm */
+ case 0x660f3a63: /* pcmpistri */
+ case 0x0f51: /* sqrtps */
+ case 0x660f51: /* sqrtpd */
+ case 0xf20f51: /* sqrtsd */
+ case 0xf30f51: /* sqrtss */
+ case 0x0f52: /* rsqrtps */
+ case 0xf30f52: /* rsqrtss */
+ case 0x0f53: /* rcpps */
+ case 0xf30f53: /* rcpss */
+ case 0x0f54: /* andps */
+ case 0x660f54: /* andpd */
+ case 0x0f55: /* andnps */
+ case 0x660f55: /* andnpd */
+ case 0x0f56: /* orps */
+ case 0x660f56: /* orpd */
+ case 0x0f57: /* xorps */
+ case 0x660f57: /* xorpd */
+ case 0x0f58: /* addps */
+ case 0x660f58: /* addpd */
+ case 0xf20f58: /* addsd */
+ case 0xf30f58: /* addss */
+ case 0x0f59: /* mulps */
+ case 0x660f59: /* mulpd */
+ case 0xf20f59: /* mulsd */
+ case 0xf30f59: /* mulss */
+ case 0x0f5a: /* cvtps2pd */
+ case 0x660f5a: /* cvtpd2ps */
+ case 0xf20f5a: /* cvtsd2ss */
+ case 0xf30f5a: /* cvtss2sd */
+ case 0x0f5b: /* cvtdq2ps */
+ case 0x660f5b: /* cvtps2dq */
+ case 0xf30f5b: /* cvttps2dq */
+ case 0x0f5c: /* subps */
+ case 0x660f5c: /* subpd */
+ case 0xf20f5c: /* subsd */
+ case 0xf30f5c: /* subss */
+ case 0x0f5d: /* minps */
+ case 0x660f5d: /* minpd */
+ case 0xf20f5d: /* minsd */
+ case 0xf30f5d: /* minss */
+ case 0x0f5e: /* divps */
+ case 0x660f5e: /* divpd */
+ case 0xf20f5e: /* divsd */
+ case 0xf30f5e: /* divss */
+ case 0x0f5f: /* maxps */
+ case 0x660f5f: /* maxpd */
+ case 0xf20f5f: /* maxsd */
+ case 0xf30f5f: /* maxss */
+ case 0x660f60: /* punpcklbw */
+ case 0x660f61: /* punpcklwd */
+ case 0x660f62: /* punpckldq */
+ case 0x660f63: /* packsswb */
+ case 0x660f64: /* pcmpgtb */
+ case 0x660f65: /* pcmpgtw */
+ case 0x660f66: /* pcmpgtl */
+ case 0x660f67: /* packuswb */
+ case 0x660f68: /* punpckhbw */
+ case 0x660f69: /* punpckhwd */
+ case 0x660f6a: /* punpckhdq */
+ case 0x660f6b: /* packssdw */
+ case 0x660f6c: /* punpcklqdq */
+ case 0x660f6d: /* punpckhqdq */
+ case 0x660f6e: /* movd */
+ case 0x660f6f: /* movdqa */
+ case 0xf30f6f: /* movdqu */
+ case 0x660f70: /* pshufd */
+ case 0xf20f70: /* pshuflw */
+ case 0xf30f70: /* pshufhw */
+ case 0x660f74: /* pcmpeqb */
+ case 0x660f75: /* pcmpeqw */
+ case 0x660f76: /* pcmpeql */
+ case 0x660f7c: /* haddpd */
+ case 0xf20f7c: /* haddps */
+ case 0x660f7d: /* hsubpd */
+ case 0xf20f7d: /* hsubps */
+ case 0xf30f7e: /* movq */
+ case 0x0fc2: /* cmpps */
+ case 0x660fc2: /* cmppd */
+ case 0xf20fc2: /* cmpsd */
+ case 0xf30fc2: /* cmpss */
+ case 0x660fc4: /* pinsrw */
+ case 0x0fc6: /* shufps */
+ case 0x660fc6: /* shufpd */
+ case 0x660fd0: /* addsubpd */
+ case 0xf20fd0: /* addsubps */
+ case 0x660fd1: /* psrlw */
+ case 0x660fd2: /* psrld */
+ case 0x660fd3: /* psrlq */
+ case 0x660fd4: /* paddq */
+ case 0x660fd5: /* pmullw */
+ case 0xf30fd6: /* movq2dq */
+ case 0x660fd8: /* psubusb */
+ case 0x660fd9: /* psubusw */
+ case 0x660fda: /* pminub */
+ case 0x660fdb: /* pand */
+ case 0x660fdc: /* paddusb */
+ case 0x660fdd: /* paddusw */
+ case 0x660fde: /* pmaxub */
+ case 0x660fdf: /* pandn */
+ case 0x660fe0: /* pavgb */
+ case 0x660fe1: /* psraw */
+ case 0x660fe2: /* psrad */
+ case 0x660fe3: /* pavgw */
+ case 0x660fe4: /* pmulhuw */
+ case 0x660fe5: /* pmulhw */
+ case 0x660fe6: /* cvttpd2dq */
+ case 0xf20fe6: /* cvtpd2dq */
+ case 0xf30fe6: /* cvtdq2pd */
+ case 0x660fe8: /* psubsb */
+ case 0x660fe9: /* psubsw */
+ case 0x660fea: /* pminsw */
+ case 0x660feb: /* por */
+ case 0x660fec: /* paddsb */
+ case 0x660fed: /* paddsw */
+ case 0x660fee: /* pmaxsw */
+ case 0x660fef: /* pxor */
+ case 0x660ff0: /* lddqu */
+ case 0x660ff1: /* psllw */
+ case 0x660ff2: /* pslld */
+ case 0x660ff3: /* psllq */
+ case 0x660ff4: /* pmuludq */
+ case 0x660ff5: /* pmaddwd */
+ case 0x660ff6: /* psadbw */
+ case 0x660ff8: /* psubb */
+ case 0x660ff9: /* psubw */
+ case 0x660ffa: /* psubl */
+ case 0x660ffb: /* psubq */
+ case 0x660ffc: /* paddb */
+ case 0x660ffd: /* paddw */
+ case 0x660ffe: /* paddl */
+ if (i386_record_modrm (&ir))
+ return -1;
+ ir.reg |= rex_r;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.reg))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.reg);
+ if ((opcode & 0xfffffffc) == 0x660f3a60)
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ case 0x0f11: /* movups */
+ case 0x660f11: /* movupd */
+ case 0xf30f11: /* movss */
+ case 0xf20f11: /* movsd */
+ case 0x0f13: /* movlps */
+ case 0x660f13: /* movlpd */
+ case 0x0f17: /* movhps */
+ case 0x660f17: /* movhpd */
+ case 0x0f29: /* movaps */
+ case 0x660f29: /* movapd */
+ case 0x660f3a14: /* pextrb */
+ case 0x660f3a15: /* pextrw */
+ case 0x660f3a16: /* pextrd pextrq */
+ case 0x660f3a17: /* extractps */
+ case 0x660f7f: /* movdqa */
+ case 0xf30f7f: /* movdqu */
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ if (opcode == 0x0f13 || opcode == 0x660f13
+ || opcode == 0x0f17 || opcode == 0x660f17)
+ goto no_support;
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ switch (opcode)
+ {
+ case 0x660f3a14:
+ ir.ot = OT_BYTE;
+ break;
+ case 0x660f3a15:
+ ir.ot = OT_WORD;
+ break;
+ case 0x660f3a16:
+ ir.ot = OT_LONG;
+ break;
+ case 0x660f3a17:
+ ir.ot = OT_QUAD;
+ break;
+ default:
+ ir.ot = OT_DQUAD;
+ break;
+ }
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ case 0x0f2b: /* movntps */
+ case 0x660f2b: /* movntpd */
+ case 0x0fe7: /* movntq */
+ case 0x660fe7: /* movntdq */
+ if (ir.mod == 3)
+ goto no_support;
+ if (opcode == 0x0fe7)
+ ir.ot = OT_QUAD;
+ else
+ ir.ot = OT_DQUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ break;
+
+ case 0xf30f2c: /* cvttss2si */
+ case 0xf20f2c: /* cvttsd2si */
+ case 0xf30f2d: /* cvtss2si */
+ case 0xf20f2d: /* cvtsd2si */
+ case 0xf20f38f0: /* crc32 */
+ case 0xf20f38f1: /* crc32 */
+ case 0x0f50: /* movmskps */
+ case 0x660f50: /* movmskpd */
+ case 0x0fc5: /* pextrw */
+ case 0x660fc5: /* pextrw */
+ case 0x0fd7: /* pmovmskb */
+ case 0x660fd7: /* pmovmskb */
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r);
+ break;
+
+ case 0x0f3800: /* pshufb */
+ case 0x0f3801: /* phaddw */
+ case 0x0f3802: /* phaddd */
+ case 0x0f3803: /* phaddsw */
+ case 0x0f3804: /* pmaddubsw */
+ case 0x0f3805: /* phsubw */
+ case 0x0f3806: /* phsubd */
+ case 0x0f3807: /* phaddsw */
+ case 0x0f3808: /* psignb */
+ case 0x0f3809: /* psignw */
+ case 0x0f380a: /* psignd */
+ case 0x0f380b: /* pmulhrsw */
+ case 0x0f381c: /* pabsb */
+ case 0x0f381d: /* pabsw */
+ case 0x0f381e: /* pabsd */
+ case 0x0f382b: /* packusdw */
+ case 0x0f3830: /* pmovzxbw */
+ case 0x0f3831: /* pmovzxbd */
+ case 0x0f3832: /* pmovzxbq */
+ case 0x0f3833: /* pmovzxwd */
+ case 0x0f3834: /* pmovzxwq */
+ case 0x0f3835: /* pmovzxdq */
+ case 0x0f3837: /* pcmpgtq */
+ case 0x0f3838: /* pminsb */
+ case 0x0f3839: /* pminsd */
+ case 0x0f383a: /* pminuw */
+ case 0x0f383b: /* pminud */
+ case 0x0f383c: /* pmaxsb */
+ case 0x0f383d: /* pmaxsd */
+ case 0x0f383e: /* pmaxuw */
+ case 0x0f383f: /* pmaxud */
+ case 0x0f3840: /* pmulld */
+ case 0x0f3841: /* phminposuw */
+ case 0x0f3a0f: /* palignr */
+ case 0x0f60: /* punpcklbw */
+ case 0x0f61: /* punpcklwd */
+ case 0x0f62: /* punpckldq */
+ case 0x0f63: /* packsswb */
+ case 0x0f64: /* pcmpgtb */
+ case 0x0f65: /* pcmpgtw */
+ case 0x0f66: /* pcmpgtl */
+ case 0x0f67: /* packuswb */
+ case 0x0f68: /* punpckhbw */
+ case 0x0f69: /* punpckhwd */
+ case 0x0f6a: /* punpckhdq */
+ case 0x0f6b: /* packssdw */
+ case 0x0f6e: /* movd */
+ case 0x0f6f: /* movq */
+ case 0x0f70: /* pshufw */
+ case 0x0f74: /* pcmpeqb */
+ case 0x0f75: /* pcmpeqw */
+ case 0x0f76: /* pcmpeql */
+ case 0x0fc4: /* pinsrw */
+ case 0x0fd1: /* psrlw */
+ case 0x0fd2: /* psrld */
+ case 0x0fd3: /* psrlq */
+ case 0x0fd4: /* paddq */
+ case 0x0fd5: /* pmullw */
+ case 0xf20fd6: /* movdq2q */
+ case 0x0fd8: /* psubusb */
+ case 0x0fd9: /* psubusw */
+ case 0x0fda: /* pminub */
+ case 0x0fdb: /* pand */
+ case 0x0fdc: /* paddusb */
+ case 0x0fdd: /* paddusw */
+ case 0x0fde: /* pmaxub */
+ case 0x0fdf: /* pandn */
+ case 0x0fe0: /* pavgb */
+ case 0x0fe1: /* psraw */
+ case 0x0fe2: /* psrad */
+ case 0x0fe3: /* pavgw */
+ case 0x0fe4: /* pmulhuw */
+ case 0x0fe5: /* pmulhw */
+ case 0x0fe8: /* psubsb */
+ case 0x0fe9: /* psubsw */
+ case 0x0fea: /* pminsw */
+ case 0x0feb: /* por */
+ case 0x0fec: /* paddsb */
+ case 0x0fed: /* paddsw */
+ case 0x0fee: /* pmaxsw */
+ case 0x0fef: /* pxor */
+ case 0x0ff1: /* psllw */
+ case 0x0ff2: /* pslld */
+ case 0x0ff3: /* psllq */
+ case 0x0ff4: /* pmuludq */
+ case 0x0ff5: /* pmaddwd */
+ case 0x0ff6: /* psadbw */
+ case 0x0ff8: /* psubb */
+ case 0x0ff9: /* psubw */
+ case 0x0ffa: /* psubl */
+ case 0x0ffb: /* psubq */
+ case 0x0ffc: /* paddb */
+ case 0x0ffd: /* paddw */
+ case 0x0ffe: /* paddl */
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.reg);
+ break;
+
+ case 0x0f71: /* psllw */
+ case 0x0f72: /* pslld */
+ case 0x0f73: /* psllq */
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.rm);
+ break;
+
+ case 0x660f71: /* psllw */
+ case 0x660f72: /* pslld */
+ case 0x660f73: /* psllq */
+ if (i386_record_modrm (&ir))
+ return -1;
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ break;
+
+ case 0x0f7e: /* movd */
+ case 0x660f7e: /* movd */
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b);
+ else
+ {
+ if (ir.dflag == 2)
+ ir.ot = OT_QUAD;
+ else
+ ir.ot = OT_LONG;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ case 0x0f7f: /* movq */
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_MM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ ir.ot = OT_QUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ case 0xf30fb8: /* popcnt */
+ if (i386_record_modrm (&ir))
+ return -1;
+ I386_RECORD_ARCH_LIST_ADD_REG (ir.reg);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ case 0x660fd6: /* movq */
+ if (i386_record_modrm (&ir))
+ return -1;
+ if (ir.mod == 3)
+ {
+ ir.rm |= ir.rex_b;
+ if (!i386_sse_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm))
+ goto no_support;
+ record_arch_list_add_reg (ir.regcache,
+ I387_XMM0_REGNUM (tdep) + ir.rm);
+ }
+ else
+ {
+ ir.ot = OT_QUAD;
+ if (i386_record_lea_modrm (&ir))
+ return -1;
+ }
+ break;
+
+ case 0x660f3817: /* ptest */
+ case 0x0f2e: /* ucomiss */
+ case 0x660f2e: /* ucomisd */
+ case 0x0f2f: /* comiss */
+ case 0x660f2f: /* comisd */
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ break;
+
+ case 0x0ff7: /* maskmovq */
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_REDI_REGNUM],
+ &addr);
+ if (record_arch_list_add_mem (addr, 64))
+ return -1;
+ break;
+
+ case 0x660ff7: /* maskmovdqu */
+ regcache_raw_read_unsigned (ir.regcache,
+ ir.regmap[X86_RECORD_REDI_REGNUM],
+ &addr);
+ if (record_arch_list_add_mem (addr, 128))
+ return -1;
+ break;
+
+ default:
+ goto no_support;
+ break;
+ }
+ break;
default:
- if (opcode > 0xff)
- ir.addr -= 2;
- else
- ir.addr -= 1;
goto no_support;
break;
}
@@ -5589,9 +6392,10 @@ i386_process_record (struct gdbarch *gdb
return 0;
no_support:
- printf_unfiltered (_("Process record doesn't support instruction 0x%02x "
- "at address %s.\n"),
- (unsigned int) (opcode), paddress (gdbarch, ir.addr));
+ printf_unfiltered (_("Process record does not support instruction 0x%02x "
+ "at address %s.\n"),
+ (unsigned int) (opcode),
+ paddress (gdbarch, ir.orig_addr));
return -1;
}
[-- Attachment #3: prec-x86-sse-test.txt --]
[-- Type: text/plain, Size: 23640 bytes --]
---
testsuite/gdb.reverse/i386-sse-reverse.c | 85 +++
testsuite/gdb.reverse/i386-sse-reverse.exp | 697 +++++++++++++++++++++++++++++
2 files changed, 782 insertions(+)
--- /dev/null
+++ b/testsuite/gdb.reverse/i386-sse-reverse.c
@@ -0,0 +1,85 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+ Copyright 2009, 2010 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+/* Architecture tests for intel i386 platform. */
+
+void
+sse_test (void)
+{
+ char buf0[] = {0, 1, 2, 3, 4, 5, 6, 7, 8,
+ 9, 10, 11, 12, 13, 14, 15};
+ char buf1[] = {16, 17, 18, 19, 20, 21, 22, 23,
+ 24, 25, 26, 27, 28, 29, 30, 31};
+ char buf2[] = {32, 33, 34, 35, 36, 37, 38, 39,
+ 40, 41, 42, 43, 44, 45, 46, 47};
+
+ asm ("movupd %0, %%xmm0":"=m"(buf0));
+ asm ("movupd %0, %%xmm1":"=m"(buf1));
+ asm ("movupd %0, %%xmm2":"=m"(buf2));
+
+ asm ("addpd %xmm0, %xmm1");
+ asm ("addps %xmm1, %xmm2");
+ asm ("addsd %xmm2, %xmm1");
+ asm ("addss %xmm1, %xmm0");
+ asm ("addsubpd %xmm0, %xmm2");
+ asm ("addsubps %xmm0, %xmm1");
+ asm ("andpd %xmm1, %xmm2");
+ asm ("andps %xmm2, %xmm1");
+ asm ("blendpd $1, %xmm1, %xmm0");
+ asm ("blendps $2, %xmm2, %xmm0");
+ asm ("blendvpd %xmm1, %xmm2");
+ asm ("blendvps %xmm2, %xmm1");
+ asm ("cmppd $3, %xmm0, %xmm1");
+ asm ("cmpps $4, %xmm1, %xmm2");
+ asm ("cmpsd $5, %xmm2, %xmm1");
+ asm ("cmpss $6, %xmm1, %xmm0");
+ asm ("comisd %xmm0, %xmm2");
+ asm ("comiss %xmm0, %xmm1");
+ asm ("cvtdq2pd %xmm1, %xmm2");
+ asm ("cvtdq2ps %xmm2, %xmm1");
+ asm ("cvtpd2dq %xmm1, %xmm0");
+ asm ("cvtdq2ps %xmm2, %xmm0");
+ asm ("cvtpd2ps %xmm0, %xmm1");
+ asm ("divpd %xmm1, %xmm2");
+ asm ("divps %xmm2, %xmm1");
+ asm ("divsd %xmm1, %xmm0");
+ asm ("divss %xmm0, %xmm2");
+ asm ("mulpd %xmm0, %xmm1");
+ asm ("mulps %xmm1, %xmm2");
+ asm ("mulsd %xmm2, %xmm1");
+ asm ("mulss %xmm1, %xmm0");
+ asm ("orpd %xmm2, %xmm0");
+ asm ("orps %xmm0, %xmm1");
+ asm ("pabsb %xmm1, %xmm2");
+ asm ("pabsw %xmm2, %xmm1");
+ asm ("pabsd %xmm1, %xmm0");
+ asm ("packsswb %xmm0, %xmm2");
+ asm ("packssdw %xmm0, %xmm1");
+ asm ("ucomisd %xmm1, %xmm2");
+ asm ("ucomiss %xmm2, %xmm1");
+ asm ("unpckhpd %xmm1, %xmm0");
+ asm ("unpckhps %xmm2, %xmm0");
+ asm ("xorpd %xmm0, %xmm1");
+ asm ("xorps %xmm1, %xmm2");
+} /* end sse_test */
+
+int
+main ()
+{
+ sse_test ();
+ return 0; /* end of main */
+}
--- /dev/null
+++ b/testsuite/gdb.reverse/i386-sse-reverse.exp
@@ -0,0 +1,697 @@
+# Copyright 2009, 2010 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+#
+# This test tests some i386 general instructions for reverse execution.
+#
+
+if ![target_info exists gdb,can_reverse] {
+ return
+}
+
+if $tracelevel {
+ strace $tracelevel
+}
+
+set prms_id 0
+set bug_id 0
+
+if ![istarget "*86*-*linux*"] then {
+ verbose "Skipping i386 reverse tests."
+ return
+}
+
+set testfile "i386-sse-reverse"
+set srcfile ${testfile}.c
+set binfile ${objdir}/${subdir}/${testfile}
+
+# some targets have leading underscores on assembly symbols.
+# TODO: detect this automatically
+set additional_flags ""
+if [istarget "i?86-*-cygwin*"] then {
+ set additional_flags "additional_flags=-DSYMBOL_PREFIX=\"_\""
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable [list debug $additional_flags]] != "" } {
+ untested i386-sse-reverse
+ return -1
+}
+
+set end_of_main [gdb_get_line_number " end of main "]
+set end_sse_test [gdb_get_line_number " end sse_test "]
+
+# Get things started.
+
+gdb_exit
+gdb_start
+gdb_reinitialize_dir $srcdir/$subdir
+gdb_load ${binfile}
+runto main
+
+if [target_info exists gdb,use_precord] {
+ # Activate process record/replay
+ gdb_test "record" "" "Turn on process record"
+ # FIXME: command ought to acknowledge, so we can test if it succeeded.
+}
+
+global hex
+global decimal
+
+gdb_test "break $end_sse_test" \
+ "Breakpoint $decimal at .* line $end_sse_test\." \
+ "set breakpoint at end of sse_test"
+
+gdb_test "continue" \
+ " end sse_test .*" \
+ "continue to sse_test"
+
+gdb_test "reverse-step" "xorps.*" "reverse-step to xorps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x7f7f7f007fff7fff7f7f7f007fff7fff.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x008000ff00000000008000ff00000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f7f7f007f7f7f007f7f7f007f7f7f00.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "xorpd.*" "reverse-step to xorpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x7f7f7f007fff7fff7f7f7f007fff7fff.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f7f7f007f7f7f007f7f7f007f7f7f00.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "unpckhps.*" "reverse-step to unpckhps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x7fff7fff7fff7fff0108200001400000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f7f7f007f7f7f007f7f7f007f7f7f00.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "unpckhpd.*" "reverse-step to unpckhpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x010820000140000061107f0201800000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f7f7f007f7f7f007f7f7f007f7f7f00.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "ucomiss.*" "reverse-step to ucomiss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x010820000140000061107f0201800000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f7f7f007f7f7f007f7f7f007f7f7f00.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "ucomisd.*" "reverse-step to ucomisd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x010820000140000061107f0201800000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f7f7f007f7f7f007f7f7f007f7f7f00.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "packssdw.*" "reverse-step to packssdw"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x010820000140000061107f0201800000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x010820000140000061107f0201800000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f7f7f007f7f7f007f7f7f007f7f7f00.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "packsswb.*" "reverse-step to packsswb"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x010820000140000061107f0201800000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x010820000140000061107f0201800000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x010820000140000061107f0201800000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "pabsd.*" "reverse-step to pabsd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xfff02000ffc000008ff03ffeff800000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x010820000140000061107f0201800000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x010820000140000061107f0201800000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "pabsw.*" "reverse-step to pabsw"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xfff02000ffc000008ff03ffeff800000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff82000ffc000009ff07ffeff800000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x010820000140000061107f0201800000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "pabsb.*" "reverse-step to pabsb"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xfff02000ffc000008ff03ffeff800000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff82000ffc000009ff07ffeff800000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff00000ffc000008f402ffc80000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "orps.*" "reverse-step to orps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xfff02000ffc000008ff03ffeff800000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc000001dd0505c79000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff00000ffc000008f402ffc80000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "orpd.*" "reverse-step to orpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xce802000000000000ef01ffeff800000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc000001dd0505c79000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff00000ffc000008f402ffc80000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "mulss.*" "reverse-step to mulss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xce802000000000000ef01ffefe811010.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc000001dd0505c79000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff00000ffc000008f402ffc80000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "mulsd.*" "reverse-step to mulsd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xce802000000000000ef01ffefe811010.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000ce80200000000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff00000ffc000008f402ffc80000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "mulps.*" "reverse-step to mulps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xce802000000000000ef01ffefe811010.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000ce80200000000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff0000000000000005ffffe80000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "mulpd.*" "reverse-step to mulpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xce802000000000000ef01ffefe811010.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff00000ffc00000ff800000ff800000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff0000000000000005ffffe80000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "divss.*" "reverse-step to divss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xce802000000000000ef01ffefe811010.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff00000ffc00000ff800000ff800000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff0000000000000005ffffe01001fe0.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "divsd.*" "reverse-step to divsd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xce80200000000000ce80200000000000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff00000ffc00000ff800000ff800000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff0000000000000005ffffe01001fe0.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "divps.*" "reverse-step to divps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xce80200000000000ce80200000000000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ff800000ff800000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff0000000000000005ffffe01001fe0.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "divpd.*" "reverse-step to divpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xce80200000000000ce80200000000000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ff800000ff800000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "cvtpd2ps.*" "reverse-step to cvtpd2ps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xce80200000000000ce80200000000000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xce80200000000000ce80200000000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "cvtdq2ps.*" "reverse-step to cvtdq2ps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x00000000000000008000000080000000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xce80200000000000ce80200000000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "cvtpd2dq.*" "reverse-step to cvtpd2dq"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a090827262524ffffffff.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xce80200000000000ce80200000000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "cvtdq2ps.*" "reverse-step to cvtdq2ps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a090827262524ffffffff.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "cvtdq2pd.*" "reverse-step to cvtdq2pd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a090827262524ffffffff.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "comiss.*" "reverse-step to comiss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a090827262524ffffffff.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "comisd.*" "reverse-step to comisd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a090827262524ffffffff.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "cmpss.*" "reverse-step to cmpss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "cmpsd.*" "reverse-step to cmpsd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x00000000000000000000000000000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "cmpps.*" "reverse-step to cmpps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x00000000000000000000000000000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "cmppd.*" "reverse-step to cmppd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "blendvps.*" "reverse-step to blendvps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "blendvpd.*" "reverse-step to blendvpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "blendps.*" "reverse-step to blendps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "blendpd.*" "reverse-step to blendpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "andps.*" "reverse-step to andps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252400000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "andpd.*" "reverse-step to andpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252400000000.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "addsubps.*" "reverse-step to addsubps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252423222120.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "addsubpd.*" "reverse-step to addsubpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252423222120.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "addss.*" "reverse-step to addss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252423222120.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "addsd.*" "reverse-step to addsd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "addps.*" "reverse-step to addps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2"
+
+gdb_test "reverse-step" "addpd.*" "reverse-step to addpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
+ "verify xmm0"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2"
+
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-03-28 16:27 ` Hui Zhu
@ 2010-03-29 1:35 ` Michael Snyder
2010-03-29 1:36 ` Michael Snyder
` (2 subsequent siblings)
3 siblings, 0 replies; 39+ messages in thread
From: Michael Snyder @ 2010-03-29 1:35 UTC (permalink / raw)
To: Hui Zhu; +Cc: Joel Brobecker, gdb-patches ml
Hui Zhu wrote:
> Hello,
>
> I make a testsute for sse. I make it just support x86-64 target
> because I got insn unsupport trap in a x86-32 pc. Maybe the CPU of
> this pc is too old. :)
>
> And I found some bug in sse patch. I make a new one.
>
> Please help me review them. Thanks.
This is great. However, I got an assembler error from running the
testsuite. My system is RHEL 5 64-bits.
gdb compile failed, /tmp/cctfDf2z.s: Assembler messages:
/tmp/cctfDf2z.s:99: Error: suffix or operands invalid for `blendvpd'
/tmp/cctfDf2z.s:101: Error: suffix or operands invalid for `blendvps'
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-03-28 16:27 ` Hui Zhu
2010-03-29 1:35 ` Michael Snyder
@ 2010-03-29 1:36 ` Michael Snyder
2010-03-29 9:25 ` Hui Zhu
2010-03-29 1:40 ` Michael Snyder
2010-03-29 2:18 ` Michael Snyder
3 siblings, 1 reply; 39+ messages in thread
From: Michael Snyder @ 2010-03-29 1:36 UTC (permalink / raw)
To: Hui Zhu; +Cc: Joel Brobecker, gdb-patches ml
[-- Attachment #1: Type: text/plain, Size: 324 bytes --]
Hui Zhu wrote:
> Hello,
>
> I make a testsute for sse. I make it just support x86-64 target
> because I got insn unsupport trap in a x86-32 pc. Maybe the CPU of
> this pc is too old. :)
>
> And I found some bug in sse patch. I make a new one.
>
> Please help me review them. Thanks.
Two minor comments on the code:
[-- Attachment #2: comment.txt --]
[-- Type: text/plain, Size: 2940 bytes --]
+ case 0x0faa: /* rsm */
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
+ I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
+ break;
+
+ case 0x0fae:
Is there a comment for this case statement?
Maybe it doesn't need one, but most of the others have one...
+ /* Add prefix to opcode. */
+ case 0x0f10:
+ case 0x0f11:
+ case 0x0f12:
+ case 0x0f13:
+ case 0x0f14:
+ case 0x0f15:
+ case 0x0f16:
+ case 0x0f17:
+ case 0x0f28:
+ case 0x0f29:
+ case 0x0f2a:
+ case 0x0f2b:
+ case 0x0f2c:
+ case 0x0f2d:
+ case 0x0f2e:
+ case 0x0f2f:
+ case 0x0f38:
+ case 0x0f39:
+ case 0x0f3a:
+ case 0x0f50:
+ case 0x0f51:
+ case 0x0f52:
+ case 0x0f53:
+ case 0x0f54:
+ case 0x0f55:
+ case 0x0f56:
+ case 0x0f57:
+ case 0x0f58:
+ case 0x0f59:
+ case 0x0f5a:
+ case 0x0f5b:
+ case 0x0f5c:
+ case 0x0f5d:
+ case 0x0f5e:
+ case 0x0f5f:
+ case 0x0f60:
+ case 0x0f61:
+ case 0x0f62:
+ case 0x0f63:
+ case 0x0f64:
+ case 0x0f65:
+ case 0x0f66:
+ case 0x0f67:
+ case 0x0f68:
+ case 0x0f69:
+ case 0x0f6a:
+ case 0x0f6b:
+ case 0x0f6c:
+ case 0x0f6d:
+ case 0x0f6e:
+ case 0x0f6f:
+ case 0x0f70:
+ case 0x0f71:
+ case 0x0f72:
+ case 0x0f73:
+ case 0x0f74:
+ case 0x0f75:
+ case 0x0f76:
+ case 0x0f7c:
+ case 0x0f7d:
+ case 0x0f7e:
+ case 0x0f7f:
+ case 0x0fb8:
+ case 0x0fc2:
+ case 0x0fc4:
+ case 0x0fc5:
+ case 0x0fc6:
+ case 0x0fd0:
+ case 0x0fd1:
+ case 0x0fd2:
+ case 0x0fd3:
+ case 0x0fd4:
+ case 0x0fd5:
+ case 0x0fd6:
+ case 0x0fd7:
+ case 0x0fd8:
+ case 0x0fd9:
+ case 0x0fda:
+ case 0x0fdb:
+ case 0x0fdc:
+ case 0x0fdd:
+ case 0x0fde:
+ case 0x0fdf:
+ case 0x0fe0:
+ case 0x0fe1:
+ case 0x0fe2:
+ case 0x0fe3:
+ case 0x0fe4:
+ case 0x0fe5:
+ case 0x0fe6:
+ case 0x0fe7:
+ case 0x0fe8:
+ case 0x0fe9:
+ case 0x0fea:
+ case 0x0feb:
+ case 0x0fec:
+ case 0x0fed:
+ case 0x0fee:
+ case 0x0fef:
+ case 0x0ff0:
+ case 0x0ff1:
+ case 0x0ff2:
+ case 0x0ff3:
+ case 0x0ff4:
+ case 0x0ff5:
+ case 0x0ff6:
+ case 0x0ff7:
+ case 0x0ff8:
+ case 0x0ff9:
+ case 0x0ffa:
+ case 0x0ffb:
+ case 0x0ffc:
+ case 0x0ffd:
+ case 0x0ffe:
There's 114 lines that could be replaced by a single "if",
just by moving them into the default case block.
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-03-28 16:27 ` Hui Zhu
2010-03-29 1:35 ` Michael Snyder
2010-03-29 1:36 ` Michael Snyder
@ 2010-03-29 1:40 ` Michael Snyder
2010-03-29 2:23 ` Hui Zhu
2010-03-29 2:18 ` Michael Snyder
3 siblings, 1 reply; 39+ messages in thread
From: Michael Snyder @ 2010-03-29 1:40 UTC (permalink / raw)
To: Hui Zhu; +Cc: Joel Brobecker, gdb-patches ml
Hui Zhu wrote:
> Hello,
>
> I make a testsute for sse. I make it just support x86-64 target
> because I got insn unsupport trap in a x86-32 pc. Maybe the CPU of
> this pc is too old. :)
>
> And I found some bug in sse patch. I make a new one.
>
> Please help me review them. Thanks.
I also got a SIGILL here:
Program received signal SIGILL, Illegal instruction.
sse_test () at
/data/home/msnyder/cvs/localhost/src/gdb/testsuite/gdb.reverse/i386-sse-reverse.c:42^M
42 asm ("blendpd $1, %xmm1, %xmm0");
(gdb) FAIL: gdb.reverse/i386-sse-reverse.exp: continue to sse_test
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-03-28 16:27 ` Hui Zhu
` (2 preceding siblings ...)
2010-03-29 1:40 ` Michael Snyder
@ 2010-03-29 2:18 ` Michael Snyder
3 siblings, 0 replies; 39+ messages in thread
From: Michael Snyder @ 2010-03-29 2:18 UTC (permalink / raw)
To: Hui Zhu; +Cc: Joel Brobecker, gdb-patches ml
[-- Attachment #1: Type: text/plain, Size: 306 bytes --]
One more thing. ;-)
It's not good to have 20 or 30 tests that all report the same pass/fail
message, eg: "verify xmm0". It makes it hard to determine which one is
failing. Therefore we require that each test within a given test file
has a unique output.
Take a look at this and see if you like it:
[-- Attachment #2: i386-sse-reverse.exp --]
[-- Type: text/plain, Size: 22591 bytes --]
# Copyright 2009, 2010 Free Software Foundation, Inc.
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
# This file is part of the gdb testsuite.
#
# This test tests some i386 general instructions for reverse execution.
#
if ![target_info exists gdb,can_reverse] {
return
}
if $tracelevel {
strace $tracelevel
}
set prms_id 0
set bug_id 0
if ![istarget "*86*-*linux*"] then {
verbose "Skipping i386 reverse tests."
return
}
set testfile "i386-sse-reverse"
set srcfile ${testfile}.c
set binfile ${objdir}/${subdir}/${testfile}
# some targets have leading underscores on assembly symbols.
# TODO: detect this automatically
set additional_flags ""
if [istarget "i?86-*-cygwin*"] then {
set additional_flags "additional_flags=-DSYMBOL_PREFIX=\"_\""
}
if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable [list debug $additional_flags]] != "" } {
untested i386-sse-reverse
return -1
}
set end_of_main [gdb_get_line_number " end of main "]
set end_sse_test [gdb_get_line_number " end sse_test "]
# Get things started.
gdb_exit
gdb_start
gdb_reinitialize_dir $srcdir/$subdir
gdb_load ${binfile}
runto main
if [target_info exists gdb,use_precord] {
# Activate process record/replay
gdb_test "record" "" "Turn on process record"
# FIXME: command ought to acknowledge, so we can test if it succeeded.
}
global hex
global decimal
gdb_test "break $end_sse_test" \
"Breakpoint $decimal at .* line $end_sse_test\." \
"set breakpoint at end of sse_test"
gdb_test "continue" \
" end sse_test .*" \
"continue to end of sse_test"
gdb_test "reverse-step" "xorps.*" "reverse-step to xorps"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x7f7f7f007fff7fff7f7f7f007fff7fff.*" \
"verify xmm0 at end of sse_test"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x008000ff00000000008000ff00000000.*" \
"verify xmm1 at end of sse_test"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x7f7f7f007f7f7f007f7f7f007f7f7f00.*" \
"verify xmm2 at end of sse_test"
gdb_test "reverse-step" "xorpd.*" "reverse-step to xorpd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x7f7f7f007fff7fff7f7f7f007fff7fff.*" \
"verify xmm0 after reverse xorps"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
"verify xmm1 after reverse xorps"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x7f7f7f007f7f7f007f7f7f007f7f7f00.*" \
"verify xmm2 after reverse xorps"
gdb_test "reverse-step" "unpckhps.*" "reverse-step to unpckhps"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x7fff7fff7fff7fff0108200001400000.*" \
"verify xmm0 after reverse xorpd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
"verify xmm1 after reverse xorpd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x7f7f7f007f7f7f007f7f7f007f7f7f00.*" \
"verify xmm2 after reverse xorpd"
gdb_test "reverse-step" "unpckhpd.*" "reverse-step to unpckhpd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x010820000140000061107f0201800000.*" \
"verify xmm0 after reverse unpckhps"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
"verify xmm1 after reverse unpckhps"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x7f7f7f007f7f7f007f7f7f007f7f7f00.*" \
"verify xmm2 after reverse unpckhps"
gdb_test "reverse-step" "ucomiss.*" "reverse-step to ucomiss"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x010820000140000061107f0201800000.*" \
"verify xmm0 after reverse unpckhpd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
"verify xmm1 after reverse unpckhpd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x7f7f7f007f7f7f007f7f7f007f7f7f00.*" \
"verify xmm2 after reverse unpckhpd"
gdb_test "reverse-step" "ucomisd.*" "reverse-step to ucomisd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x010820000140000061107f0201800000.*" \
"verify xmm0 after reverse ucomiss"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
"verify xmm1 after reverse ucomiss"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x7f7f7f007f7f7f007f7f7f007f7f7f00.*" \
"verify xmm2 after reverse ucomiss"
gdb_test "reverse-step" "packssdw.*" "reverse-step to packssdw"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x010820000140000061107f0201800000.*" \
"verify xmm0 after reverse ucomisd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x010820000140000061107f0201800000.*" \
"verify xmm1 after reverse ucomisd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x7f7f7f007f7f7f007f7f7f007f7f7f00.*" \
"verify xmm2 after reverse ucomisd"
gdb_test "reverse-step" "packsswb.*" "reverse-step to packsswb"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x010820000140000061107f0201800000.*" \
"verify xmm0 after reverse packssdw"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x010820000140000061107f0201800000.*" \
"verify xmm1 after reverse packssdw"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x010820000140000061107f0201800000.*" \
"verify xmm2 after reverse packssdw"
gdb_test "reverse-step" "pabsd.*" "reverse-step to pabsd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0xfff02000ffc000008ff03ffeff800000.*" \
"verify xmm0 after reverse packsswb"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x010820000140000061107f0201800000.*" \
"verify xmm1 after reverse packsswb"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x010820000140000061107f0201800000.*" \
"verify xmm2 after reverse packsswb"
gdb_test "reverse-step" "pabsw.*" "reverse-step to pabsw"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0xfff02000ffc000008ff03ffeff800000.*" \
"verify xmm0 after reverse pabsd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0xfff82000ffc000009ff07ffeff800000.*" \
"verify xmm1 after reverse pabsd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x010820000140000061107f0201800000.*" \
"verify xmm2 after reverse pabsd"
gdb_test "reverse-step" "pabsb.*" "reverse-step to pabsb"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0xfff02000ffc000008ff03ffeff800000.*" \
"verify xmm0 after reverse pabsw"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0xfff82000ffc000009ff07ffeff800000.*" \
"verify xmm1 after reverse pabsw"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xfff00000ffc000008f402ffc80000000.*" \
"verify xmm2 after reverse pabsw"
gdb_test "reverse-step" "orps.*" "reverse-step to orps"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0xfff02000ffc000008ff03ffeff800000.*" \
"verify xmm0 after reverse pabsb"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0xfff80000ffc000001dd0505c79000000.*" \
"verify xmm1 after reverse pabsb"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xfff00000ffc000008f402ffc80000000.*" \
"verify xmm2 after reverse pabsb"
gdb_test "reverse-step" "orpd.*" "reverse-step to orpd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0xce802000000000000ef01ffeff800000.*" \
"verify xmm0 after reverse orps"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0xfff80000ffc000001dd0505c79000000.*" \
"verify xmm1 after reverse orps"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xfff00000ffc000008f402ffc80000000.*" \
"verify xmm2 after reverse orps"
gdb_test "reverse-step" "mulss.*" "reverse-step to mulss"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0xce802000000000000ef01ffefe811010.*" \
"verify xmm0 after reverse orpd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0xfff80000ffc000001dd0505c79000000.*" \
"verify xmm1 after reverse orpd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xfff00000ffc000008f402ffc80000000.*" \
"verify xmm2 after reverse orpd"
gdb_test "reverse-step" "mulsd.*" "reverse-step to mulsd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0xce802000000000000ef01ffefe811010.*" \
"verify xmm0 after reverse mulss"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0xfff80000ffc00000ce80200000000000.*" \
"verify xmm1 after reverse mulss"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xfff00000ffc000008f402ffc80000000.*" \
"verify xmm2 after reverse mulss"
gdb_test "reverse-step" "mulps.*" "reverse-step to mulps"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0xce802000000000000ef01ffefe811010.*" \
"verify xmm0 after reverse mulsd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0xfff80000ffc00000ce80200000000000.*" \
"verify xmm1 after reverse mulsd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xfff0000000000000005ffffe80000000.*" \
"verify xmm2 after reverse mulsd"
gdb_test "reverse-step" "mulpd.*" "reverse-step to mulpd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0xce802000000000000ef01ffefe811010.*" \
"verify xmm0 after reverse mulps"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0xfff00000ffc00000ff800000ff800000.*" \
"verify xmm1 after reverse mulps"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xfff0000000000000005ffffe80000000.*" \
"verify xmm2 after reverse mulps"
gdb_test "reverse-step" "divss.*" "reverse-step to divss"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0xce802000000000000ef01ffefe811010.*" \
"verify xmm0 after reverse mulpd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0xfff00000ffc00000ff800000ff800000.*" \
"verify xmm1 after reverse mulpd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xfff0000000000000005ffffe01001fe0.*" \
"verify xmm2 after reverse mulpd"
gdb_test "reverse-step" "divsd.*" "reverse-step to divsd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0xce80200000000000ce80200000000000.*" \
"verify xmm0 after reverse divss"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0xfff00000ffc00000ff800000ff800000.*" \
"verify xmm1 after reverse divss"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xfff0000000000000005ffffe01001fe0.*" \
"verify xmm2 after reverse divss"
gdb_test "reverse-step" "divps.*" "reverse-step to divps"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0xce80200000000000ce80200000000000.*" \
"verify xmm0 after reverse divsd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x0000000000000000ff800000ff800000.*" \
"verify xmm1 after reverse divsd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xfff0000000000000005ffffe01001fe0.*" \
"verify xmm2 after reverse divsd"
gdb_test "reverse-step" "divpd.*" "reverse-step to divpd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0xce80200000000000ce80200000000000.*" \
"verify xmm0 after reverse divps"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x0000000000000000ff800000ff800000.*" \
"verify xmm1 after reverse divps"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
"verify xmm2 after reverse divps"
gdb_test "reverse-step" "cvtpd2ps.*" "reverse-step to cvtpd2ps"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0xce80200000000000ce80200000000000.*" \
"verify xmm0 after reverse divpd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0xce80200000000000ce80200000000000.*" \
"verify xmm1 after reverse divpd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
"verify xmm2 after reverse divpd"
gdb_test "reverse-step" "cvtdq2ps.*" "reverse-step to cvtdq2ps"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x00000000000000008000000080000000.*" \
"verify xmm0 after reverse cvtpd2ps"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0xce80200000000000ce80200000000000.*" \
"verify xmm1 after reverse cvtpd2ps"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
"verify xmm2 after reverse cvtpd2ps"
gdb_test "reverse-step" "cvtpd2dq.*" "reverse-step to cvtpd2dq"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a090827262524ffffffff.*" \
"verify xmm0 after reverse cvtdq2ps"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0xce80200000000000ce80200000000000.*" \
"verify xmm1 after reverse cvtdq2ps"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
"verify xmm2 after reverse cvtdq2ps"
gdb_test "reverse-step" "cvtdq2ps.*" "reverse-step to cvtdq2ps"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a090827262524ffffffff.*" \
"verify xmm0 after reverse cvtpd2dq"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
"verify xmm1 after reverse cvtpd2dq"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
"verify xmm2 after reverse cvtpd2dq"
gdb_test "reverse-step" "cvtdq2pd.*" "reverse-step to cvtdq2pd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a090827262524ffffffff.*" \
"verify xmm0 after reverse cvtdq2ps"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
"verify xmm1 after reverse cvtdq2ps"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
"verify xmm2 after reverse cvtdq2ps"
gdb_test "reverse-step" "comiss.*" "reverse-step to comiss"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a090827262524ffffffff.*" \
"verify xmm0 after reverse cvtdq2pd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
"verify xmm1 after reverse cvtdq2pd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
"verify xmm2 after reverse cvtdq2pd"
gdb_test "reverse-step" "comisd.*" "reverse-step to comisd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a090827262524ffffffff.*" \
"verify xmm0 after reverse comiss"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
"verify xmm1 after reverse comiss"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
"verify xmm2 after reverse comiss"
gdb_test "reverse-step" "cmpss.*" "reverse-step to cmpss"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm0 after reverse comisd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
"verify xmm1 after reverse comisd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
"verify xmm2 after reverse comisd"
gdb_test "reverse-step" "cmpsd.*" "reverse-step to cmpsd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm0 after reverse cmpss"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x00000000000000000000000000000000.*" \
"verify xmm1 after reverse cmpss"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
"verify xmm2 after reverse cmpss"
gdb_test "reverse-step" "cmpps.*" "reverse-step to cmpps"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm0 after reverse cmpsd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x00000000000000000000000000000000.*" \
"verify xmm1 after reverse cmpsd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm2 after reverse cmpsd"
gdb_test "reverse-step" "cmppd.*" "reverse-step to cmppd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm0 after reverse cmpps"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm1 after reverse cmpps"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm2 after reverse cmpps"
gdb_test "reverse-step" "blendvps.*" "reverse-step to blendvps"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm0 after reverse cmppd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm1 after reverse cmppd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm2 after reverse cmppd"
gdb_test "reverse-step" "blendvpd.*" "reverse-step to blendvpd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm0 after reverse blendvps"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm1 after reverse blendvps"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm2 after reverse blendvps"
gdb_test "reverse-step" "blendps.*" "reverse-step to blendps"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm0 after reverse blendvpd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm1 after reverse blendvpd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm2 after reverse blendvpd"
gdb_test "reverse-step" "blendpd.*" "reverse-step to blendpd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
"verify xmm0 after reverse blendps"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm1 after reverse blendps"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm2 after reverse blendps"
gdb_test "reverse-step" "andps.*" "reverse-step to andps"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
"verify xmm0 after reverse blendpd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252400000000.*" \
"verify xmm1 after reverse blendpd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
"verify xmm2 after reverse blendpd"
gdb_test "reverse-step" "andpd.*" "reverse-step to andpd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
"verify xmm0 after reverse andps"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252400000000.*" \
"verify xmm1 after reverse andps"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
"verify xmm2 after reverse andps"
gdb_test "reverse-step" "addsubps.*" "reverse-step to addsubps"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
"verify xmm0 after reverse andpd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252423222120.*" \
"verify xmm1 after reverse andpd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
"verify xmm2 after reverse andpd"
gdb_test "reverse-step" "addsubpd.*" "reverse-step to addsubpd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
"verify xmm0 after reverse addsubps"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252423222120.*" \
"verify xmm1 after reverse addsubps"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
"verify xmm2 after reverse addsubps"
gdb_test "reverse-step" "addss.*" "reverse-step to addss"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
"verify xmm0 after reverse addsubpd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252423222120.*" \
"verify xmm1 after reverse addsubpd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
"verify xmm2 after reverse addsubpd"
gdb_test "reverse-step" "addsd.*" "reverse-step to addsd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
"verify xmm0 after reverse addss"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
"verify xmm1 after reverse addss"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
"verify xmm2 after reverse addss"
gdb_test "reverse-step" "addps.*" "reverse-step to addps"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
"verify xmm0 after reverse addsd"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
"verify xmm1 after reverse addsd"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
"verify xmm2 after reverse addsd"
gdb_test "reverse-step" "addpd.*" "reverse-step to addpd"
gdb_test "info register xmm0" \
"xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
"verify xmm0 after reverse addps"
gdb_test "info register xmm1" \
"xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
"verify xmm1 after reverse addps"
gdb_test "info register xmm2" \
"xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
"verify xmm2 after reverse addps"
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-03-29 1:40 ` Michael Snyder
@ 2010-03-29 2:23 ` Hui Zhu
2010-03-29 13:21 ` Hui Zhu
0 siblings, 1 reply; 39+ messages in thread
From: Hui Zhu @ 2010-03-29 2:23 UTC (permalink / raw)
To: Michael Snyder; +Cc: Joel Brobecker, gdb-patches ml
On Mon, Mar 29, 2010 at 09:40, Michael Snyder <msnyder@vmware.com> wrote:
> Hui Zhu wrote:
>>
>> Hello,
>>
>> I make a testsute for sse. I make it just support x86-64 target
>> because I got insn unsupport trap in a x86-32 pc. Maybe the CPU of
>> this pc is too old. :)
>>
>> And I found some bug in sse patch. I make a new one.
>>
>> Please help me review them. Thanks.
>
> I also got a SIGILL here:
>
> Program received signal SIGILL, Illegal instruction.
> sse_test () at
> /data/home/msnyder/cvs/localhost/src/gdb/testsuite/gdb.reverse/i386-sse-reverse.c:42^M
> 42 asm ("blendpd $1, %xmm1, %xmm0");
> (gdb) FAIL: gdb.reverse/i386-sse-reverse.exp: continue to sse_test
>
>
>
I got it in an PC too. Looks these CPUs donn't support SSE4. It
works OK in a new PC.
Do you think we need remove it?
Thanks,
Hui
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-03-29 1:36 ` Michael Snyder
@ 2010-03-29 9:25 ` Hui Zhu
0 siblings, 0 replies; 39+ messages in thread
From: Hui Zhu @ 2010-03-29 9:25 UTC (permalink / raw)
To: Michael Snyder; +Cc: Joel Brobecker, gdb-patches ml
On Mon, Mar 29, 2010 at 09:36, Michael Snyder <msnyder@vmware.com> wrote:
> Hui Zhu wrote:
>>
>> Hello,
>>
>> I make a testsute for sse. I make it just support x86-64 target
>> because I got insn unsupport trap in a x86-32 pc. Maybe the CPU of
>> this pc is too old. :)
>>
>> And I found some bug in sse patch. I make a new one.
>>
>> Please help me review them. Thanks.
>
> Two minor comments on the code:
>
>
> + case 0x0faa: /* rsm */
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM);
> + I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM);
> + break;
> +
> + case 0x0fae:
>
> Is there a comment for this case statement?
> Maybe it doesn't need one, but most of the others have one...
fxsave fxrstor ldmxcsr stmxcsr lfence mfence sfence clflush
They looks don't have family name. And put this line to there will
make this line bigger than 80. So...
>
> + /* Add prefix to opcode. */
> + case 0x0f10:
> + case 0x0f11:
> + case 0x0f12:
> + case 0x0f13:
> + case 0x0f14:
> + case 0x0f15:
> + case 0x0f16:
> + case 0x0f17:
> + case 0x0f28:
> + case 0x0f29:
> + case 0x0f2a:
> + case 0x0f2b:
> + case 0x0f2c:
> + case 0x0f2d:
> + case 0x0f2e:
> + case 0x0f2f:
> + case 0x0f38:
> + case 0x0f39:
> + case 0x0f3a:
> + case 0x0f50:
> + case 0x0f51:
> + case 0x0f52:
> + case 0x0f53:
> + case 0x0f54:
> + case 0x0f55:
> + case 0x0f56:
> + case 0x0f57:
> + case 0x0f58:
> + case 0x0f59:
> + case 0x0f5a:
> + case 0x0f5b:
> + case 0x0f5c:
> + case 0x0f5d:
> + case 0x0f5e:
> + case 0x0f5f:
> + case 0x0f60:
> + case 0x0f61:
> + case 0x0f62:
> + case 0x0f63:
> + case 0x0f64:
> + case 0x0f65:
> + case 0x0f66:
> + case 0x0f67:
> + case 0x0f68:
> + case 0x0f69:
> + case 0x0f6a:
> + case 0x0f6b:
> + case 0x0f6c:
> + case 0x0f6d:
> + case 0x0f6e:
> + case 0x0f6f:
> + case 0x0f70:
> + case 0x0f71:
> + case 0x0f72:
> + case 0x0f73:
> + case 0x0f74:
> + case 0x0f75:
> + case 0x0f76:
> + case 0x0f7c:
> + case 0x0f7d:
> + case 0x0f7e:
> + case 0x0f7f:
> + case 0x0fb8:
> + case 0x0fc2:
> + case 0x0fc4:
> + case 0x0fc5:
> + case 0x0fc6:
> + case 0x0fd0:
> + case 0x0fd1:
> + case 0x0fd2:
> + case 0x0fd3:
> + case 0x0fd4:
> + case 0x0fd5:
> + case 0x0fd6:
> + case 0x0fd7:
> + case 0x0fd8:
> + case 0x0fd9:
> + case 0x0fda:
> + case 0x0fdb:
> + case 0x0fdc:
> + case 0x0fdd:
> + case 0x0fde:
> + case 0x0fdf:
> + case 0x0fe0:
> + case 0x0fe1:
> + case 0x0fe2:
> + case 0x0fe3:
> + case 0x0fe4:
> + case 0x0fe5:
> + case 0x0fe6:
> + case 0x0fe7:
> + case 0x0fe8:
> + case 0x0fe9:
> + case 0x0fea:
> + case 0x0feb:
> + case 0x0fec:
> + case 0x0fed:
> + case 0x0fee:
> + case 0x0fef:
> + case 0x0ff0:
> + case 0x0ff1:
> + case 0x0ff2:
> + case 0x0ff3:
> + case 0x0ff4:
> + case 0x0ff5:
> + case 0x0ff6:
> + case 0x0ff7:
> + case 0x0ff8:
> + case 0x0ff9:
> + case 0x0ffa:
> + case 0x0ffb:
> + case 0x0ffc:
> + case 0x0ffd:
> + case 0x0ffe:
>
> There's 114 lines that could be replaced by a single "if",
> just by moving them into the default case block.
>
>
>
>
0x0f10 ... 0x0f2f
0x0f38 ... 0x0f3a
0x0f50 ... 0x0f76
0x0f7c ... 0x0f7f
0x0fb8
0x0fc2
0x0fc4 ... 0x0fc6
0x0fd0 ... 0x0ffe
Looks single "if" cannot handle it.
I suggest let compiler to do this optimization job.
Thanks,
Hui
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-03-29 2:23 ` Hui Zhu
@ 2010-03-29 13:21 ` Hui Zhu
2010-03-29 17:52 ` Michael Snyder
2010-03-29 18:11 ` Michael Snyder
0 siblings, 2 replies; 39+ messages in thread
From: Hui Zhu @ 2010-03-29 13:21 UTC (permalink / raw)
To: Michael Snyder; +Cc: Joel Brobecker, gdb-patches ml
[-- Attachment #1: Type: text/plain, Size: 1355 bytes --]
Hi Michael,
I make a new testsuite that can support sse and sse4 better.
When the pc doesn't support sse4 insn, the test will skip the sse4 insn test.
Please help me review it.
Thanks,
Hui
2010-03-29 Hui Zhu <teawater@gmail.com>
Michael Snyder <msnyder@vmware.com>
* gdb.reverse/i386-sse-reverse.exp: New file.
* gdb.reverse/i386-sse-reverse.c: New file.
On Mon, Mar 29, 2010 at 10:22, Hui Zhu <teawater@gmail.com> wrote:
> On Mon, Mar 29, 2010 at 09:40, Michael Snyder <msnyder@vmware.com> wrote:
>> Hui Zhu wrote:
>>>
>>> Hello,
>>>
>>> I make a testsute for sse. I make it just support x86-64 target
>>> because I got insn unsupport trap in a x86-32 pc. Maybe the CPU of
>>> this pc is too old. :)
>>>
>>> And I found some bug in sse patch. I make a new one.
>>>
>>> Please help me review them. Thanks.
>>
>> I also got a SIGILL here:
>>
>> Program received signal SIGILL, Illegal instruction.
>> sse_test () at
>> /data/home/msnyder/cvs/localhost/src/gdb/testsuite/gdb.reverse/i386-sse-reverse.c:42^M
>> 42 asm ("blendpd $1, %xmm1, %xmm0");
>> (gdb) FAIL: gdb.reverse/i386-sse-reverse.exp: continue to sse_test
>>
>>
>>
> I got it in an PC too. Looks these CPUs donn't support SSE4. It
> works OK in a new PC.
>
> Do you think we need remove it?
>
> Thanks,
> Hui
>
[-- Attachment #2: prec-x86-sse-test.txt --]
[-- Type: text/plain, Size: 26856 bytes --]
---
testsuite/gdb.reverse/i386-sse-reverse.c | 101 ++++
testsuite/gdb.reverse/i386-sse-reverse.exp | 705 +++++++++++++++++++++++++++++
2 files changed, 806 insertions(+)
--- /dev/null
+++ b/testsuite/gdb.reverse/i386-sse-reverse.c
@@ -0,0 +1,101 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+ Copyright 2009, 2010 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+/* Architecture tests for intel i386 platform. */
+
+void
+sse_test (void)
+{
+ char buf0[] = {0, 1, 2, 3, 4, 5, 6, 7, 8,
+ 9, 10, 11, 12, 13, 14, 15};
+ char buf1[] = {16, 17, 18, 19, 20, 21, 22, 23,
+ 24, 25, 26, 27, 28, 29, 30, 31};
+ char buf2[] = {32, 33, 34, 35, 36, 37, 38, 39,
+ 40, 41, 42, 43, 44, 45, 46, 47};
+
+ asm ("movupd %0, %%xmm0":"=m"(buf0));
+ asm ("movupd %0, %%xmm1":"=m"(buf1));
+ asm ("movupd %0, %%xmm2":"=m"(buf2));
+
+ asm ("addpd %xmm0, %xmm1");
+ asm ("addps %xmm1, %xmm2");
+ asm ("addsd %xmm2, %xmm1");
+ asm ("addss %xmm1, %xmm0");
+ asm ("addsubpd %xmm0, %xmm2");
+ asm ("addsubps %xmm0, %xmm1");
+ asm ("andpd %xmm1, %xmm2");
+ asm ("andps %xmm2, %xmm1");
+ asm ("cmppd $3, %xmm0, %xmm1");
+ asm ("cmpps $4, %xmm1, %xmm2");
+ asm ("cmpsd $5, %xmm2, %xmm1");
+ asm ("cmpss $6, %xmm1, %xmm0");
+ asm ("comisd %xmm0, %xmm2");
+ asm ("comiss %xmm0, %xmm1");
+ asm ("cvtdq2pd %xmm1, %xmm2");
+ asm ("cvtdq2ps %xmm2, %xmm1");
+ asm ("cvtpd2dq %xmm1, %xmm0");
+ asm ("cvtpd2ps %xmm0, %xmm1");
+ asm ("divpd %xmm1, %xmm2");
+ asm ("divps %xmm2, %xmm1");
+ asm ("divsd %xmm1, %xmm0");
+ asm ("divss %xmm0, %xmm2");
+ asm ("mulpd %xmm0, %xmm1");
+ asm ("mulps %xmm1, %xmm2");
+ asm ("mulsd %xmm2, %xmm1");
+ asm ("mulss %xmm1, %xmm0");
+ asm ("orpd %xmm2, %xmm0");
+ asm ("orps %xmm0, %xmm1");
+ asm ("pabsb %xmm1, %xmm2");
+ asm ("pabsw %xmm2, %xmm1");
+ asm ("pabsd %xmm1, %xmm0");
+ asm ("packsswb %xmm0, %xmm2");
+ asm ("packssdw %xmm0, %xmm1");
+ asm ("ucomisd %xmm1, %xmm2");
+ asm ("ucomiss %xmm2, %xmm1");
+ asm ("unpckhpd %xmm1, %xmm0");
+ asm ("unpckhps %xmm2, %xmm0");
+ asm ("xorpd %xmm0, %xmm1");
+ asm ("xorps %xmm1, %xmm2");
+} /* end sse_test */
+
+void
+sse4_test (void)
+{
+ char buf0[] = {0, 1, 2, 3, 4, 5, 6, 7, 8,
+ 9, 10, 11, 12, 13, 14, 15};
+ char buf1[] = {16, 17, 18, 19, 20, 21, 22, 23,
+ 24, 25, 26, 27, 28, 29, 30, 31};
+ char buf2[] = {32, 33, 34, 35, 36, 37, 38, 39,
+ 40, 41, 42, 43, 44, 45, 46, 47};
+
+ asm ("movupd %0, %%xmm0":"=m"(buf0));
+ asm ("movupd %0, %%xmm1":"=m"(buf1));
+ asm ("movupd %0, %%xmm2":"=m"(buf2));
+
+ asm ("blendpd $1, %xmm1, %xmm0");
+ asm ("blendps $2, %xmm2, %xmm0");
+ asm ("blendvpd %xmm1, %xmm2");
+ asm ("blendvps %xmm2, %xmm1");
+} /* end sse4_test */
+
+int
+main ()
+{
+ sse_test ();
+ sse4_test ();
+ return 0; /* end of main */
+}
--- /dev/null
+++ b/testsuite/gdb.reverse/i386-sse-reverse.exp
@@ -0,0 +1,705 @@
+# Copyright 2009, 2010 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+#
+# This test tests some i386 general instructions for reverse execution.
+#
+
+if ![target_info exists gdb,can_reverse] {
+ return
+}
+
+if $tracelevel {
+ strace $tracelevel
+}
+
+set prms_id 0
+set bug_id 0
+
+if ![istarget "*86*-*linux*"] then {
+ verbose "Skipping i386 reverse tests."
+ return
+}
+
+set testfile "i386-sse-reverse"
+set srcfile ${testfile}.c
+set binfile ${objdir}/${subdir}/${testfile}
+
+# some targets have leading underscores on assembly symbols.
+# TODO: detect this automatically
+set additional_flags ""
+if [istarget "i?86-*-cygwin*"] then {
+ set additional_flags "additional_flags=-DSYMBOL_PREFIX=\"_\""
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable [list debug $additional_flags]] != "" } {
+ untested i386-sse-reverse
+ return -1
+}
+
+set end_of_main [gdb_get_line_number " end of main "]
+set end_sse_test [gdb_get_line_number " end sse_test "]
+set end_sse4_test [gdb_get_line_number " end sse4_test "]
+
+# Get things started.
+
+gdb_exit
+gdb_start
+gdb_reinitialize_dir $srcdir/$subdir
+gdb_load ${binfile}
+runto main
+
+if [target_info exists gdb,use_precord] {
+ # Activate process record/replay
+ gdb_test "record" "" "Turn on process record"
+ # FIXME: command ought to acknowledge, so we can test if it succeeded.
+}
+
+global hex
+global decimal
+
+#sse_test
+
+gdb_test "break $end_sse_test" \
+ "Breakpoint $decimal at .* line $end_sse_test\." \
+ "set breakpoint at end of sse_test"
+
+gdb_test "continue" \
+ " end sse_test .*" \
+ "continue to end of sse_test"
+
+gdb_test "reverse-step" "xorps.*" "reverse-step to xorps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x7f007f007fff7fff7f007f007fff7fff.*" \
+ "verify xmm0 at end of sse_test"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x00ff00ff0000000000ff00ff00000000.*" \
+ "verify xmm1 at end of sse_test"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f007f007f007f007f007f007f007f00.*" \
+ "verify xmm2 at end of sse_test"
+
+gdb_test "reverse-step" "xorpd.*" "reverse-step to xorpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x7f007f007fff7fff7f007f007fff7fff.*" \
+ "verify xmm0 after reverse xorps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
+ "verify xmm1 after reverse xorps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f007f007f007f007f007f007f007f00.*" \
+ "verify xmm2 after reverse xorps"
+
+gdb_test "reverse-step" "unpckhps.*" "reverse-step to unpckhps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x7fff7fff7fff7fff0108000001400000.*" \
+ "verify xmm0 after reverse xorpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
+ "verify xmm1 after reverse xorpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f007f007f007f007f007f007f007f00.*" \
+ "verify xmm2 after reverse xorpd"
+
+gdb_test "reverse-step" "unpckhpd.*" "reverse-step to unpckhpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm0 after reverse unpckhps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
+ "verify xmm1 after reverse unpckhps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f007f007f007f007f007f007f007f00.*" \
+ "verify xmm2 after reverse unpckhps"
+
+gdb_test "reverse-step" "ucomiss.*" "reverse-step to ucomiss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm0 after reverse unpckhpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
+ "verify xmm1 after reverse unpckhpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f007f007f007f007f007f007f007f00.*" \
+ "verify xmm2 after reverse unpckhpd"
+
+gdb_test "reverse-step" "ucomisd.*" "reverse-step to ucomisd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm0 after reverse ucomiss"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
+ "verify xmm1 after reverse ucomiss"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f007f007f007f007f007f007f007f00.*" \
+ "verify xmm2 after reverse ucomiss"
+
+gdb_test "reverse-step" "packssdw.*" "reverse-step to packssdw"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm0 after reverse ucomisd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm1 after reverse ucomisd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f007f007f007f007f007f007f007f00.*" \
+ "verify xmm2 after reverse ucomisd"
+
+gdb_test "reverse-step" "packsswb.*" "reverse-step to packsswb"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm0 after reverse packssdw"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm1 after reverse packssdw"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm2 after reverse packssdw"
+
+gdb_test "reverse-step" "pabsd.*" "reverse-step to pabsd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xfff00000ffc00000fff80000ffc00000.*" \
+ "verify xmm0 after reverse packsswb"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm1 after reverse packsswb"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm2 after reverse packsswb"
+
+gdb_test "reverse-step" "pabsw.*" "reverse-step to pabsw"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xfff00000ffc00000fff80000ffc00000.*" \
+ "verify xmm0 after reverse pabsd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000fff80000ffc00000.*" \
+ "verify xmm1 after reverse pabsd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm2 after reverse pabsd"
+
+gdb_test "reverse-step" "pabsb.*" "reverse-step to pabsb"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xfff00000ffc00000fff80000ffc00000.*" \
+ "verify xmm0 after reverse pabsw"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000fff80000ffc00000.*" \
+ "verify xmm1 after reverse pabsw"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm2 after reverse pabsw"
+
+gdb_test "reverse-step" "orps.*" "reverse-step to orps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xfff00000ffc00000fff80000ffc00000.*" \
+ "verify xmm0 after reverse pabsb"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000fff80000ffc00000.*" \
+ "verify xmm1 after reverse pabsb"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm2 after reverse pabsb"
+
+gdb_test "reverse-step" "orpd.*" "reverse-step to orpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0000000000000000fff80000ffc00000.*" \
+ "verify xmm0 after reverse orps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000fff80000ffc00000.*" \
+ "verify xmm1 after reverse orps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm2 after reverse orps"
+
+gdb_test "reverse-step" "mulss.*" "reverse-step to mulss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0000000000000000fff80000ffc00000.*" \
+ "verify xmm0 after reverse orpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000fff80000ffc00000.*" \
+ "verify xmm1 after reverse orpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm2 after reverse orpd"
+
+gdb_test "reverse-step" "mulsd.*" "reverse-step to mulsd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0000000000000000fff80000ffc00000.*" \
+ "verify xmm0 after reverse mulss"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000fff80000ffc00000.*" \
+ "verify xmm1 after reverse mulss"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm2 after reverse mulss"
+
+gdb_test "reverse-step" "mulps.*" "reverse-step to mulps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0000000000000000fff80000ffc00000.*" \
+ "verify xmm0 after reverse mulsd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000fff80000ffc00000.*" \
+ "verify xmm1 after reverse mulsd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff0000000000000fff00000ffc00000.*" \
+ "verify xmm2 after reverse mulsd"
+
+gdb_test "reverse-step" "mulpd.*" "reverse-step to mulpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0000000000000000fff80000ffc00000.*" \
+ "verify xmm0 after reverse mulps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm1 after reverse mulps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff0000000000000fff00000ffc00000.*" \
+ "verify xmm2 after reverse mulps"
+
+gdb_test "reverse-step" "divss.*" "reverse-step to divss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0000000000000000fff80000ffc00000.*" \
+ "verify xmm0 after reverse mulpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm1 after reverse mulpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff0000000000000fff0000000000000.*" \
+ "verify xmm2 after reverse mulpd"
+
+gdb_test "reverse-step" "divsd.*" "reverse-step to divsd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x00000000000000008000000080000000.*" \
+ "verify xmm0 after reverse divss"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm1 after reverse divss"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff0000000000000fff0000000000000.*" \
+ "verify xmm2 after reverse divss"
+
+gdb_test "reverse-step" "divps.*" "reverse-step to divps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x00000000000000008000000080000000.*" \
+ "verify xmm0 after reverse divsd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x00000000000000000000000080000000.*" \
+ "verify xmm1 after reverse divsd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff0000000000000fff0000000000000.*" \
+ "verify xmm2 after reverse divsd"
+
+gdb_test "reverse-step" "divpd.*" "reverse-step to divpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x00000000000000008000000080000000.*" \
+ "verify xmm0 after reverse divps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x00000000000000000000000080000000.*" \
+ "verify xmm1 after reverse divps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
+ "verify xmm2 after reverse divps"
+
+gdb_test "reverse-step" "cvtpd2ps.*" "reverse-step to cvtpd2ps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x00000000000000008000000080000000.*" \
+ "verify xmm0 after reverse divpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xce80200000000000ce80200000000000.*" \
+ "verify xmm1 after reverse divpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
+ "verify xmm2 after reverse divpd"
+
+gdb_test "reverse-step" "cvtpd2dq.*" "reverse-step to cvtpd2dq"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a090807060504ffffffff.*" \
+ "verify xmm0 after reverse cvtpd2ps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xce80200000000000ce80200000000000.*" \
+ "verify xmm1 after reverse cvtpd2ps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
+ "verify xmm2 after reverse cvtpd2ps"
+
+gdb_test "reverse-step" "cvtdq2ps.*" "reverse-step to cvtdq2ps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a090807060504ffffffff.*" \
+ "verify xmm0 after reverse cvtpd2dq"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
+ "verify xmm1 after reverse cvtpd2dq"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
+ "verify xmm2 after reverse cvtpd2dq"
+
+gdb_test "reverse-step" "cvtdq2pd.*" "reverse-step to cvtdq2pd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a090807060504ffffffff.*" \
+ "verify xmm0 after reverse cvtdq2ps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
+ "verify xmm1 after reverse cvtdq2ps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
+ "verify xmm2 after reverse cvtdq2ps"
+
+gdb_test "reverse-step" "comiss.*" "reverse-step to comiss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a090807060504ffffffff.*" \
+ "verify xmm0 after reverse cvtdq2pd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
+ "verify xmm1 after reverse cvtdq2pd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
+ "verify xmm2 after reverse cvtdq2pd"
+
+gdb_test "reverse-step" "comisd.*" "reverse-step to comisd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a090807060504ffffffff.*" \
+ "verify xmm0 after reverse comiss"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
+ "verify xmm1 after reverse comiss"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
+ "verify xmm2 after reverse comiss"
+
+gdb_test "reverse-step" "cmpss.*" "reverse-step to cmpss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse comisd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
+ "verify xmm1 after reverse comisd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
+ "verify xmm2 after reverse comisd"
+
+gdb_test "reverse-step" "cmpsd.*" "reverse-step to cmpsd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse cmpss"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x00000000000000000000000000000000.*" \
+ "verify xmm1 after reverse cmpss"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
+ "verify xmm2 after reverse cmpss"
+
+gdb_test "reverse-step" "cmpps.*" "reverse-step to cmpps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse cmpsd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x00000000000000000000000000000000.*" \
+ "verify xmm1 after reverse cmpsd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm2 after reverse cmpsd"
+
+gdb_test "reverse-step" "cmppd.*" "reverse-step to cmppd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse cmpps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm1 after reverse cmpps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm2 after reverse cmpps"
+
+gdb_test "reverse-step" "andps.*" "reverse-step to andps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse cmppd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252400000000.*" \
+ "verify xmm1 after reverse cmppd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm2 after reverse cmppd"
+
+gdb_test "reverse-step" "andpd.*" "reverse-step to andpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse andps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252400000000.*" \
+ "verify xmm1 after reverse andps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse andps"
+
+gdb_test "reverse-step" "addsubps.*" "reverse-step to addsubps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse andpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252423222120.*" \
+ "verify xmm1 after reverse andpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse andpd"
+
+gdb_test "reverse-step" "addsubpd.*" "reverse-step to addsubpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse addsubps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252423222120.*" \
+ "verify xmm1 after reverse addsubps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse addsubps"
+
+gdb_test "reverse-step" "addss.*" "reverse-step to addss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
+ "verify xmm0 after reverse addsubpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252423222120.*" \
+ "verify xmm1 after reverse addsubpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse addsubpd"
+
+gdb_test "reverse-step" "addsd.*" "reverse-step to addsd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
+ "verify xmm0 after reverse addss"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1 after reverse addss"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse addss"
+
+gdb_test "reverse-step" "addps.*" "reverse-step to addps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
+ "verify xmm0 after reverse addsd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1 after reverse addsd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse addsd"
+
+gdb_test "reverse-step" "addpd.*" "reverse-step to addpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
+ "verify xmm0 after reverse addps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1 after reverse addps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse addps"
+
+
+#sse4_test
+
+send_gdb "continue\n"
+
+gdb_test "break $end_sse4_test" \
+ "Breakpoint $decimal at .* line $end_sse4_test\." \
+ "set breakpoint at end of sse4_test"
+
+send_gdb "continue\n"
+gdb_expect {
+ -re " end sse4_test .*" {
+ pass "continue to end of sse4_test"
+ }
+ -re " Illegal instruction.*" {
+ untested i386-sse4-reverse
+ return -1
+ }
+}
+
+gdb_test "reverse-step" "blendvps.*" "reverse-step to blendvps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252413121110.*" \
+ "verify xmm0 at end of sse4_test"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1 at end of sse4_test"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 at end of sse4_test"
+
+gdb_test "reverse-step" "blendvpd.*" "reverse-step to blendvpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252413121110.*" \
+ "verify xmm0 after reverse blendvps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1 after reverse blendvps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse blendvps"
+
+gdb_test "reverse-step" "blendps.*" "reverse-step to blendps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09081716151413121110.*" \
+ "verify xmm0 after reverse blendvpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1 after reverse blendvpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse blendvpd"
+
+gdb_test "reverse-step" "blendpd.*" "reverse-step to blendpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
+ "verify xmm0 after reverse blendps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1 after reverse blendps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse blendps"
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-03-29 13:21 ` Hui Zhu
@ 2010-03-29 17:52 ` Michael Snyder
2010-03-29 18:11 ` Michael Snyder
1 sibling, 0 replies; 39+ messages in thread
From: Michael Snyder @ 2010-03-29 17:52 UTC (permalink / raw)
To: Hui Zhu; +Cc: Joel Brobecker, gdb-patches ml
Hui Zhu wrote:
> Hi Michael,
>
> I make a new testsuite that can support sse and sse4 better.
>
> When the pc doesn't support sse4 insn, the test will skip the sse4 insn test.
>
> Please help me review it.
This is an improvement!
However, the test still does not run on my system.
It fails during compile / assembly.
You'll need some sort of ifdef to handle this, unles you
just want to omit the two problem instructions.
gdb compile failed, /tmp/cckGM64c.s: Assembler messages:
/tmp/cckGM64c.s:234: Error: suffix or operands invalid for `blendvpd'
/tmp/cckGM64c.s:236: Error: suffix or operands invalid for `blendvps'
Running
/data/home/msnyder/cvs/localhost/src/gdb/testsuite/gdb.reverse/sse1/i386-sse-reverse.exp
...
gdb compile failed, /usr/bin/ld: cannot open output file
/data/home/msnyder/builds/native/src/gdb/testsuite/gdb.reverse/sse1/i386-sse-reverse:
No such file or directory
collect2: ld returned 1 exit status
=== gdb Summary ===
# of untested testcases 2
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-03-29 13:21 ` Hui Zhu
2010-03-29 17:52 ` Michael Snyder
@ 2010-03-29 18:11 ` Michael Snyder
2010-03-30 6:29 ` Hui Zhu
1 sibling, 1 reply; 39+ messages in thread
From: Michael Snyder @ 2010-03-29 18:11 UTC (permalink / raw)
To: Hui Zhu; +Cc: Joel Brobecker, gdb-patches ml
[-- Attachment #1: Type: text/plain, Size: 375 bytes --]
Hui Zhu wrote:
> Hi Michael,
>
> I make a new testsuite that can support sse and sse4 better.
>
> When the pc doesn't support sse4 insn, the test will skip the sse4 insn test.
>
> Please help me review it.
Hui,
I found out that older versions of GAS require three arguments for
blendvps and blendvpd -- and the first argument must be %xmm0.
Try this on your machine:
[-- Attachment #2: i386-sse-reverse.c --]
[-- Type: text/x-csrc, Size: 3172 bytes --]
/* This testcase is part of GDB, the GNU debugger.
Copyright 2009, 2010 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
/* Architecture tests for intel i386 platform. */
void
sse_test (void)
{
char buf0[] = {0, 1, 2, 3, 4, 5, 6, 7, 8,
9, 10, 11, 12, 13, 14, 15};
char buf1[] = {16, 17, 18, 19, 20, 21, 22, 23,
24, 25, 26, 27, 28, 29, 30, 31};
char buf2[] = {32, 33, 34, 35, 36, 37, 38, 39,
40, 41, 42, 43, 44, 45, 46, 47};
asm ("movupd %0, %%xmm0":"=m"(buf0));
asm ("movupd %0, %%xmm1":"=m"(buf1));
asm ("movupd %0, %%xmm2":"=m"(buf2));
asm ("addpd %xmm0, %xmm1");
asm ("addps %xmm1, %xmm2");
asm ("addsd %xmm2, %xmm1");
asm ("addss %xmm1, %xmm0");
asm ("addsubpd %xmm0, %xmm2");
asm ("addsubps %xmm0, %xmm1");
asm ("andpd %xmm1, %xmm2");
asm ("andps %xmm2, %xmm1");
asm ("cmppd $3, %xmm0, %xmm1");
asm ("cmpps $4, %xmm1, %xmm2");
asm ("cmpsd $5, %xmm2, %xmm1");
asm ("cmpss $6, %xmm1, %xmm0");
asm ("comisd %xmm0, %xmm2");
asm ("comiss %xmm0, %xmm1");
asm ("cvtdq2pd %xmm1, %xmm2");
asm ("cvtdq2ps %xmm2, %xmm1");
asm ("cvtpd2dq %xmm1, %xmm0");
asm ("cvtpd2ps %xmm0, %xmm1");
asm ("divpd %xmm1, %xmm2");
asm ("divps %xmm2, %xmm1");
asm ("divsd %xmm1, %xmm0");
asm ("divss %xmm0, %xmm2");
asm ("mulpd %xmm0, %xmm1");
asm ("mulps %xmm1, %xmm2");
asm ("mulsd %xmm2, %xmm1");
asm ("mulss %xmm1, %xmm0");
asm ("orpd %xmm2, %xmm0");
asm ("orps %xmm0, %xmm1");
asm ("pabsb %xmm1, %xmm2");
asm ("pabsw %xmm2, %xmm1");
asm ("pabsd %xmm1, %xmm0");
asm ("packsswb %xmm0, %xmm2");
asm ("packssdw %xmm0, %xmm1");
asm ("ucomisd %xmm1, %xmm2");
asm ("ucomiss %xmm2, %xmm1");
asm ("unpckhpd %xmm1, %xmm0");
asm ("unpckhps %xmm2, %xmm0");
asm ("xorpd %xmm0, %xmm1");
asm ("xorps %xmm1, %xmm2");
} /* end sse_test */
void
sse4_test (void)
{
char buf0[] = {0, 1, 2, 3, 4, 5, 6, 7, 8,
9, 10, 11, 12, 13, 14, 15};
char buf1[] = {16, 17, 18, 19, 20, 21, 22, 23,
24, 25, 26, 27, 28, 29, 30, 31};
char buf2[] = {32, 33, 34, 35, 36, 37, 38, 39,
40, 41, 42, 43, 44, 45, 46, 47};
asm ("movupd %0, %%xmm0":"=m"(buf0));
asm ("movupd %0, %%xmm1":"=m"(buf1));
asm ("movupd %0, %%xmm2":"=m"(buf2));
asm ("blendpd $1, %xmm1, %xmm0");
asm ("blendps $2, %xmm2, %xmm0");
asm ("blendvpd %xmm0, %xmm1, %xmm2");
asm ("blendvps %xmm0, %xmm2, %xmm1");
} /* end sse4_test */
int
main ()
{
sse_test ();
sse4_test ();
return 0; /* end of main */
}
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-03-29 18:11 ` Michael Snyder
@ 2010-03-30 6:29 ` Hui Zhu
2010-03-30 12:55 ` Hui Zhu
0 siblings, 1 reply; 39+ messages in thread
From: Hui Zhu @ 2010-03-30 6:29 UTC (permalink / raw)
To: Michael Snyder; +Cc: Joel Brobecker, gdb-patches ml
On Tue, Mar 30, 2010 at 02:11, Michael Snyder <msnyder@vmware.com> wrote:
> Hui Zhu wrote:
>>
>> Hi Michael,
>>
>> I make a new testsuite that can support sse and sse4 better.
>>
>> When the pc doesn't support sse4 insn, the test will skip the sse4 insn
>> test.
>>
>> Please help me review it.
>
> Hui,
>
> I found out that older versions of GAS require three arguments for blendvps
> and blendvpd -- and the first argument must be %xmm0.
>
> Try this on your machine:
>
>
Thanks Michael.
I think it must because the version of as that we use is different.
I will try it when I can use my PC that support sse4 insn.
Best regards,
Hui
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-03-30 6:29 ` Hui Zhu
@ 2010-03-30 12:55 ` Hui Zhu
2010-04-01 15:36 ` Hui Zhu
0 siblings, 1 reply; 39+ messages in thread
From: Hui Zhu @ 2010-03-30 12:55 UTC (permalink / raw)
To: Michael Snyder; +Cc: Joel Brobecker, gdb-patches ml
[-- Attachment #1: Type: text/plain, Size: 1076 bytes --]
On Tue, Mar 30, 2010 at 14:29, Hui Zhu <teawater@gmail.com> wrote:
> On Tue, Mar 30, 2010 at 02:11, Michael Snyder <msnyder@vmware.com> wrote:
>> Hui Zhu wrote:
>>>
>>> Hi Michael,
>>>
>>> I make a new testsuite that can support sse and sse4 better.
>>>
>>> When the pc doesn't support sse4 insn, the test will skip the sse4 insn
>>> test.
>>>
>>> Please help me review it.
>>
>> Hui,
>>
>> I found out that older versions of GAS require three arguments for blendvps
>> and blendvpd -- and the first argument must be %xmm0.
>>
>> Try this on your machine:
>>
>>
> Thanks Michael.
>
> I think it must because the version of as that we use is different.
> I will try it when I can use my PC that support sse4 insn.
>
> Best regards,
> Hui
>
Hi Michael,
I try this file in the PC that support sse4, it works OK.
I make a new patch include this change. Please help me review it.
Thanks,
Hui
2010-03-30 Hui Zhu <teawater@gmail.com>
Michael Snyder <msnyder@vmware.com>
* gdb.reverse/i386-sse-reverse.exp: New file.
* gdb.reverse/i386-sse-reverse.c: New file.
[-- Attachment #2: prec-x86-sse-test.txt --]
[-- Type: text/plain, Size: 26870 bytes --]
---
testsuite/gdb.reverse/i386-sse-reverse.c | 101 ++++
testsuite/gdb.reverse/i386-sse-reverse.exp | 705 +++++++++++++++++++++++++++++
2 files changed, 806 insertions(+)
--- /dev/null
+++ b/testsuite/gdb.reverse/i386-sse-reverse.c
@@ -0,0 +1,101 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+ Copyright 2009, 2010 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+/* Architecture tests for intel i386 platform. */
+
+void
+sse_test (void)
+{
+ char buf0[] = {0, 1, 2, 3, 4, 5, 6, 7, 8,
+ 9, 10, 11, 12, 13, 14, 15};
+ char buf1[] = {16, 17, 18, 19, 20, 21, 22, 23,
+ 24, 25, 26, 27, 28, 29, 30, 31};
+ char buf2[] = {32, 33, 34, 35, 36, 37, 38, 39,
+ 40, 41, 42, 43, 44, 45, 46, 47};
+
+ asm ("movupd %0, %%xmm0":"=m"(buf0));
+ asm ("movupd %0, %%xmm1":"=m"(buf1));
+ asm ("movupd %0, %%xmm2":"=m"(buf2));
+
+ asm ("addpd %xmm0, %xmm1");
+ asm ("addps %xmm1, %xmm2");
+ asm ("addsd %xmm2, %xmm1");
+ asm ("addss %xmm1, %xmm0");
+ asm ("addsubpd %xmm0, %xmm2");
+ asm ("addsubps %xmm0, %xmm1");
+ asm ("andpd %xmm1, %xmm2");
+ asm ("andps %xmm2, %xmm1");
+ asm ("cmppd $3, %xmm0, %xmm1");
+ asm ("cmpps $4, %xmm1, %xmm2");
+ asm ("cmpsd $5, %xmm2, %xmm1");
+ asm ("cmpss $6, %xmm1, %xmm0");
+ asm ("comisd %xmm0, %xmm2");
+ asm ("comiss %xmm0, %xmm1");
+ asm ("cvtdq2pd %xmm1, %xmm2");
+ asm ("cvtdq2ps %xmm2, %xmm1");
+ asm ("cvtpd2dq %xmm1, %xmm0");
+ asm ("cvtpd2ps %xmm0, %xmm1");
+ asm ("divpd %xmm1, %xmm2");
+ asm ("divps %xmm2, %xmm1");
+ asm ("divsd %xmm1, %xmm0");
+ asm ("divss %xmm0, %xmm2");
+ asm ("mulpd %xmm0, %xmm1");
+ asm ("mulps %xmm1, %xmm2");
+ asm ("mulsd %xmm2, %xmm1");
+ asm ("mulss %xmm1, %xmm0");
+ asm ("orpd %xmm2, %xmm0");
+ asm ("orps %xmm0, %xmm1");
+ asm ("pabsb %xmm1, %xmm2");
+ asm ("pabsw %xmm2, %xmm1");
+ asm ("pabsd %xmm1, %xmm0");
+ asm ("packsswb %xmm0, %xmm2");
+ asm ("packssdw %xmm0, %xmm1");
+ asm ("ucomisd %xmm1, %xmm2");
+ asm ("ucomiss %xmm2, %xmm1");
+ asm ("unpckhpd %xmm1, %xmm0");
+ asm ("unpckhps %xmm2, %xmm0");
+ asm ("xorpd %xmm0, %xmm1");
+ asm ("xorps %xmm1, %xmm2");
+} /* end sse_test */
+
+void
+sse4_test (void)
+{
+ char buf0[] = {0, 1, 2, 3, 4, 5, 6, 7, 8,
+ 9, 10, 11, 12, 13, 14, 15};
+ char buf1[] = {16, 17, 18, 19, 20, 21, 22, 23,
+ 24, 25, 26, 27, 28, 29, 30, 31};
+ char buf2[] = {32, 33, 34, 35, 36, 37, 38, 39,
+ 40, 41, 42, 43, 44, 45, 46, 47};
+
+ asm ("movupd %0, %%xmm0":"=m"(buf0));
+ asm ("movupd %0, %%xmm1":"=m"(buf1));
+ asm ("movupd %0, %%xmm2":"=m"(buf2));
+
+ asm ("blendpd $1, %xmm1, %xmm0");
+ asm ("blendps $2, %xmm2, %xmm0");
+ asm ("blendvpd %xmm0, %xmm1, %xmm2");
+ asm ("blendvps %xmm0, %xmm2, %xmm1");
+} /* end sse4_test */
+
+int
+main ()
+{
+ sse_test ();
+ sse4_test ();
+ return 0; /* end of main */
+}
--- /dev/null
+++ b/testsuite/gdb.reverse/i386-sse-reverse.exp
@@ -0,0 +1,705 @@
+# Copyright 2009, 2010 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+#
+# This test tests some i386 general instructions for reverse execution.
+#
+
+if ![target_info exists gdb,can_reverse] {
+ return
+}
+
+if $tracelevel {
+ strace $tracelevel
+}
+
+set prms_id 0
+set bug_id 0
+
+if ![istarget "*86*-*linux*"] then {
+ verbose "Skipping i386 reverse tests."
+ return
+}
+
+set testfile "i386-sse-reverse"
+set srcfile ${testfile}.c
+set binfile ${objdir}/${subdir}/${testfile}
+
+# some targets have leading underscores on assembly symbols.
+# TODO: detect this automatically
+set additional_flags ""
+if [istarget "i?86-*-cygwin*"] then {
+ set additional_flags "additional_flags=-DSYMBOL_PREFIX=\"_\""
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable [list debug $additional_flags]] != "" } {
+ untested i386-sse-reverse
+ return -1
+}
+
+set end_of_main [gdb_get_line_number " end of main "]
+set end_sse_test [gdb_get_line_number " end sse_test "]
+set end_sse4_test [gdb_get_line_number " end sse4_test "]
+
+# Get things started.
+
+gdb_exit
+gdb_start
+gdb_reinitialize_dir $srcdir/$subdir
+gdb_load ${binfile}
+runto main
+
+if [target_info exists gdb,use_precord] {
+ # Activate process record/replay
+ gdb_test "record" "" "Turn on process record"
+ # FIXME: command ought to acknowledge, so we can test if it succeeded.
+}
+
+global hex
+global decimal
+
+#sse_test
+
+gdb_test "break $end_sse_test" \
+ "Breakpoint $decimal at .* line $end_sse_test\." \
+ "set breakpoint at end of sse_test"
+
+gdb_test "continue" \
+ " end sse_test .*" \
+ "continue to end of sse_test"
+
+gdb_test "reverse-step" "xorps.*" "reverse-step to xorps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x7f007f007fff7fff7f007f007fff7fff.*" \
+ "verify xmm0 at end of sse_test"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x00ff00ff0000000000ff00ff00000000.*" \
+ "verify xmm1 at end of sse_test"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f007f007f007f007f007f007f007f00.*" \
+ "verify xmm2 at end of sse_test"
+
+gdb_test "reverse-step" "xorpd.*" "reverse-step to xorpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x7f007f007fff7fff7f007f007fff7fff.*" \
+ "verify xmm0 after reverse xorps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
+ "verify xmm1 after reverse xorps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f007f007f007f007f007f007f007f00.*" \
+ "verify xmm2 after reverse xorps"
+
+gdb_test "reverse-step" "unpckhps.*" "reverse-step to unpckhps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x7fff7fff7fff7fff0108000001400000.*" \
+ "verify xmm0 after reverse xorpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
+ "verify xmm1 after reverse xorpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f007f007f007f007f007f007f007f00.*" \
+ "verify xmm2 after reverse xorpd"
+
+gdb_test "reverse-step" "unpckhpd.*" "reverse-step to unpckhpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm0 after reverse unpckhps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
+ "verify xmm1 after reverse unpckhps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f007f007f007f007f007f007f007f00.*" \
+ "verify xmm2 after reverse unpckhps"
+
+gdb_test "reverse-step" "ucomiss.*" "reverse-step to ucomiss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm0 after reverse unpckhpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
+ "verify xmm1 after reverse unpckhpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f007f007f007f007f007f007f007f00.*" \
+ "verify xmm2 after reverse unpckhpd"
+
+gdb_test "reverse-step" "ucomisd.*" "reverse-step to ucomisd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm0 after reverse ucomiss"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x7fff7fff7fff7fff7fff7fff7fff7fff.*" \
+ "verify xmm1 after reverse ucomiss"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f007f007f007f007f007f007f007f00.*" \
+ "verify xmm2 after reverse ucomiss"
+
+gdb_test "reverse-step" "packssdw.*" "reverse-step to packssdw"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm0 after reverse ucomisd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm1 after reverse ucomisd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x7f007f007f007f007f007f007f007f00.*" \
+ "verify xmm2 after reverse ucomisd"
+
+gdb_test "reverse-step" "packsswb.*" "reverse-step to packsswb"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm0 after reverse packssdw"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm1 after reverse packssdw"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm2 after reverse packssdw"
+
+gdb_test "reverse-step" "pabsd.*" "reverse-step to pabsd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xfff00000ffc00000fff80000ffc00000.*" \
+ "verify xmm0 after reverse packsswb"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm1 after reverse packsswb"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm2 after reverse packsswb"
+
+gdb_test "reverse-step" "pabsw.*" "reverse-step to pabsw"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xfff00000ffc00000fff80000ffc00000.*" \
+ "verify xmm0 after reverse pabsd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000fff80000ffc00000.*" \
+ "verify xmm1 after reverse pabsd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x01080000014000000108000001400000.*" \
+ "verify xmm2 after reverse pabsd"
+
+gdb_test "reverse-step" "pabsb.*" "reverse-step to pabsb"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xfff00000ffc00000fff80000ffc00000.*" \
+ "verify xmm0 after reverse pabsw"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000fff80000ffc00000.*" \
+ "verify xmm1 after reverse pabsw"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm2 after reverse pabsw"
+
+gdb_test "reverse-step" "orps.*" "reverse-step to orps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0xfff00000ffc00000fff80000ffc00000.*" \
+ "verify xmm0 after reverse pabsb"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000fff80000ffc00000.*" \
+ "verify xmm1 after reverse pabsb"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm2 after reverse pabsb"
+
+gdb_test "reverse-step" "orpd.*" "reverse-step to orpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0000000000000000fff80000ffc00000.*" \
+ "verify xmm0 after reverse orps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000fff80000ffc00000.*" \
+ "verify xmm1 after reverse orps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm2 after reverse orps"
+
+gdb_test "reverse-step" "mulss.*" "reverse-step to mulss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0000000000000000fff80000ffc00000.*" \
+ "verify xmm0 after reverse orpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000fff80000ffc00000.*" \
+ "verify xmm1 after reverse orpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm2 after reverse orpd"
+
+gdb_test "reverse-step" "mulsd.*" "reverse-step to mulsd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0000000000000000fff80000ffc00000.*" \
+ "verify xmm0 after reverse mulss"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000fff80000ffc00000.*" \
+ "verify xmm1 after reverse mulss"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm2 after reverse mulss"
+
+gdb_test "reverse-step" "mulps.*" "reverse-step to mulps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0000000000000000fff80000ffc00000.*" \
+ "verify xmm0 after reverse mulsd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff80000ffc00000fff80000ffc00000.*" \
+ "verify xmm1 after reverse mulsd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff0000000000000fff00000ffc00000.*" \
+ "verify xmm2 after reverse mulsd"
+
+gdb_test "reverse-step" "mulpd.*" "reverse-step to mulpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0000000000000000fff80000ffc00000.*" \
+ "verify xmm0 after reverse mulps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm1 after reverse mulps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff0000000000000fff00000ffc00000.*" \
+ "verify xmm2 after reverse mulps"
+
+gdb_test "reverse-step" "divss.*" "reverse-step to divss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0000000000000000fff80000ffc00000.*" \
+ "verify xmm0 after reverse mulpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm1 after reverse mulpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff0000000000000fff0000000000000.*" \
+ "verify xmm2 after reverse mulpd"
+
+gdb_test "reverse-step" "divsd.*" "reverse-step to divsd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x00000000000000008000000080000000.*" \
+ "verify xmm0 after reverse divss"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xfff00000ffc00000fff00000ffc00000.*" \
+ "verify xmm1 after reverse divss"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff0000000000000fff0000000000000.*" \
+ "verify xmm2 after reverse divss"
+
+gdb_test "reverse-step" "divps.*" "reverse-step to divps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x00000000000000008000000080000000.*" \
+ "verify xmm0 after reverse divsd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x00000000000000000000000080000000.*" \
+ "verify xmm1 after reverse divsd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xfff0000000000000fff0000000000000.*" \
+ "verify xmm2 after reverse divsd"
+
+gdb_test "reverse-step" "divpd.*" "reverse-step to divpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x00000000000000008000000080000000.*" \
+ "verify xmm0 after reverse divps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x00000000000000000000000080000000.*" \
+ "verify xmm1 after reverse divps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
+ "verify xmm2 after reverse divps"
+
+gdb_test "reverse-step" "cvtpd2ps.*" "reverse-step to cvtpd2ps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x00000000000000008000000080000000.*" \
+ "verify xmm0 after reverse divpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xce80200000000000ce80200000000000.*" \
+ "verify xmm1 after reverse divpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
+ "verify xmm2 after reverse divpd"
+
+gdb_test "reverse-step" "cvtpd2dq.*" "reverse-step to cvtpd2dq"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a090807060504ffffffff.*" \
+ "verify xmm0 after reverse cvtpd2ps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0xce80200000000000ce80200000000000.*" \
+ "verify xmm1 after reverse cvtpd2ps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
+ "verify xmm2 after reverse cvtpd2ps"
+
+gdb_test "reverse-step" "cvtdq2ps.*" "reverse-step to cvtdq2ps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a090807060504ffffffff.*" \
+ "verify xmm0 after reverse cvtpd2dq"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
+ "verify xmm1 after reverse cvtpd2dq"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xbff0000000000000bff0000000000000.*" \
+ "verify xmm2 after reverse cvtpd2dq"
+
+gdb_test "reverse-step" "cvtdq2pd.*" "reverse-step to cvtdq2pd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a090807060504ffffffff.*" \
+ "verify xmm0 after reverse cvtdq2ps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
+ "verify xmm1 after reverse cvtdq2ps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
+ "verify xmm2 after reverse cvtdq2ps"
+
+gdb_test "reverse-step" "comiss.*" "reverse-step to comiss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a090807060504ffffffff.*" \
+ "verify xmm0 after reverse cvtdq2pd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
+ "verify xmm1 after reverse cvtdq2pd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
+ "verify xmm2 after reverse cvtdq2pd"
+
+gdb_test "reverse-step" "comisd.*" "reverse-step to comisd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a090807060504ffffffff.*" \
+ "verify xmm0 after reverse comiss"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
+ "verify xmm1 after reverse comiss"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
+ "verify xmm2 after reverse comiss"
+
+gdb_test "reverse-step" "cmpss.*" "reverse-step to cmpss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse comisd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0000000000000000ffffffffffffffff.*" \
+ "verify xmm1 after reverse comisd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
+ "verify xmm2 after reverse comisd"
+
+gdb_test "reverse-step" "cmpsd.*" "reverse-step to cmpsd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse cmpss"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x00000000000000000000000000000000.*" \
+ "verify xmm1 after reverse cmpss"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0xffffffffffffffffffffffff00000000.*" \
+ "verify xmm2 after reverse cmpss"
+
+gdb_test "reverse-step" "cmpps.*" "reverse-step to cmpps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse cmpsd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x00000000000000000000000000000000.*" \
+ "verify xmm1 after reverse cmpsd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm2 after reverse cmpsd"
+
+gdb_test "reverse-step" "cmppd.*" "reverse-step to cmppd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse cmpps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm1 after reverse cmpps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm2 after reverse cmpps"
+
+gdb_test "reverse-step" "andps.*" "reverse-step to andps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse cmppd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252400000000.*" \
+ "verify xmm1 after reverse cmppd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x0f0e0d0c0b0a09082726252400000000.*" \
+ "verify xmm2 after reverse cmppd"
+
+gdb_test "reverse-step" "andpd.*" "reverse-step to andpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse andps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252400000000.*" \
+ "verify xmm1 after reverse andps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse andps"
+
+gdb_test "reverse-step" "addsubps.*" "reverse-step to addsubps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse andpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252423222120.*" \
+ "verify xmm1 after reverse andpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse andpd"
+
+gdb_test "reverse-step" "addsubpd.*" "reverse-step to addsubpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050423222120.*" \
+ "verify xmm0 after reverse addsubps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252423222120.*" \
+ "verify xmm1 after reverse addsubps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse addsubps"
+
+gdb_test "reverse-step" "addss.*" "reverse-step to addss"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
+ "verify xmm0 after reverse addsubpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19182726252423222120.*" \
+ "verify xmm1 after reverse addsubpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse addsubpd"
+
+gdb_test "reverse-step" "addsd.*" "reverse-step to addsd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
+ "verify xmm0 after reverse addss"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1 after reverse addss"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse addss"
+
+gdb_test "reverse-step" "addps.*" "reverse-step to addps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
+ "verify xmm0 after reverse addsd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1 after reverse addsd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse addsd"
+
+gdb_test "reverse-step" "addpd.*" "reverse-step to addpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
+ "verify xmm0 after reverse addps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1 after reverse addps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse addps"
+
+
+#sse4_test
+
+send_gdb "continue\n"
+
+gdb_test "break $end_sse4_test" \
+ "Breakpoint $decimal at .* line $end_sse4_test\." \
+ "set breakpoint at end of sse4_test"
+
+send_gdb "continue\n"
+gdb_expect {
+ -re " end sse4_test .*" {
+ pass "continue to end of sse4_test"
+ }
+ -re " Illegal instruction.*" {
+ untested i386-sse4-reverse
+ return -1
+ }
+}
+
+gdb_test "reverse-step" "blendvps.*" "reverse-step to blendvps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252413121110.*" \
+ "verify xmm0 at end of sse4_test"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1 at end of sse4_test"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 at end of sse4_test"
+
+gdb_test "reverse-step" "blendvpd.*" "reverse-step to blendvpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09082726252413121110.*" \
+ "verify xmm0 after reverse blendvps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1 after reverse blendvps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse blendvps"
+
+gdb_test "reverse-step" "blendps.*" "reverse-step to blendps"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09081716151413121110.*" \
+ "verify xmm0 after reverse blendvpd"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1 after reverse blendvpd"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse blendvpd"
+
+gdb_test "reverse-step" "blendpd.*" "reverse-step to blendpd"
+
+gdb_test "info register xmm0" \
+ "xmm0 .*uint128 = 0x0f0e0d0c0b0a09080706050403020100.*" \
+ "verify xmm0 after reverse blendps"
+
+gdb_test "info register xmm1" \
+ "xmm1 .*uint128 = 0x1f1e1d1c1b1a19181716151413121110.*" \
+ "verify xmm1 after reverse blendps"
+
+gdb_test "info register xmm2" \
+ "xmm2 .*uint128 = 0x2f2e2d2c2b2a29282726252423222120.*" \
+ "verify xmm2 after reverse blendps"
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-03-30 12:55 ` Hui Zhu
@ 2010-04-01 15:36 ` Hui Zhu
2010-04-01 21:50 ` Michael Snyder
0 siblings, 1 reply; 39+ messages in thread
From: Hui Zhu @ 2010-04-01 15:36 UTC (permalink / raw)
To: Michael Snyder; +Cc: Joel Brobecker, gdb-patches ml
Ping.
Thanks,
Hui
On Tue, Mar 30, 2010 at 20:54, Hui Zhu <teawater@gmail.com> wrote:
> On Tue, Mar 30, 2010 at 14:29, Hui Zhu <teawater@gmail.com> wrote:
>> On Tue, Mar 30, 2010 at 02:11, Michael Snyder <msnyder@vmware.com> wrote:
>>> Hui Zhu wrote:
>>>>
>>>> Hi Michael,
>>>>
>>>> I make a new testsuite that can support sse and sse4 better.
>>>>
>>>> When the pc doesn't support sse4 insn, the test will skip the sse4 insn
>>>> test.
>>>>
>>>> Please help me review it.
>>>
>>> Hui,
>>>
>>> I found out that older versions of GAS require three arguments for blendvps
>>> and blendvpd -- and the first argument must be %xmm0.
>>>
>>> Try this on your machine:
>>>
>>>
>> Thanks Michael.
>>
>> I think it must because the version of as that we use is different.
>> I will try it when I can use my PC that support sse4 insn.
>>
>> Best regards,
>> Hui
>>
>
> Hi Michael,
>
> I try this file in the PC that support sse4, it works OK.
>
> I make a new patch include this change. Please help me review it.
>
> Thanks,
> Hui
>
> 2010-03-30 Hui Zhu <teawater@gmail.com>
> Michael Snyder <msnyder@vmware.com>
>
> * gdb.reverse/i386-sse-reverse.exp: New file.
> * gdb.reverse/i386-sse-reverse.c: New file.
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-04-01 15:36 ` Hui Zhu
@ 2010-04-01 21:50 ` Michael Snyder
2010-04-02 5:14 ` Hui Zhu
0 siblings, 1 reply; 39+ messages in thread
From: Michael Snyder @ 2010-04-01 21:50 UTC (permalink / raw)
To: Hui Zhu; +Cc: Joel Brobecker, gdb-patches ml
Looks OK to me.
Hui Zhu wrote:
> Ping.
>
> Thanks,
> Hui
>
> On Tue, Mar 30, 2010 at 20:54, Hui Zhu <teawater@gmail.com> wrote:
>> On Tue, Mar 30, 2010 at 14:29, Hui Zhu <teawater@gmail.com> wrote:
>>> On Tue, Mar 30, 2010 at 02:11, Michael Snyder <msnyder@vmware.com> wrote:
>>>> Hui Zhu wrote:
>>>>> Hi Michael,
>>>>>
>>>>> I make a new testsuite that can support sse and sse4 better.
>>>>>
>>>>> When the pc doesn't support sse4 insn, the test will skip the sse4 insn
>>>>> test.
>>>>>
>>>>> Please help me review it.
>>>> Hui,
>>>>
>>>> I found out that older versions of GAS require three arguments for blendvps
>>>> and blendvpd -- and the first argument must be %xmm0.
>>>>
>>>> Try this on your machine:
>>>>
>>>>
>>> Thanks Michael.
>>>
>>> I think it must because the version of as that we use is different.
>>> I will try it when I can use my PC that support sse4 insn.
>>>
>>> Best regards,
>>> Hui
>>>
>> Hi Michael,
>>
>> I try this file in the PC that support sse4, it works OK.
>>
>> I make a new patch include this change. Please help me review it.
>>
>> Thanks,
>> Hui
>>
>> 2010-03-30 Hui Zhu <teawater@gmail.com>
>> Michael Snyder <msnyder@vmware.com>
>>
>> * gdb.reverse/i386-sse-reverse.exp: New file.
>> * gdb.reverse/i386-sse-reverse.c: New file.
>>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support
2010-04-01 21:50 ` Michael Snyder
@ 2010-04-02 5:14 ` Hui Zhu
0 siblings, 0 replies; 39+ messages in thread
From: Hui Zhu @ 2010-04-02 5:14 UTC (permalink / raw)
To: Michael Snyder; +Cc: Joel Brobecker, gdb-patches ml
Checked in.
Thanks,
Hui
On Fri, Apr 2, 2010 at 05:50, Michael Snyder <msnyder@vmware.com> wrote:
> Looks OK to me.
>
> Hui Zhu wrote:
>>
>> Ping.
>>
>> Thanks,
>> Hui
>>
>> On Tue, Mar 30, 2010 at 20:54, Hui Zhu <teawater@gmail.com> wrote:
>>>
>>> On Tue, Mar 30, 2010 at 14:29, Hui Zhu <teawater@gmail.com> wrote:
>>>>
>>>> On Tue, Mar 30, 2010 at 02:11, Michael Snyder <msnyder@vmware.com>
>>>> wrote:
>>>>>
>>>>> Hui Zhu wrote:
>>>>>>
>>>>>> Hi Michael,
>>>>>>
>>>>>> I make a new testsuite that can support sse and sse4 better.
>>>>>>
>>>>>> When the pc doesn't support sse4 insn, the test will skip the sse4
>>>>>> insn
>>>>>> test.
>>>>>>
>>>>>> Please help me review it.
>>>>>
>>>>> Hui,
>>>>>
>>>>> I found out that older versions of GAS require three arguments for
>>>>> blendvps
>>>>> and blendvpd -- and the first argument must be %xmm0.
>>>>>
>>>>> Try this on your machine:
>>>>>
>>>>>
>>>> Thanks Michael.
>>>>
>>>> I think it must because the version of as that we use is different.
>>>> I will try it when I can use my PC that support sse4 insn.
>>>>
>>>> Best regards,
>>>> Hui
>>>>
>>> Hi Michael,
>>>
>>> I try this file in the PC that support sse4, it works OK.
>>>
>>> I make a new patch include this change. Please help me review it.
>>>
>>> Thanks,
>>> Hui
>>>
>>> 2010-03-30 Hui Zhu <teawater@gmail.com>
>>> Michael Snyder <msnyder@vmware.com>
>>>
>>> * gdb.reverse/i386-sse-reverse.exp: New file.
>>> * gdb.reverse/i386-sse-reverse.c: New file.
>>>
>
>
^ permalink raw reply [flat|nested] 39+ messages in thread
end of thread, other threads:[~2010-04-02 5:14 UTC | newest]
Thread overview: 39+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2009-12-07 15:00 [RFA] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support Hui Zhu
2009-12-07 16:54 ` Michael Snyder
2009-12-07 17:16 ` Michael Snyder
2009-12-07 17:43 ` Joel Brobecker
2009-12-07 17:54 ` Michael Snyder
2009-12-07 18:00 ` Joel Brobecker
2009-12-07 18:05 ` Michael Snyder
2009-12-08 5:51 ` Hui Zhu
2009-12-08 19:56 ` Michael Snyder
2009-12-07 18:08 ` Doug Evans
2009-12-08 17:43 ` Tom Tromey
2009-12-10 19:52 ` Michael Snyder
2009-12-11 15:00 ` Hui Zhu
2009-12-13 4:28 ` Hui Zhu
2009-12-13 10:35 ` Hui Zhu
2009-12-14 18:24 ` Michael Snyder
2009-12-15 1:47 ` Hui Zhu
2009-12-18 19:44 ` Michael Snyder
2010-01-08 16:07 ` Hui Zhu
2010-01-08 18:45 ` Michael Snyder
2010-01-09 12:28 ` [RFA/i386] " Joel Brobecker
2010-01-11 2:48 ` Hui Zhu
2010-01-11 4:05 ` Joel Brobecker
2010-01-12 1:38 ` Michael Snyder
2010-03-28 16:27 ` Hui Zhu
2010-03-29 1:35 ` Michael Snyder
2010-03-29 1:36 ` Michael Snyder
2010-03-29 9:25 ` Hui Zhu
2010-03-29 1:40 ` Michael Snyder
2010-03-29 2:23 ` Hui Zhu
2010-03-29 13:21 ` Hui Zhu
2010-03-29 17:52 ` Michael Snyder
2010-03-29 18:11 ` Michael Snyder
2010-03-30 6:29 ` Hui Zhu
2010-03-30 12:55 ` Hui Zhu
2010-04-01 15:36 ` Hui Zhu
2010-04-01 21:50 ` Michael Snyder
2010-04-02 5:14 ` Hui Zhu
2010-03-29 2:18 ` Michael Snyder
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