Re: [RFA/i386] Prec x86 MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 support

[Joel Brobecker <brobecker@adacore.com>]

> I am not sure it better can be the part of this patch.  It doesn't
> have relationship with sse insn support, right?

This is why I said that this could be done in a followup patch.

> Looks you have a lot of idea on it.  I suggest you can work on it.  :)

Sorry, I have no interest at this point in time in working on the process
record support. I am, however, spending a very large amount of time trying 
to review your code, provide comments, and answering your emails.

The suggestion about fixing the way you handle errors, in particular
the use of labels, is an important one, so please do not discard it
on the basis that someone else can work on it.

> +      switch (tmpu8)
> 
> Im not sure it clear or not.  I think add more vals will make the code
> not clear.

I think you are wrong, but we can only know by comparing the two
alternatives.  Your code is using switch statements inside switch
statements, and this allows this type of practice. But if it was me,
I would have asked for each case block that requires non-trivial
processing to be moved to a separate function.  With that in mind,
you'd have had to declare a new variable instead of reusing a generic
one which has a meaningless name.  In the present case, you can
certainly declare a variable local to where you need it. For instance:

   case bla:
     {
       int regno;

       target_read_memory (addr, &regno);
       [...]

This code looks a lot clearer to me than:

   case bla:
      target_read_memory (addr, &tmpu);

That being said, this is not the most important part in the list of
things I'd like to see being improved in the process record code.
So, in the grand scheme of things, I'm fine if you are still not
convinced.

-- 
Joel