[PATCH] Output execution stats from ARM simulator

[PATCH] Output execution stats from ARM simulator

[Jon Beniston]

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Hi,

The attached patch outputs the number of instructions executed and the
number of cycles taken by the ARM simulator.

Cheers,
Jon

2004-11-29  Jon Beniston  <jon@beniston.com>

        * wrapper.c (sim_info): Output number of instructions
        executed and number of cycles taken to execute them.

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Index: wrapper.c
===================================================================
RCS file: /cvs/src/src/sim/arm/wrapper.c,v
retrieving revision 1.27
diff -c -p -r1.27 wrapper.c
*** wrapper.c	30 Mar 2003 10:39:22 -0000	1.27
--- wrapper.c	29 Nov 2004 14:34:13 -0000
*************** sim_create_inferior (sd, abfd, argv, env
*** 398,405 ****
  void
  sim_info (sd, verbose)
       SIM_DESC sd ATTRIBUTE_UNUSED;
!      int verbose ATTRIBUTE_UNUSED;
  {
  }
  
  static int
--- 398,415 ----
  void
  sim_info (sd, verbose)
       SIM_DESC sd ATTRIBUTE_UNUSED;
!      int verbose;
  {
+   (*sim_callback->printf_filtered) (sim_callback, "Instructions executed: %d\n", state->NumInstrs);  
+   if (verbose) 
+     {
+       (*sim_callback->printf_filtered) (sim_callback, "S cycles: %d\n", state->NumScycles);  
+       (*sim_callback->printf_filtered) (sim_callback, "N cycles: %d\n", state->NumNcycles);  
+       (*sim_callback->printf_filtered) (sim_callback, "I cycles: %d\n", state->NumIcycles);  
+       (*sim_callback->printf_filtered) (sim_callback, "C cycles: %d\n", state->NumCcycles);  
+       (*sim_callback->printf_filtered) (sim_callback, "F cycles: %d\n", state->NumFcycles); 
+     }
+   (*sim_callback->printf_filtered) (sim_callback, "Total cycles: %d\n", ARMul_Time (state));  
  }
  
  static int

Re: [PATCH] Output execution stats from ARM simulator

[Richard Earnshaw]

On Mon, 2004-11-29 at 14:37, Jon Beniston wrote:
> Hi,
> 
> The attached patch outputs the number of instructions executed and the
> number of cycles taken by the ARM simulator.
> 
> Cheers,
> Jon
> 
> 2004-11-29  Jon Beniston  <jon@beniston.com>
> 
>         * wrapper.c (sim_info): Output number of instructions
>         executed and number of cycles taken to execute them.

While I don't see anything wrong with your patch, I'm not sure whether
that information is accurately tracked any more.  So the numbers
probably aren't meaningful, especially for any core other than an ARM7
(and I don't mean an ARM7TDMI either).

R.

RE: [PATCH] Output execution stats from ARM simulator

[Jon Beniston]

> > 
> > 2004-11-29  Jon Beniston  <jon@beniston.com>
> > 
> >         * wrapper.c (sim_info): Output number of instructions
> >         executed and number of cycles taken to execute them.
> 
> While I don't see anything wrong with your patch, I'm not 
> sure whether that information is accurately tracked any more. 
>  So the numbers probably aren't meaningful, especially for 
> any core other than an ARM7 (and I don't mean an ARM7TDMI either).

I can understand cycles not being valid (as this surely is core specific),
but I take it the number of instructions executed should be?

Cheers,
Jon

RE: [PATCH] Output execution stats from ARM simulator

[Richard Earnshaw]

On Mon, 2004-11-29 at 14:54, Jon Beniston wrote:
> > > 
> > > 2004-11-29  Jon Beniston  <jon@beniston.com>
> > > 
> > >         * wrapper.c (sim_info): Output number of instructions
> > >         executed and number of cycles taken to execute them.
> > 
> > While I don't see anything wrong with your patch, I'm not 
> > sure whether that information is accurately tracked any more. 
> >  So the numbers probably aren't meaningful, especially for 
> > any core other than an ARM7 (and I don't mean an ARM7TDMI either).
> 
> I can understand cycles not being valid (as this surely is core specific),
> but I take it the number of instructions executed should be?
> 
> Cheers,
> Jon

A quick look at the source suggests the instruction count is probably OK
in a free-running simulation, but I would want to do more testing for
use with gdb and single-stepping before I could be certain about that
case.

The cycle counts are probably not modelled at all for some of the newly
added instructions, and the S/N/I counts are pretty meaningless on
Harvard-Architecture cores.

R.