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From: Andrew Cagney <ac131313@ges.redhat.com>
To: Jim Blandy <jimb@redhat.com>
Cc: gdb@sources.redhat.com
Subject: Re: WIP: Register doco
Date: Thu, 25 Jul 2002 08:11:00 -0000	[thread overview]
Message-ID: <3D401539.8090407@ges.redhat.com> (raw)
In-Reply-To: <np8z40tn5m.fsf@zwingli.cygnus.com>

> Andrew Cagney <ac131313@ges.redhat.com> writes:
> 
>> >> Sorry, I'm again lost.  I earlier wrote (note edits):
>> >> ``No, ABI.  For instance mipsIII and o32.  The o32 ABI thinks
>> >> registers have 32 bits yet the real register has 64 bits.  This gives
>> >> two [cooked] views of the same [raw] register.  When o32 debug info
>> >> indicates a value in two adjacent [cooked] registers, it is refering
>> >> to 32 bit and not 64 bit registers.''
>> >> I'm not discussing which of these should be printed since that is
>> >> outside of the scope of this discussion.
> 
>> > (Sorry, the `what would this print' is a distraction.)
>> > Suppose I have a program compiled to the o32 ABI which has a 64-bit
>> > variable that the debug info says is in $a0.  I'm running it on a MIPS
>> > III machine.  This means that half of my variable is in the low 32
>> > bits of $a0, and the the other half is in the low 32 bits of $a1.
>> > So, when you say that cooked registers are "ABI registers", are you
>> > saying that, in the cooked register set, $a0 and $a1 would be 32-bit
>> > registers, even though we're executing a 64-bit instruction set?
>> > Having the register sizes disagree with the actual instructions being
>> > executed is what seems like a bad idea to me.
> 
>> 
>> As I pointed out in the above, there are two cooked $a0's.  One is 32
>> bits and one is 64 bits.
> 
> 
> Wow.  I read what you wrote, but I didn't get that.  So, there are
> going to be two cooked register numbers for $a0, depending on whether
> one is looking at it from the ABI point of view --- like debug info
> does --- or from the ISA point of view.  Is that right?

An architecture is free to provide multiple views onto a single hardware 
register, yes.  In the case of the MIPS that technique is likely to be 
useful as a clean way of mapping debug registers onto raw registers.  It 
isn't, however, a requirement --- the typical architecture will have a 
1:1 cooked:raw mapping.  BTW, did you get a chance to read through the 
discussions between RichardE and myself where we when through 
implementation details like this?

Andrew



  reply	other threads:[~2002-07-25 15:11 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2002-07-19 17:31 Andrew Cagney
2002-07-19 20:11 ` Jim Blandy
2002-07-20 11:39   ` Andrew Cagney
2002-07-20 11:36     ` Jim Blandy
2002-07-20 13:41       ` Andrew Cagney
2002-07-20 15:26         ` Jim Blandy
2002-07-21  9:41           ` Andrew Cagney
2002-07-21 10:04             ` Daniel Jacobowitz
2002-07-22  9:38               ` Andrew Cagney
2002-07-22 10:30                 ` Daniel Jacobowitz
2002-07-23 16:25             ` Jim Blandy
2002-07-23 17:34               ` Andrew Cagney
2002-07-23 20:45                 ` Jim Blandy
2002-07-24  8:35                   ` Andrew Cagney
2002-07-24 22:08                     ` Jim Blandy
2002-07-25  8:13                       ` Andrew Cagney
2002-07-23 21:17                 ` Jim Blandy
2002-07-24  9:09                   ` Andrew Cagney
2002-07-24 22:03                     ` Jim Blandy
2002-07-25  8:11                       ` Andrew Cagney [this message]
2002-07-22 14:39         ` Mark Kettenis
2002-07-22 14:41         ` Mark Kettenis

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