From: Andrew Cagney <ac131313@ges.redhat.com>
To: Jim Blandy <jimb@redhat.com>
Cc: gdb@sources.redhat.com
Subject: Re: WIP: Register doco
Date: Thu, 25 Jul 2002 08:13:00 -0000 [thread overview]
Message-ID: <3D4015A4.2090409@ges.redhat.com> (raw)
In-Reply-To: <np4reotmvx.fsf@zwingli.cygnus.com>
> Andrew Cagney <ac131313@ges.redhat.com> writes:
>
>> Given we're struggling amonst ourselves with the IA-32 I think that
>> suggests it is a very poor choice for an example. Especially given
>> there are better cleaner examples to be had using other familar
>> architectures. I would assume this is why people like H&P chose DLX
>> when describing CPU architectures.
>
>
> It's my understanding that folks disagree about exactly what the raw
> bits should be. But we all agree that the raw registers should
> represent the actual underlying bits only once, and that MMi / ST(j)
> should be cooked registers that alias each other in the right way. Is
> that much, at least, correct?
Yep.
Andrew
next prev parent reply other threads:[~2002-07-25 15:13 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-07-19 17:31 Andrew Cagney
2002-07-19 20:11 ` Jim Blandy
2002-07-20 11:39 ` Andrew Cagney
2002-07-20 11:36 ` Jim Blandy
2002-07-20 13:41 ` Andrew Cagney
2002-07-20 15:26 ` Jim Blandy
2002-07-21 9:41 ` Andrew Cagney
2002-07-21 10:04 ` Daniel Jacobowitz
2002-07-22 9:38 ` Andrew Cagney
2002-07-22 10:30 ` Daniel Jacobowitz
2002-07-23 16:25 ` Jim Blandy
2002-07-23 17:34 ` Andrew Cagney
2002-07-23 20:45 ` Jim Blandy
2002-07-24 8:35 ` Andrew Cagney
2002-07-24 22:08 ` Jim Blandy
2002-07-25 8:13 ` Andrew Cagney [this message]
2002-07-23 21:17 ` Jim Blandy
2002-07-24 9:09 ` Andrew Cagney
2002-07-24 22:03 ` Jim Blandy
2002-07-25 8:11 ` Andrew Cagney
2002-07-22 14:39 ` Mark Kettenis
2002-07-22 14:41 ` Mark Kettenis
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