From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 3334 invoked by alias); 25 Jul 2002 15:11:58 -0000 Mailing-List: contact gdb-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sources.redhat.com Received: (qmail 3323 invoked from network); 25 Jul 2002 15:11:54 -0000 Received: from unknown (HELO localhost.redhat.com) (216.138.202.10) by sources.redhat.com with SMTP; 25 Jul 2002 15:11:54 -0000 Received: from ges.redhat.com (localhost [127.0.0.1]) by localhost.redhat.com (Postfix) with ESMTP id 2B67E3E0D; Thu, 25 Jul 2002 11:11:53 -0400 (EDT) Message-ID: <3D401539.8090407@ges.redhat.com> Date: Thu, 25 Jul 2002 08:11:00 -0000 From: Andrew Cagney User-Agent: Mozilla/5.0 (X11; U; NetBSD macppc; en-US; rv:1.0.0) Gecko/20020708 X-Accept-Language: en-us, en MIME-Version: 1.0 To: Jim Blandy Cc: gdb@sources.redhat.com Subject: Re: WIP: Register doco References: <3D38AF69.7020902@ges.redhat.com> <3D39954D.1020306@ges.redhat.com> <3D39CAD1.3060106@ges.redhat.com> <3D3AE41B.10201@ges.redhat.com> <3D3DF608.8010403@ges.redhat.com> <3D3ED11C.3000906@ges.redhat.com> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2002-07/txt/msg00261.txt.bz2 > Andrew Cagney writes: > >> >> Sorry, I'm again lost. I earlier wrote (note edits): >> >> ``No, ABI. For instance mipsIII and o32. The o32 ABI thinks >> >> registers have 32 bits yet the real register has 64 bits. This gives >> >> two [cooked] views of the same [raw] register. When o32 debug info >> >> indicates a value in two adjacent [cooked] registers, it is refering >> >> to 32 bit and not 64 bit registers.'' >> >> I'm not discussing which of these should be printed since that is >> >> outside of the scope of this discussion. > >> > (Sorry, the `what would this print' is a distraction.) >> > Suppose I have a program compiled to the o32 ABI which has a 64-bit >> > variable that the debug info says is in $a0. I'm running it on a MIPS >> > III machine. This means that half of my variable is in the low 32 >> > bits of $a0, and the the other half is in the low 32 bits of $a1. >> > So, when you say that cooked registers are "ABI registers", are you >> > saying that, in the cooked register set, $a0 and $a1 would be 32-bit >> > registers, even though we're executing a 64-bit instruction set? >> > Having the register sizes disagree with the actual instructions being >> > executed is what seems like a bad idea to me. > >> >> As I pointed out in the above, there are two cooked $a0's. One is 32 >> bits and one is 64 bits. > > > Wow. I read what you wrote, but I didn't get that. So, there are > going to be two cooked register numbers for $a0, depending on whether > one is looking at it from the ABI point of view --- like debug info > does --- or from the ISA point of view. Is that right? An architecture is free to provide multiple views onto a single hardware register, yes. In the case of the MIPS that technique is likely to be useful as a clean way of mapping debug registers onto raw registers. It isn't, however, a requirement --- the typical architecture will have a 1:1 cooked:raw mapping. BTW, did you get a chance to read through the discussions between RichardE and myself where we when through implementation details like this? Andrew