From: Andrew Cagney <ac131313@cygnus.com>
To: Richard.Earnshaw@arm.com
Cc: gdb@sources.redhat.com
Subject: Re: ARM and virtual/raw registers
Date: Thu, 09 May 2002 10:08:00 -0000 [thread overview]
Message-ID: <3CDAAD10.9000704@cygnus.com> (raw)
In-Reply-To: <200205091431.PAA15329@cam-mail2.cambridge.arm.com>
> Ok, so it's clear that the current ARM code for handling virtual and raw
> registers is wrong...
>
> So the question is, what does it need to be?
>
> The answer is that I'm not quite sure, since there are a number of factors
> involved here.
>
> 1) FPA registers are multi-precision -- that is, they are modal, holding
> information about the type of result in the register at any particular
> time. The extra information is used to enable correct support of type
> conversions with signalling NaNs.
[And I thought MIPS was bad :-)]
So an FP register could contain a single, double, ... and each would be
represented differently - single, for instance, would not be stored as a
rounded double?
I think the Alpha does this for int values - it has some really strange
to/from register/int code.
If this is the only problem, then the new REGISTER_TO_VALUE et.al.
methods should address the problem.
Those methods, do, however, assume that the format of a register spilt
into memory is identical to the layout of the h/w register supplied by
the OS / H/W / ... Hmm, ...
> 2) The format of that information can depend on the hardware present, or,
> if absent, on the emulator being used (different emulators handle this in
> different ways).
> 3) Some of the emulators use three words to hold the raw information, some
> use four. RDP returns uses four words.
>
> 4) When a floating point value is stored in memory the format of that
> memory may depend on the instruction used to store it. For example, the
> sfmfd instruction used in a prologue sequence will store three words (as
> would stfe), but there may be information in the unused bits that
> indicates the type of the value in the register. The format of this
> memory may, or may not, be the same as the three-word register information
> mentioned in 3) above.
So the way the ARM spills its FP registers into memory may not
necessarily match the equivalent h/w register?
Does the ARM always spill these registers in the same way (at least for
a given ISA/ABI combination?) - if GDB is fetching a saved register from
the stack, it knows what the format is.
> 5) All of the above is poorly documented ;-(
>
> 6) Selecting the correct conversion routine may involve some inspired
> guess-work :-)
Andrew
next prev parent reply other threads:[~2002-05-09 17:08 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-05-09 7:31 Richard Earnshaw
2002-05-09 9:45 ` Andrew Cagney
2002-05-09 10:01 ` Richard Earnshaw
2002-05-09 11:52 ` Andrew Cagney
2002-05-10 3:45 ` Richard Earnshaw
2002-05-10 7:48 ` Andrew Cagney
2002-05-10 12:07 ` Andrew Cagney
2002-05-11 7:05 ` Richard Earnshaw
2002-05-11 14:52 ` Andrew Cagney
2002-05-12 7:20 ` Richard Earnshaw
2002-05-12 8:25 ` Andrew Cagney
2002-05-12 8:30 ` Richard Earnshaw
2002-05-12 8:51 ` Andrew Cagney
2002-05-10 9:29 ` Richard Earnshaw
2002-05-10 11:42 ` Andrew Cagney
2002-05-11 6:16 ` Richard Earnshaw
2002-05-11 11:41 ` Richard Earnshaw
2002-05-11 13:36 ` Andrew Cagney
2002-05-12 7:11 ` Richard Earnshaw
2002-05-12 7:40 ` Richard Earnshaw
2002-05-12 9:03 ` Andrew Cagney
2002-05-12 11:31 ` Andrew Cagney
2002-05-12 8:07 ` Andrew Cagney
2002-05-12 8:25 ` Richard Earnshaw
2002-05-12 8:41 ` Andrew Cagney
2002-05-13 5:35 ` Richard Earnshaw
2002-05-13 6:13 ` Andrew Cagney
2002-05-13 6:18 ` Richard Earnshaw
2002-05-09 10:08 ` Andrew Cagney [this message]
2002-05-09 10:36 ` Richard Earnshaw
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