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* Re: Implimenting MIPS R4650 DWATCH register as hbreak hardware breakpoint
       [not found] <3707AE48.2582E501.cygnus.gdb@npiny.com>
@ 1999-04-13 20:42 ` Andrew Cagney
  1999-04-13 21:36   ` Jason Molenda
  0 siblings, 1 reply; 4+ messages in thread
From: Andrew Cagney @ 1999-04-13 20:42 UTC (permalink / raw)
  To: M. David Gelbman; +Cc: gdb

"M. David Gelbman" wrote:
> 
> Anybody,
> 
> I'm developing an application on a an IDT MIPS R4650 based board.  this
> MIPS CPU has a DWATCH register capable of breaking on a data read or
> write (or both).
> 
> What must I do to the host portion of GDB to let it know my target is
> capable of implimenting a "hardware" breakpoint?  Further what must I do
> to modify my target GDB stub?
> 
> I suspect the host part is simply a re-configuration of somthing in the
> .gdbini file.  I expect that the target stub needs to parse a new
> command in handle_exception() through the "target remote" protocol.  But
> I haven't yet found the magic words.

FYI,

J.T. Conklin <jtc@redbacknetworks.com> recently posted a proposal (and
patch) to gdb/remote.c that adds hardware breakpoint suport.

At present the proposed protocol changes are accepted but the patch
needed some minor revisions.

Could I suggest finding the thread ``Patch to add breakpoint extension
to remote protocol'' on the gdb-patches mailing list. (Am I foolisly
assuming that gdb-patches is archived?)

	Andrew


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Implimenting MIPS R4650 DWATCH register as hbreak hardware breakpoint
  1999-04-13 20:42 ` Implimenting MIPS R4650 DWATCH register as hbreak hardware breakpoint Andrew Cagney
@ 1999-04-13 21:36   ` Jason Molenda
  0 siblings, 0 replies; 4+ messages in thread
From: Jason Molenda @ 1999-04-13 21:36 UTC (permalink / raw)
  To: Andrew Cagney; +Cc: M. David Gelbman, gdb

On Wed, Apr 14, 1999 at 01:41:47PM +1000, Andrew Cagney wrote:

> Could I suggest finding the thread ``Patch to add breakpoint extension
> to remote protocol'' on the gdb-patches mailing list. (Am I foolisly
> assuming that gdb-patches is archived?)


Of course it's archived.

	http://sourceware.cygnus.com/ml/gdb-patches/1998/msg00121.html

The follow-up to JT's note is in the February archives,

	http://sourceware.cygnus.com/ml/gdb-patches/1999-02/

J


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Implimenting MIPS R4650 DWATCH register as hbreak hardware breakpoint
  1999-04-04 11:25 M. David Gelbman
@ 1999-04-04 13:03 ` M. David Gelbman
  0 siblings, 0 replies; 4+ messages in thread
From: M. David Gelbman @ 1999-04-04 13:03 UTC (permalink / raw)
  To: gdb

Anybody,

I'm developing an application on a an IDT MIPS R4650 based board.  this
MIPS CPU has a DWATCH register capable of breaking on a data read or
write (or both).

What must I do to the host portion of GDB to let it know my target is
capable of implimenting a "hardware" breakpoint?  Further what must I do
to modify my target GDB stub?

I suspect the host part is simply a re-configuration of somthing in the
.gdbini file.  I expect that the target stub needs to parse a new
command in handle_exception() through the "target remote" protocol.  But
I haven't yet found the magic words.

-- 

Sincerely,

M. David Gelbman, Senior Software Engineer
Network Peripherals, Inc.                   <NASDAQ:NPIX>
4170 Veteran's Memorial Highway,  Bohemia,  NY 11716-1009
516.737.2363 (voice)   516.737.2372 (FAX)  ftp://per_need
whois:mdg  mailto:dgelbman@npiny.com  http://www.npix.com
From skossar@paragon-networks.com Mon Apr 05 07:59:00 1999
From: "Steve Kossar" <skossar@paragon-networks.com>
To: <gdb@cygnus.com>
Cc: "Steve Kossar" <skossar@paragon-networks.com>
Subject: gdb support for AMD 29K
Date: Mon, 05 Apr 1999 07:59:00 -0000
Message-id: <000001be7f6c$5e2919e0$4824f326@skossar.paragon-networks.com>
X-SW-Source: 1999-04/msg00002.html
Content-length: 407

I am interested in using gdb with an AMD 29K based target (custom hardware).
Can someone point me to:

	- low-???.c (low-a29k.c?) for use with gdbserver.  We already have an IP
stack running on the target.

	- a stub for the 29k (a29k-stub.c?) for use with the remote protocol

	- helpful hints, as this is my first gdb project.

Thank you very much for any help.

Steve Kossar
skossar@paragon-networks.com
From shebs@cygnus.com Mon Apr 05 19:34:00 1999
From: Stan Shebs <shebs@cygnus.com>
To: skossar@paragon-networks.com
Cc: gdb@cygnus.com
Subject: Re: gdb support for AMD 29K
Date: Mon, 05 Apr 1999 19:34:00 -0000
Message-id: <199904060112.SAA19818@andros.cygnus.com>
References: <000001be7f6c$5e2919e0$4824f326@skossar.paragon-networks.com>
X-SW-Source: 1999-04/msg00003.html
Content-length: 1200

   From: "Steve Kossar" <skossar@paragon-networks.com>
   Date: Mon, 5 Apr 1999 09:58:22 -0400

   I am interested in using gdb with an AMD 29K based target (custom hardware).
   Can someone point me to:

	   - low-???.c (low-a29k.c?) for use with gdbserver.  We already have an IP
   stack running on the target.

	   - a stub for the 29k (a29k-stub.c?) for use with the remote protocol

This is an either-or kind of thing usually; gdbserver is designed to
be a host-side program that you would not typically run on an embedded
processor.  Usually you want to write a stub and then integrate it
into your target system software in some useful way.  As far as I
know, no one has written a generic stub for the a29k.

To learn how to write a stub (it's not too hard), look in the GDB
manual, in the section entitled "the GDB remote serial protocol", as
well as the existing stubs in the sources (i386-stub.c is probably the
simplest to work from).  At present, the top of remote.c is the most
accurate documentation of the actual protocol, although I want to make
the manual be the real spec that the source code is supposed to follow
(novel idea eh? :-) )

							Stan Shebs
							shebs@cygnus.com


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Implimenting MIPS R4650 DWATCH register as hbreak hardware breakpoint
@ 1999-04-04 11:25 M. David Gelbman
  1999-04-04 13:03 ` M. David Gelbman
  0 siblings, 1 reply; 4+ messages in thread
From: M. David Gelbman @ 1999-04-04 11:25 UTC (permalink / raw)
  To: gdb

Anybody,

I'm developing an application on a an IDT MIPS R4650 based board.  this
MIPS CPU has a DWATCH register capable of breaking on a data read or
write (or both).

What must I do to the host portion of GDB to let it know my target is
capable of implimenting a "hardware" breakpoint?  Further what must I do
to modify my target GDB stub?

I suspect the host part is simply a re-configuration of somthing in the
.gdbini file.  I expect that the target stub needs to parse a new
command in handle_exception() through the "target remote" protocol.  But
I haven't yet found the magic words.

-- 

Sincerely,

M. David Gelbman, Senior Software Engineer
Network Peripherals, Inc.                   <NASDAQ:NPIX>
4170 Veteran's Memorial Highway,  Bohemia,  NY 11716-1009
516.737.2363 (voice)   516.737.2372 (FAX)  ftp://per_need
whois:mdg  mailto:dgelbman@npiny.com  http://www.npix.com


^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~1999-04-13 21:36 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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     [not found] <3707AE48.2582E501.cygnus.gdb@npiny.com>
1999-04-13 20:42 ` Implimenting MIPS R4650 DWATCH register as hbreak hardware breakpoint Andrew Cagney
1999-04-13 21:36   ` Jason Molenda
1999-04-04 11:25 M. David Gelbman
1999-04-04 13:03 ` M. David Gelbman

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