From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cagney To: "M. David Gelbman" Cc: gdb@cygnus.com Subject: Re: Implimenting MIPS R4650 DWATCH register as hbreak hardware breakpoint Date: Tue, 13 Apr 1999 20:42:00 -0000 Message-id: <37140E7B.955EBE89@cygnus.com> References: <3707AE48.2582E501.cygnus.gdb@npiny.com> X-SW-Source: 1999-q2/msg00027.html "M. David Gelbman" wrote: > > Anybody, > > I'm developing an application on a an IDT MIPS R4650 based board. this > MIPS CPU has a DWATCH register capable of breaking on a data read or > write (or both). > > What must I do to the host portion of GDB to let it know my target is > capable of implimenting a "hardware" breakpoint? Further what must I do > to modify my target GDB stub? > > I suspect the host part is simply a re-configuration of somthing in the > .gdbini file. I expect that the target stub needs to parse a new > command in handle_exception() through the "target remote" protocol. But > I haven't yet found the magic words. FYI, J.T. Conklin recently posted a proposal (and patch) to gdb/remote.c that adds hardware breakpoint suport. At present the proposed protocol changes are accepted but the patch needed some minor revisions. Could I suggest finding the thread ``Patch to add breakpoint extension to remote protocol'' on the gdb-patches mailing list. (Am I foolisly assuming that gdb-patches is archived?) Andrew