* [PATCH 0/1] sim/riscv: Complete tidying up with SBREAK
@ 2022-09-04 7:45 Tsukasa OI via Gdb-patches
2022-09-04 7:45 ` [PATCH 1/1] " Tsukasa OI via Gdb-patches
0 siblings, 1 reply; 4+ messages in thread
From: Tsukasa OI via Gdb-patches @ 2022-09-04 7:45 UTC (permalink / raw)
To: Tsukasa OI, Andrew Burgess, Mike Frysinger, Nelson Chu,
Kito Cheng, Palmer Dabbelt
Cc: gdb-patches
Hello,
This commit removes SBREAK-related references on the simulator as SBREAK
instruction is renamed to EBREAK in the RISC-V ISA 2.1 (May 31, 2016).
This is the simulator part (can be merged independently).
Tsukasa OI (1):
sim/riscv: Complete tidying up with SBREAK
sim/riscv/sim-main.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
base-commit: 148b68a56c57d69bd97a5f40c34fc4700693596a
--
2.34.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 1/1] sim/riscv: Complete tidying up with SBREAK
2022-09-04 7:45 [PATCH 0/1] sim/riscv: Complete tidying up with SBREAK Tsukasa OI via Gdb-patches
@ 2022-09-04 7:45 ` Tsukasa OI via Gdb-patches
2022-09-04 17:07 ` Andrew Burgess via Gdb-patches
0 siblings, 1 reply; 4+ messages in thread
From: Tsukasa OI via Gdb-patches @ 2022-09-04 7:45 UTC (permalink / raw)
To: Tsukasa OI, Andrew Burgess, Mike Frysinger, Nelson Chu,
Kito Cheng, Palmer Dabbelt
Cc: gdb-patches
This commit removes SBREAK-related references on the simulator as it's
renamed to EBREAK in 2016 (the RISC-V ISA, version 2.1).
sim/ChangeLog:
* riscv/sim-main.c (execute_i): Use "ebreak" instead of "sbreak".
---
sim/riscv/sim-main.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c
index 62f475671c9..30d2f1e1c9a 100644
--- a/sim/riscv/sim-main.c
+++ b/sim/riscv/sim-main.c
@@ -583,9 +583,9 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
case MATCH_FENCE_I:
TRACE_INSN (cpu, "fence.i;");
break;
- case MATCH_SBREAK:
- TRACE_INSN (cpu, "sbreak;");
- /* GDB expects us to step over SBREAK. */
+ case MATCH_EBREAK:
+ TRACE_INSN (cpu, "ebreak;");
+ /* GDB expects us to step over EBREAK. */
sim_engine_halt (sd, cpu, NULL, cpu->pc + 4, sim_stopped, SIM_SIGTRAP);
break;
case MATCH_ECALL:
--
2.34.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/1] sim/riscv: Complete tidying up with SBREAK
2022-09-04 7:45 ` [PATCH 1/1] " Tsukasa OI via Gdb-patches
@ 2022-09-04 17:07 ` Andrew Burgess via Gdb-patches
2022-09-05 8:45 ` Andrew Burgess via Gdb-patches
0 siblings, 1 reply; 4+ messages in thread
From: Andrew Burgess via Gdb-patches @ 2022-09-04 17:07 UTC (permalink / raw)
To: Tsukasa OI; +Cc: Nelson Chu, Kito Cheng, gdb-patches
* Tsukasa OI <research_trasio@irq.a4lg.com> [2022-09-04 07:45:06 +0000]:
> This commit removes SBREAK-related references on the simulator as it's
> renamed to EBREAK in 2016 (the RISC-V ISA, version 2.1).
>
> sim/ChangeLog:
>
> * riscv/sim-main.c (execute_i): Use "ebreak" instead of "sbreak".
Approved. Please go ahead and apply.
Thanks,
Andrew
> ---
> sim/riscv/sim-main.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c
> index 62f475671c9..30d2f1e1c9a 100644
> --- a/sim/riscv/sim-main.c
> +++ b/sim/riscv/sim-main.c
> @@ -583,9 +583,9 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
> case MATCH_FENCE_I:
> TRACE_INSN (cpu, "fence.i;");
> break;
> - case MATCH_SBREAK:
> - TRACE_INSN (cpu, "sbreak;");
> - /* GDB expects us to step over SBREAK. */
> + case MATCH_EBREAK:
> + TRACE_INSN (cpu, "ebreak;");
> + /* GDB expects us to step over EBREAK. */
> sim_engine_halt (sd, cpu, NULL, cpu->pc + 4, sim_stopped, SIM_SIGTRAP);
> break;
> case MATCH_ECALL:
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/1] sim/riscv: Complete tidying up with SBREAK
2022-09-04 17:07 ` Andrew Burgess via Gdb-patches
@ 2022-09-05 8:45 ` Andrew Burgess via Gdb-patches
0 siblings, 0 replies; 4+ messages in thread
From: Andrew Burgess via Gdb-patches @ 2022-09-05 8:45 UTC (permalink / raw)
To: Tsukasa OI; +Cc: Nelson Chu, Kito Cheng, gdb-patches
* Andrew Burgess <aburgess@redhat.com> [2022-09-04 18:07:26 +0100]:
> * Tsukasa OI <research_trasio@irq.a4lg.com> [2022-09-04 07:45:06 +0000]:
>
> > This commit removes SBREAK-related references on the simulator as it's
> > renamed to EBREAK in 2016 (the RISC-V ISA, version 2.1).
> >
> > sim/ChangeLog:
> >
> > * riscv/sim-main.c (execute_i): Use "ebreak" instead of "sbreak".
>
> Approved. Please go ahead and apply.
As you don't have write access yet, I've pushed this for you.
Thanks,
Andrew
^ permalink raw reply [flat|nested] 4+ messages in thread
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