From: Nelson Chu <nelson@rivosinc.com>
To: Andreas Schwab <schwab@suse.de>
Cc: Andrew Burgess <aburgess@redhat.com>,
Soham Gargote <sgargote@whileone.in>,
gdb-patches@sourceware.org, binutils@sourceware.org,
Sameer Natu <snatu@whileone.in>
Subject: Re: [PATCH] Set rv64gcv as default to enable vector extension for disassembly
Date: Thu, 31 Jul 2025 10:37:16 +0800 [thread overview]
Message-ID: <CAPpQWtBcZJu3an-hoda+6w4c=iuwXY383iwA5OBKbxPJVLOSSw@mail.gmail.com> (raw)
In-Reply-To: <mvmseidx1x4.fsf@suse.de>
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On Wed, Jul 30, 2025 at 9:09 PM Andreas Schwab <schwab@suse.de> wrote:
> Why is that needed? AFAICT, objdump will happily decode any extension
> without that change.
>
I guess maybe they are trying to dump an object which writes
vector instructions by .insn directives, so the elf architecture attribute
or mapping symbols won't have v. I will suggest two solutions here rather
than just modify the default_arch,
1. using -Mmax option
2. Allow to set the default arch from the configure option, like what gas
did before. Not sure if it is possible to find a way to share the
configure set both for gas and opcode (assembler and dis-assembler).
BTW, force setting default_arch to rv64gc or whatever in dis-assembler
isn't really good, I think that I just forgot to update it before. So I
sent a patch to let riscv_parse_subset unify the default architecture
both for assembler and dis-assembler from the riscv_all_supported_ext table.
https://sourceware.org/pipermail/binutils/2025-July/143063.html
Nelson
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next prev parent reply other threads:[~2025-07-31 2:39 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-23 10:40 Soham Gargote
2025-07-30 12:27 ` Andrew Burgess
2025-07-30 13:07 ` Andreas Schwab
2025-07-31 2:37 ` Nelson Chu [this message]
2025-07-31 7:21 ` Charlie Jenkins
2025-07-31 7:33 ` Jan Beulich
2025-07-31 10:32 ` Nelson Chu
-- strict thread matches above, loose matches on Subject: below --
2025-07-22 10:34 Soham Gargote
2025-07-22 19:42 ` Andrew Burgess
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