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From: "Metzger, Markus T" <markus.t.metzger@intel.com>
To: Pierre Marsais <pierre.marsais@lse.epita.fr>
Cc: "gdb-patches@sourceware.org" <gdb-patches@sourceware.org>
Subject: RE: [PATCH] Add support for recording xsave x86 instruction
Date: Mon, 01 Oct 2018 06:58:00 -0000	[thread overview]
Message-ID: <A78C989F6D9628469189715575E55B236B360190@IRSMSX104.ger.corp.intel.com> (raw)
In-Reply-To: <20181001002516.GA31390@trigger>

Hello Pierre,

> On Thu, Sep 27, 2018 at 08:44:44AM +0000, Metzger, Markus T wrote:
> >> +            if (!__get_cpuid_count(0xd, i, &size, &offset, &tmp1, &tmp2))
> >> +              return -1;
> >
> > This would check the native configuration, correct?  What if we
> > recorded remotely on a different x86 box?
> 
> Oops, yes. I don't find how to query the offsets/sizes remotely, however there is
> XSTATE areas sizes in gdb/common/x86-xstate.h. I think we can assume that
> those values are correct.

OK.  Other parts of GDB are using those, as well, rather than querying cpuid.


> > Also I think that we would need to check the inferior architecture to
> > handle 32-bit compatibility mode.
> 
> I'm not sure to follow you. In which cases 32-bit behaves differently than 64-bit ?

Fewer registers.  XSAVE is not writing the upper registers area.


> >> +            if (record_full_arch_list_add_mem (tmpu64 + offset, size))
> >> +              return -1;
> >
> > Looks like this assumes the standard (non-compacted) XSAVE format.
> >
> > For the compacted format, the offset must be computed by accumulating
> > the sizes of preceding components.
> 
> If I'm not mistaken, the compact format is only used by XSAVEC instruction, which
> doesn't have the same opcode. The XSAVE instruction seems unrelated to this
> format.

You're right.  It doesn't write the full header ,though.  And there's a special case
with XCR0[1].


> >> +if ![istarget "*86*-*linux*"] then {
> >> +    verbose "Skipping i386 reverse tests."
> >> +    return
> >> +}
> >
> > Why exclude 64-bit?
> 
> Isn't this roughly the same as:
> [ istarget "x86_64-*linux*" ] && [ istarget "i?86-*linux*" ] thus excluding all arch
> but 32 and 64 bit x86 ?

I mistook it for i?86.

Markus.
Intel Deutschland GmbH
Registered Address: Am Campeon 10-12, 85579 Neubiberg, Germany
Tel: +49 89 99 8853-0, www.intel.de
Managing Directors: Christin Eisenschmid, Christian Lamprechter
Chairperson of the Supervisory Board: Nicole Lau
Registered Office: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928


  reply	other threads:[~2018-10-01  6:58 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-21  0:38 Pierre Marsais
2018-09-27  8:45 ` Metzger, Markus T
2018-10-01  0:25   ` Pierre Marsais
2018-10-01  6:58     ` Metzger, Markus T [this message]
2018-10-03  0:05       ` Pierre Marsais
2018-10-01  0:29 ` [PATCH v2] " Pierre Marsais
2018-10-02 23:55 ` [PATCH v3] " Pierre Marsais
     [not found]   ` <CAMe9rOqTeGBckegskZLKxJJL-aexTiorLTEbL2kps_KjJs20Rg@mail.gmail.com>
2018-10-06  0:20     ` Pierre Marsais
2018-10-06  0:16 ` [PATCH v4 1/3] " Pierre Marsais
2018-10-06  0:16   ` [PATCH v4 3/3] Add support for recording xsavec " Pierre Marsais
2018-10-06  0:16   ` [PATCH v4 2/3] Do not mistreat instructions as cmpxchg8b Pierre Marsais
2018-10-11 11:56     ` Metzger, Markus T

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