Re: [PATCH] Add support for recording xsave x86 instruction

[Pierre Marsais <pierre.marsais@lse.epita.fr>]

Hi,

Thanks for the quick reply.

On Mon, Oct 01, 2018 at 06:58:32AM +0000, Metzger, Markus T wrote:
> > > Also I think that we would need to check the inferior architecture to
> > > handle 32-bit compatibility mode.
> > 
> > I'm not sure to follow you. In which cases 32-bit behaves differently than 64-bit ?
> 
> Fewer registers.  XSAVE is not writing the upper registers area.

> > >> +            if (record_full_arch_list_add_mem (tmpu64 + offset, size))
> > >> +              return -1;
> > >
> > > Looks like this assumes the standard (non-compacted) XSAVE format.
> > >
> > > For the compacted format, the offset must be computed by accumulating
> > > the sizes of preceding components.
> > 
> > If I'm not mistaken, the compact format is only used by XSAVEC instruction, which
> > doesn't have the same opcode. The XSAVE instruction seems unrelated to this
> > format.
> 
> You're right.  It doesn't write the full header ,though.  And there's a special case
> with XCR0[1].

Once again, thank you for finding this. I think I've addressed all your
concerns in the v3 of the patch.

Regards,

-- 
Pierre "Pimzero" MARSAIS,
EPITA 2018; GISTRE | ACU | LSE