From: Pedro Alves <palves@redhat.com>
To: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Mark Kettenis <mark.kettenis@xs4all.nl>, gdb-patches@sourceware.org
Subject: Re: [PATCH] h8300 "info registers" broken
Date: Mon, 10 Feb 2014 15:53:00 -0000 [thread overview]
Message-ID: <52F8F07A.5060600@redhat.com> (raw)
In-Reply-To: <877g95fo46.wl%ysato@users.sourceforge.jp>
On 02/08/2014 06:36 PM, Yoshinori Sato wrote:
> #10 0x00000000005b954e in frame_unwind_register (frame=<optimized out>,
> regnum=13, buf=<optimized out>) at ../../gdb/frame.c:1064
Hard to reason about an optimized build... Please try with "-g3 -O0".
I don't have a h8300-elf toolchain handy, and the h8300-linux
toolchain I found doesn't seem to want to link executables,
but I managed to try something by building an .o file, and debugging
that. I don't see a crash, but instead GDB complains CCR
is unavailable.
(gdb) info target
Symbols from "/home/pedro/h8300-main.o".
simulator:
Attached to sim running program /home/pedro/h8300-main.o
#instructions executed 0
#cycles (v approximate) 0
#real time taken 0.0000
#virtual time taken 0.0000
#compiles 0
#cache size 1024
While running this, GDB does not access memory from...
Local exec file:
`/home/pedro/h8300-main.o', file type elf32-h8300.
Entry point: 0x0
0x00000000 - 0x00000024 is .text
0x00000024 - 0x00000024 is .data
0x00000024 - 0x00000024 is .bss
(gdb) b *0
Breakpoint 1 at 0x0: file main.c, line 4.
(gdb) r
Starting program: /home/pedro/h8300-main.o
Breakpoint 1, foo (i=0x0 <foo>) at main.c:4
4 {
(gdb) info registers
r0 0x0000 0
r1 0x0000 0
r2 0x0000 0
r3 0x0000 0
r4 0x0000 0
r5 0x0000 0
r6 0x0000 0
sp 0x0000 0
Register 13 is not available
(gdb) info registers ccr
Register 13 is not available
The problem seems to me that the h8300 port does not define
a register_sim_regno gdbarch hook, and thus when fetching
registers off of the sim, we end up in legacy_register_sim_regno
trying to figure out the sim register number for the raw CCR register:
int
legacy_register_sim_regno (struct gdbarch *gdbarch, int regnum)
{
/* Only makes sense to supply raw registers. */
gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
/* NOTE: cagney/2002-05-13: The old code did it this way and it is
suspected that some GDB/SIM combinations may rely on this
behavour. The default should be one2one_register_sim_regno
(below). */
if (gdbarch_register_name (gdbarch, regnum) != NULL
&& gdbarch_register_name (gdbarch, regnum)[0] != '\0')
return regnum;
else
return LEGACY_SIM_REGNO_IGNORE;
}
And because the raw ccr register does not have a name, that returns
LEGACY_SIM_REGNO_IGNORE. Which means that we never actually
read the ccr raw value. Before the <unavailable> support, this
must have meant that ccr was _always_ read as 0... At least, I'm
not seeing how this ever worked.
Looking at sim/h8300/sim-main.h, it seems like the sim's register
numbers are compatible with gdb's.
This patch below "works" for me, as in, I can now print CCR,
but that's about all I tested (and am willing to test) myself.
Look me know how this looks to you.
---
gdb/h8300-tdep.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/gdb/h8300-tdep.c b/gdb/h8300-tdep.c
index ffffbc9..ac34a9b 100644
--- a/gdb/h8300-tdep.c
+++ b/gdb/h8300-tdep.c
@@ -939,6 +939,20 @@ h8300h_return_value (struct gdbarch *gdbarch, struct value *function,
static struct cmd_list_element *setmachinelist;
+static int
+h8300_register_sim_regno (struct gdbarch *gdbarch, int regnum)
+{
+ /* Only makes sense to supply raw registers. */
+ gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
+
+ /* We hide the raw ccr from the user by making it nameless. Because
+ the default register_sim_regno hook returns
+ LEGACY_SIM_REGNO_IGNORE for unnamed registers, we need to
+ override it. The sim register numbering is compatible with
+ gdb's, so there isn't anything to do. */
+ return regnum;
+}
+
static const char *
h8300_register_name (struct gdbarch *gdbarch, int regno)
{
@@ -1230,6 +1244,8 @@ h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
gdbarch = gdbarch_alloc (&info, 0);
+ set_gdbarch_register_sim_regno (gdbarch, h8300_register_sim_regno);
+
switch (info.bfd_arch_info->mach)
{
case bfd_mach_h8300:
--
1.7.11.7
next prev parent reply other threads:[~2014-02-10 15:53 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-01 12:43 Yoshinori Sato
2014-02-04 19:38 ` Pedro Alves
2014-02-05 17:51 ` Yoshinori Sato
2014-02-05 17:59 ` Mark Kettenis
2014-02-08 18:36 ` Yoshinori Sato
2014-02-10 15:53 ` Pedro Alves [this message]
2014-02-11 10:29 ` Yoshinori Sato
2014-02-11 11:47 ` Pedro Alves
2014-02-11 13:11 ` Yoshinori Sato
2014-02-12 12:42 ` [PATCH 0/2] H8/300: Fix registers Pedro Alves
2014-02-12 12:42 ` [PATCH 1/2] H8/300: Fix gdb<->sim register mapping Pedro Alves
2014-02-12 12:42 ` [PATCH 2/2] H8/300: Fix pseudo registers reads/writes Pedro Alves
2014-02-12 12:59 ` Mark Kettenis
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