[PATCH] fix trap in parallel for m32r-sim

[PATCH] fix trap in parallel for m32r-sim

[Kazuhiro Inaoka]

[-- Attachment #1: Type: text/plain, Size: 381 bytes --]

Hi Andrew,

This is a patch for illegal trap operation in parallel. 

Please commit it.

sim/m32r/ChangeLog

2004-01-16  Kazuhiro Inaoka < inaoka dot kazuhiro at renesas dot com >

 * mloopx.in (emit_parallel,emit_full_parallel,xextract-pbb): Fixed
        trap operation in parallel.
 * mloop2.in (emit_parallel,emit_full_parallel,xextract-pbb): Ditto.

Regards,

Kazuhiro Inaoka

[-- Attachment #2: sim.patch --]
[-- Type: application/octet-stream, Size: 6214 bytes --]

Index: mloop2.in
===================================================================
RCS file: /cvs/src/src/sim/m32r/mloop2.in,v
retrieving revision 1.1
diff -c -r1.1 mloop2.in
*** mloop2.in	12 Dec 2003 16:35:21 -0000	1.1
--- mloop2.in	16 Jan 2004 03:02:56 -0000
***************
*** 107,112 ****
--- 107,121 ----
       with the first insn.  */
    /* ??? Revisit to handle exceptions right.  */
  
+   /* FIXME: trap in parallel */
+   if (((insn >> 16) & 0xfff0) == 0x10f0)
+     {
+       /* FIXME: "trap || insn" ==> "insn -> trap" */
+       id = emit_16 (current_cpu, pc + 2, insn & 0x7fff, sc, fast_p, 0);
+       id2 = emit_16 (current_cpu, pc, insn >> 16, sc + 1, fast_p, 0);
+       return id;
+     }
+ 
    /* FIXME: No need to handle this parallely if second is nop.  */
    id = emit_16 (current_cpu, pc, insn >> 16, sc, fast_p, 1);
  
***************
*** 136,141 ****
--- 145,159 ----
       with the first insn.  */
    /* ??? Revisit to handle exceptions right.  */
  
+   /* FIXME: trap in parallel */
+   if (((insn >> 16) & 0xfff0) == 0x10f0)
+     {
+       /* FIXME: "trap || insn" ==> "insn -> trap" */
+       id = emit_full16 (current_cpu, pc + 2, insn & 0x7fff, sc, 0, 0);
+       id2 = emit_full16 (current_cpu, pc, insn >> 16, sc + 3, 0, 0);
+       return id;
+     }
+ 
    @cpu@_emit_before (current_cpu, sc, pc, 1);
  
    /* FIXME: No need to handle this parallelly if second is nop.  */
***************
*** 289,303 ****
  	    {
  	      if ((insn & 0x8000) != 0) /* parallel? */
  		{
  		  /* Yep.  Here's the "interesting" [sic] part.  */
  		  idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
! 		  sc += 3;
! 		  max_insns -= 3;
  		  icount += 2;
  		  pc += 4;
  		  if (IDESC_CTI_P (idesc))
  		    {
! 		      SET_CTI_VPC (sc - 3);
  		      break;
  		    }
  		}
--- 307,326 ----
  	    {
  	      if ((insn & 0x8000) != 0) /* parallel? */
  		{
+                   int up_count = 3;
+ 		  /* FIXME: trap in parallel */
+ 		  if (((insn >> 16) & 0xfff0) == 0x10f0)
+                     up_count = 2;
+ 
  		  /* Yep.  Here's the "interesting" [sic] part.  */
  		  idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
! 		  sc += up_count;
! 		  max_insns -= up_count;
  		  icount += 2;
  		  pc += 4;
  		  if (IDESC_CTI_P (idesc))
  		    {
! 		      SET_CTI_VPC (sc - up_count);
  		      break;
  		    }
  		}
***************
*** 383,392 ****
  		    }
  		  else
  		    {
  		      idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
  		      cti_sc = sc;
! 		      sc += 3;
! 		      max_insns -= 3;
  		    }
  		  icount += 2;
  		  pc += 4;
--- 406,420 ----
  		    }
  		  else
  		    {
+                       int up_count = 3;
+ 		      /* FIXME: trap in parallel */
+ 		      if (((insn >> 16) & 0xfff0) == 0x10f0)
+                         up_count = 2;
+ 
  		      idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
  		      cti_sc = sc;
! 		      sc += up_count;
! 		      max_insns -= up_count;
  		    }
  		  icount += 2;
  		  pc += 4;
Index: mloopx.in
===================================================================
RCS file: /cvs/src/src/sim/m32r/mloopx.in,v
retrieving revision 1.1.1.1
diff -c -r1.1.1.1 mloopx.in
*** mloopx.in	12 Oct 1999 04:37:53 -0000	1.1.1.1
--- mloopx.in	16 Jan 2004 03:02:57 -0000
***************
*** 107,112 ****
--- 107,121 ----
       with the first insn.  */
    /* ??? Revisit to handle exceptions right.  */
  
+   /* FIXME: trap in parallel */
+   if (((insn >> 16) & 0xfff0) == 0x10f0)
+     {
+       /* FIXME: "trap || insn" ==> "insn -> trap" */
+       id = emit_16 (current_cpu, pc + 2, insn & 0x7fff, sc, fast_p, 0);
+       id2 = emit_16 (current_cpu, pc, insn >> 16, sc + 1, fast_p, 0);
+       return id;
+     }
+ 
    /* FIXME: No need to handle this parallely if second is nop.  */
    id = emit_16 (current_cpu, pc, insn >> 16, sc, fast_p, 1);
  
***************
*** 136,141 ****
--- 145,159 ----
       with the first insn.  */
    /* ??? Revisit to handle exceptions right.  */
  
+   /* FIXME: trap in parallel */
+   if (((insn >> 16) & 0xfff0) == 0x10f0)
+     {
+       /* FIXME: "trap || insn" ==> "insn -> trap" */
+       id = emit_full16 (current_cpu, pc + 2, insn & 0x7fff, sc, 0, 0);
+       id2 = emit_full16 (current_cpu, pc, insn >> 16, sc + 3, 0, 0);
+       return id;
+     }
+ 
    @cpu@_emit_before (current_cpu, sc, pc, 1);
  
    /* FIXME: No need to handle this parallelly if second is nop.  */
***************
*** 289,303 ****
  	    {
  	      if ((insn & 0x8000) != 0) /* parallel? */
  		{
  		  /* Yep.  Here's the "interesting" [sic] part.  */
  		  idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
! 		  sc += 3;
! 		  max_insns -= 3;
  		  icount += 2;
  		  pc += 4;
  		  if (IDESC_CTI_P (idesc))
  		    {
! 		      SET_CTI_VPC (sc - 3);
  		      break;
  		    }
  		}
--- 307,326 ----
  	    {
  	      if ((insn & 0x8000) != 0) /* parallel? */
  		{
+ 		  int up_count = 3;
+ 		  /* FIXME: trap in parallel */
+ 		  if (((insn >> 16) & 0xfff0) == 0x10f0)
+ 		    up_count = 2;
+ 
  		  /* Yep.  Here's the "interesting" [sic] part.  */
  		  idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
! 		  sc += up_count;
! 		  max_insns -= up_count;
  		  icount += 2;
  		  pc += 4;
  		  if (IDESC_CTI_P (idesc))
  		    {
! 		      SET_CTI_VPC (sc - up_count);
  		      break;
  		    }
  		}
***************
*** 383,392 ****
  		    }
  		  else
  		    {
  		      idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
  		      cti_sc = sc;
! 		      sc += 3;
! 		      max_insns -= 3;
  		    }
  		  icount += 2;
  		  pc += 4;
--- 406,420 ----
  		    }
  		  else
  		    {
+ 		      int up_count = 3;
+ 		      /* FIXME: trap in parallel */
+ 		      if (((insn >> 16) & 0xfff0) == 0x10f0)
+ 		        up_count = 2;
+ 
  		      idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
  		      cti_sc = sc;
! 		      sc += up_count;
! 		      max_insns -= up_count;
  		    }
  		  icount += 2;
  		  pc += 4;

[PATCH] fix trap in parallel for m32r-sim

[Doug Evans]

Kazuhiro Inaoka writes:
 > Hi Andrew,
 > 
 > This is a patch for illegal trap operation in parallel. 
 > 
 > Please commit it.
 > 
 > sim/m32r/ChangeLog
 > 
 > 2004-01-16  Kazuhiro Inaoka < inaoka dot kazuhiro at renesas dot com >
 > 
 >  * mloopx.in (emit_parallel,emit_full_parallel,xextract-pbb): Fixed
 >         trap operation in parallel.
 >  * mloop2.in (emit_parallel,emit_full_parallel,xextract-pbb): Ditto.
 > 
 > Regards,
 > 
 > Kazuhiro Inaoka

There's no documentation here that indicates why things are being
done the way they are.
If it were my call, I would require more comments.
i.e. _why_ is "trap || insn" being treated as "insn -> trap".
This seems like an erroneous thing to do at first glance,
ergo the need for comments explaining why things are the way they are.
Does h/w really work that way?

Also, if things are indeed kosher, why the added FIXMEs?

Also, nit: it's unfortunate that instructions are being specified
as magic numbers, but that can be fixed later.

Re: [PATCH] fix trap in parallel for m32r-sim

[Kazuhiro Inaoka]

> There's no documentation here that indicates why things are being
> done the way they are.
> If it were my call, I would require more comments.
> i.e. _why_ is "trap || insn" being treated as "insn -> trap".
> This seems like an erroneous thing to do at first glance,
> ergo the need for comments explaining why things are the way they are.
> Does h/w really work that way?
The sequence is the same.
If insn changes SM, IE or C flag, trap will be store wrong value. (rare
case?)

When you use "trap || insn", m32r_trap() is executed before executed insn.
A m32r_trap() uses a result of insn.
ex) trap #2 || ldi r7,#1
What want to do is to execute m32r_trap() after second insn.

> Also, if things are indeed kosher, why the added FIXMEs?
It's meaning this patch is not enough to fix it.
I think it is a first step.

Kazuhiro

Re: [PATCH] fix trap in parallel for m32r-sim

[Doug Evans]

Kazuhiro Inaoka writes:
 > > i.e. _why_ is "trap || insn" being treated as "insn -> trap".
 >
 > If insn changes SM, IE or C flag, trap will be store wrong value. (rare
 > case?)

I'm not sure I understand.
On h/w the particular case of `trap || insn' doesn't really have
parallel semantics?  In general, if two insns execute in parallel
and write the same resource, the result is undefined.
Or does the m32r spec actually specify a well-defined answer here?

 > When you use "trap || insn", m32r_trap() is executed before executed insn.
 > A m32r_trap() uses a result of insn.

Clearly for the normal case it's a bug if two insns are executing
in parallel and one is able to see the result of the other.
One expects all inputs to be consumed before any results are written
(in general, one might certainly have special cases though).

I can see that m32r_trap violates the semantics for the particular
case of TRAP_SYSCALL but I'm guessing that's not at issue here.

 > ex) trap #2 || ldi r7,#1
 > What want to do is to execute m32r_trap() after second insn.

This example involves insns without overlapping resources,
the insns could be executed serially in either order and the
result will be the same (right?).
Do you have an example where the current simulator implementation
gives a different answer than h/w?

 > > Also, if things are indeed kosher, why the added FIXMEs?
 > It's meaning this patch is not enough to fix it.
 > I think it is a first step.

What's the next step then?  The FIXMEs aren't specific.

Re: [PATCH] fix trap in parallel for m32r-sim

[Kazuhiro Inaoka]

[-- Attachment #1: Type: text/plain, Size: 741 bytes --]

Hi Doug,

I want to fix the following problem.

test pattern is:
main()
{
  asm("trap #0 || ldi r0,#1"); /* the same as exit() ? */

  abort();
}

command line:
m32r-elf-gcc -m32rx test.c

In this case, it will pass through an asm function without exit.
At the time of m32r_trap() execution, r0 is not 1 yet.
It's not a problem of the current simulator implementation for trap
instruction.
I think it's a problem of timing to call back system call when trap is in
parallel.

Changed a patch and comment.

Regards,

Kazuhiro Inaoka

sim/m32r/ChangeLog

2004-01-19  Kazuhiro Inaoka < inaoka dot kazuhiro at renesas dot com >

 * mloopx.in (xextract-pbb): Fixed trap for system calls operation
 in parallel.
 * mloop2.in (xextract-pbb): Ditto.

[-- Attachment #2: sim.patch --]
[-- Type: application/octet-stream, Size: 7904 bytes --]

Index: mloop2.in
===================================================================
RCS file: /cvs/src/src/sim/m32r/mloop2.in,v
retrieving revision 1.1
diff -c -r1.1 mloop2.in
*** mloop2.in	12 Dec 2003 16:35:21 -0000	1.1
--- mloop2.in	19 Jan 2004 04:34:48 -0000
***************
*** 289,303 ****
  	    {
  	      if ((insn & 0x8000) != 0) /* parallel? */
  		{
! 		  /* Yep.  Here's the "interesting" [sic] part.  */
! 		  idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
! 		  sc += 3;
! 		  max_insns -= 3;
  		  icount += 2;
  		  pc += 4;
  		  if (IDESC_CTI_P (idesc))
  		    {
! 		      SET_CTI_VPC (sc - 3);
  		      break;
  		    }
  		}
--- 289,321 ----
  	    {
  	      if ((insn & 0x8000) != 0) /* parallel? */
  		{
!                   int up_count;
! 
! 		  if (((insn >> 16) & 0xfff0) == 0x10f0)
! 		    {
! 		      /* FIXME: No need to handle this sequentially if system
! 		         calls will be able to execute after second insn in
! 		         parallel. ( trap #num || insn ) */
! 		      /* insn */
! 		      idesc = emit_16 (current_cpu, pc + 2, insn & 0x7fff,
! 				       sc, 1, 0);
! 		      /* trap */
! 		      emit_16 (current_cpu, pc, insn >> 16, sc + 1, 1, 0);
!                       up_count = 2;
! 		    }
! 		  else
! 		    {
! 		      /* Yep.  Here's the "interesting" [sic] part.  */
! 		      idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
!                       up_count = 3;
! 		    }
! 		  sc += up_count;
! 		  max_insns -= up_count;
  		  icount += 2;
  		  pc += 4;
  		  if (IDESC_CTI_P (idesc))
  		    {
! 		      SET_CTI_VPC (sc - up_count);
  		      break;
  		    }
  		}
***************
*** 375,392 ****
  		     Only emit before/after handlers if necessary.  */
  		  if (trace_p || profile_p)
  		    {
! 		      idesc = emit_full_parallel (current_cpu, pc, insn, sc,
! 						  trace_p, profile_p);
  		      cti_sc = sc + 1;
  		      sc += 6;
  		      max_insns -= 6;
  		    }
  		  else
  		    {
! 		      idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
  		      cti_sc = sc;
! 		      sc += 3;
! 		      max_insns -= 3;
  		    }
  		  icount += 2;
  		  pc += 4;
--- 393,443 ----
  		     Only emit before/after handlers if necessary.  */
  		  if (trace_p || profile_p)
  		    {
! 		      if (((insn >> 16) & 0xfff0) == 0x10f0)
! 		        {
! 		          /* FIXME: No need to handle this sequentially if
! 			     system calls will be able to execute after second
! 			     insn in parallel. ( trap #num || insn ) */
! 		          /* insn */
! 			  idesc = emit_full16 (current_cpu, pc + 2,
! 					       insn & 0x7fff, sc, 0, 0);
! 		          /* trap */
! 			  emit_full16 (current_cpu, pc, insn >> 16, sc + 3,
! 				       0, 0);
! 		        }
! 		      else
! 		        {
! 		          idesc = emit_full_parallel (current_cpu, pc, insn,
! 						      sc, trace_p, profile_p);
! 		        }
  		      cti_sc = sc + 1;
  		      sc += 6;
  		      max_insns -= 6;
  		    }
  		  else
  		    {
!                       int up_count;
! 
! 		      if (((insn >> 16) & 0xfff0) == 0x10f0)
! 		        {
! 		          /* FIXME: No need to handle this sequentially if
! 			     system calls will be able to execute after second
! 			     insn in parallel. ( trap #num || insn ) */
! 		          /* insn */
! 		          idesc = emit_16 (current_cpu, pc + 2, insn & 0x7fff,
! 				           sc, 0, 0);
! 		          /* trap */
! 		          emit_16 (current_cpu, pc, insn >> 16, sc + 1, 0, 0);
!                           up_count = 2;
! 		        }
! 		      else
! 		        {
! 		          idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
!                           up_count = 3;
! 		        }
  		      cti_sc = sc;
! 		      sc += up_count;
! 		      max_insns -= up_count;
  		    }
  		  icount += 2;
  		  pc += 4;
Index: mloopx.in
===================================================================
RCS file: /cvs/src/src/sim/m32r/mloopx.in,v
retrieving revision 1.1.1.1
diff -c -r1.1.1.1 mloopx.in
*** mloopx.in	12 Oct 1999 04:37:53 -0000	1.1.1.1
--- mloopx.in	19 Jan 2004 04:34:48 -0000
***************
*** 289,303 ****
  	    {
  	      if ((insn & 0x8000) != 0) /* parallel? */
  		{
! 		  /* Yep.  Here's the "interesting" [sic] part.  */
! 		  idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
! 		  sc += 3;
! 		  max_insns -= 3;
  		  icount += 2;
  		  pc += 4;
  		  if (IDESC_CTI_P (idesc))
  		    {
! 		      SET_CTI_VPC (sc - 3);
  		      break;
  		    }
  		}
--- 289,321 ----
  	    {
  	      if ((insn & 0x8000) != 0) /* parallel? */
  		{
! 		  int up_count;
! 
! 		  if (((insn >> 16) & 0xfff0) == 0x10f0)
! 		    {
! 		      /* FIXME: No need to handle this sequentially if system
! 		         calls will be able to execute after second insn in
! 		         parallel. ( trap #num || insn ) */
! 		      /* insn */
! 		      idesc = emit_16 (current_cpu, pc + 2, insn & 0x7fff,
!  				       sc, 1, 0);
! 		      /* trap */
! 		      emit_16 (current_cpu, pc, insn >> 16, sc + 1, 1, 0);
! 		      up_count = 2;
! 		    }
! 		  else
! 		    {
! 		      /* Yep.  Here's the "interesting" [sic] part.  */
! 		      idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
! 		      up_count = 3;
! 		    }
! 		  sc += up_count;
! 		  max_insns -= up_count;
  		  icount += 2;
  		  pc += 4;
  		  if (IDESC_CTI_P (idesc))
  		    {
! 		      SET_CTI_VPC (sc - up_count);
  		      break;
  		    }
  		}
***************
*** 375,392 ****
  		     Only emit before/after handlers if necessary.  */
  		  if (trace_p || profile_p)
  		    {
! 		      idesc = emit_full_parallel (current_cpu, pc, insn, sc,
! 						  trace_p, profile_p);
  		      cti_sc = sc + 1;
  		      sc += 6;
  		      max_insns -= 6;
  		    }
  		  else
  		    {
! 		      idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
  		      cti_sc = sc;
! 		      sc += 3;
! 		      max_insns -= 3;
  		    }
  		  icount += 2;
  		  pc += 4;
--- 393,443 ----
  		     Only emit before/after handlers if necessary.  */
  		  if (trace_p || profile_p)
  		    {
! 		      if (((insn >> 16) & 0xfff0) == 0x10f0)
! 			{
! 			  /* FIXME: No need to handle this sequentially if
! 			     system calls will be able to execute after second
! 			     insn in parallel. ( trap #num || insn ) */
! 			  /* insn */
! 			  idesc = emit_full16 (current_cpu, pc + 2,
! 					       insn & 0x7fff, sc, 0, 0);
! 			  /* trap */
! 			  emit_full16 (current_cpu, pc, insn >> 16, sc + 3,
! 				       0, 0);
! 			}
! 		      else
! 			{
! 		          idesc = emit_full_parallel (current_cpu, pc, insn,
! 						      sc, trace_p, profile_p);
! 			}
  		      cti_sc = sc + 1;
  		      sc += 6;
  		      max_insns -= 6;
  		    }
  		  else
  		    {
! 		      int up_count;
! 
! 		      if (((insn >> 16) & 0xfff0) == 0x10f0)
! 			{
!                           /* FIXME: No need to handle this sequentially if
!                              system calls will be able to execute after second
!                              insn in parallel. ( trap #num || insn ) */
!                           /* insn */
!                           idesc = emit_16 (current_cpu, pc + 2, insn & 0x7fff,
!                                            sc, 0, 0);
!                           /* trap */
!                           emit_16 (current_cpu, pc, insn >> 16, sc + 1, 0, 0);
!                           up_count = 2;
! 			}
! 		      else
! 			{
! 		          idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
!                           up_count = 3;
! 			}
  		      cti_sc = sc;
! 		      sc += up_count;
! 		      max_insns -= up_count;
  		    }
  		  icount += 2;
  		  pc += 4;

Re: [PATCH] fix trap in parallel for m32r-sim

[Doug Evans]

Kazuhiro Inaoka writes:
 > Hi Doug,
 > 
 > I want to fix the following problem.
 > 
 > test pattern is:
 > main()
 > {
 >   asm("trap #0 || ldi r0,#1"); /* the same as exit() ? */
 > 
 >   abort();
 > }

Ah hah!  So this is about TRAP_SYSCALL. :-)
TRAP_SYSCALL is a simulator-only facility to simplify printf,exit,etc.

I gather you want r0 to be 1 before the trap is taken,
violating standard parallel execution semantics: all inputs
read before any outputs written.
i.e. you want the trap to _read_ the value of r0 and get 1.
This is different than the violation I refered to previously
where the trap will _write_ the value of r0, say, before
other insns have read their inputs.

It seems like you're trying to fix a broken program by breaking
(or at least hacking) the simulator.  How about instead just having
a rule that says the TRAP_SYSCALL trap cannot be paired with instructions
that set up inputs for the syscall?  This would be no different
than trying to make

    asm ("add r1,r0 || ldi r0,#1"); // increment r1 by 1

work.  It doesn't work because the `add' will read the value of r0
before the ldi has set it to 1.
[apologies if I got the syntax wrong, haven't programmed m32r
assembler in a while :-)]

 > command line:
 > m32r-elf-gcc -m32rx test.c
 > 
 > In this case, it will pass through an asm function without exit.
 > At the time of m32r_trap() execution, r0 is not 1 yet.
 > It's not a problem of the current simulator implementation for trap
 > instruction.
 > I think it's a problem of timing to call back system call when trap is in
 > parallel.
 > 
 > Changed a patch and comment.
 > 
 > Regards,
 > 
 > Kazuhiro Inaoka
 > 
 > sim/m32r/ChangeLog
 > 
 > 2004-01-19  Kazuhiro Inaoka < inaoka dot kazuhiro at renesas dot com >
 > 
 >  * mloopx.in (xextract-pbb): Fixed trap for system calls operation
 >  in parallel.
 >  * mloop2.in (xextract-pbb): Ditto.

Re: [PATCH] fix trap in parallel for m32r-sim

[Kazuhiro Inaoka]

> Ah hah!  So this is about TRAP_SYSCALL. :-)
> TRAP_SYSCALL is a simulator-only facility to simplify printf,exit,etc.
Yes. It's only for executing a system call hook routine.
The parallel execution is no problem if a trap is not for system
calls(TRAP_SYSCALL etc.).
A trap instruction doesn't need a result of second insn. (A trap is like a
jump instruction.)
A trap handler routine needs a result of second insn.
A m32r_trap() also executes a trap handler routine.

> I gather you want r0 to be 1 before the trap is taken,
> violating standard parallel execution semantics: all inputs
> read before any outputs written.
> i.e. you want the trap to _read_ the value of r0 and get 1.
> This is different than the violation I refered to previously
> where the trap will _write_ the value of r0, say, before
> other insns have read their inputs.
>
> It seems like you're trying to fix a broken program by breaking
> (or at least hacking) the simulator.  How about instead just having
> a rule that says the TRAP_SYSCALL trap cannot be paired with instructions
> that set up inputs for the syscall?  This would be no different
> than trying to make
>
>     asm ("add r1,r0 || ldi r0,#1"); // increment r1 by 1
>
> work.  It doesn't work because the `add' will read the value of r0
> before the ldi has set it to 1.
> [apologies if I got the syntax wrong, haven't programmed m32r
> assembler in a while :-)]

> the TRAP_SYSCALL trap cannot be paired with instructions
> that set up inputs for the syscall
....(--;)

The following patch is only for a trap in parallel.
http://sources.redhat.com/ml/gdb-patches/2004-01/msg00497.html

Re: [PATCH] fix trap in parallel for m32r-sim

[Andrew Cagney]

> sim/m32r/ChangeLog
> 
> 2004-01-19  Kazuhiro Inaoka < inaoka dot kazuhiro at renesas dot com >
> 
>  * mloopx.in (xextract-pbb): Fixed trap for system calls operation
>  in parallel.
>  * mloop2.in (xextract-pbb): Ditto.

I finally got around to checking this in (also updated the Copyright).
Sorry for the delay.

Andrew