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From: Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
To: Doug Evans <dje@transmeta.com>
Cc: Andrew Cagney <ac131313@redhat.com>, gdb-patches@sources.redhat.com
Subject: Re: [PATCH] fix trap in parallel for m32r-sim
Date: Mon, 19 Jan 2004 06:29:00 -0000	[thread overview]
Message-ID: <002401c3de56$6dcfe240$2569910a@tool.maec.co.jp> (raw)
In-Reply-To: <16392.21351.39235.645495@claire.transmeta.com>

[-- Attachment #1: Type: text/plain, Size: 741 bytes --]

Hi Doug,

I want to fix the following problem.

test pattern is:
main()
{
  asm("trap #0 || ldi r0,#1"); /* the same as exit() ? */

  abort();
}

command line:
m32r-elf-gcc -m32rx test.c

In this case, it will pass through an asm function without exit.
At the time of m32r_trap() execution, r0 is not 1 yet.
It's not a problem of the current simulator implementation for trap
instruction.
I think it's a problem of timing to call back system call when trap is in
parallel.

Changed a patch and comment.

Regards,

Kazuhiro Inaoka

sim/m32r/ChangeLog

2004-01-19  Kazuhiro Inaoka < inaoka dot kazuhiro at renesas dot com >

 * mloopx.in (xextract-pbb): Fixed trap for system calls operation
 in parallel.
 * mloop2.in (xextract-pbb): Ditto.

[-- Attachment #2: sim.patch --]
[-- Type: application/octet-stream, Size: 7904 bytes --]

Index: mloop2.in
===================================================================
RCS file: /cvs/src/src/sim/m32r/mloop2.in,v
retrieving revision 1.1
diff -c -r1.1 mloop2.in
*** mloop2.in	12 Dec 2003 16:35:21 -0000	1.1
--- mloop2.in	19 Jan 2004 04:34:48 -0000
***************
*** 289,303 ****
  	    {
  	      if ((insn & 0x8000) != 0) /* parallel? */
  		{
! 		  /* Yep.  Here's the "interesting" [sic] part.  */
! 		  idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
! 		  sc += 3;
! 		  max_insns -= 3;
  		  icount += 2;
  		  pc += 4;
  		  if (IDESC_CTI_P (idesc))
  		    {
! 		      SET_CTI_VPC (sc - 3);
  		      break;
  		    }
  		}
--- 289,321 ----
  	    {
  	      if ((insn & 0x8000) != 0) /* parallel? */
  		{
!                   int up_count;
! 
! 		  if (((insn >> 16) & 0xfff0) == 0x10f0)
! 		    {
! 		      /* FIXME: No need to handle this sequentially if system
! 		         calls will be able to execute after second insn in
! 		         parallel. ( trap #num || insn ) */
! 		      /* insn */
! 		      idesc = emit_16 (current_cpu, pc + 2, insn & 0x7fff,
! 				       sc, 1, 0);
! 		      /* trap */
! 		      emit_16 (current_cpu, pc, insn >> 16, sc + 1, 1, 0);
!                       up_count = 2;
! 		    }
! 		  else
! 		    {
! 		      /* Yep.  Here's the "interesting" [sic] part.  */
! 		      idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
!                       up_count = 3;
! 		    }
! 		  sc += up_count;
! 		  max_insns -= up_count;
  		  icount += 2;
  		  pc += 4;
  		  if (IDESC_CTI_P (idesc))
  		    {
! 		      SET_CTI_VPC (sc - up_count);
  		      break;
  		    }
  		}
***************
*** 375,392 ****
  		     Only emit before/after handlers if necessary.  */
  		  if (trace_p || profile_p)
  		    {
! 		      idesc = emit_full_parallel (current_cpu, pc, insn, sc,
! 						  trace_p, profile_p);
  		      cti_sc = sc + 1;
  		      sc += 6;
  		      max_insns -= 6;
  		    }
  		  else
  		    {
! 		      idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
  		      cti_sc = sc;
! 		      sc += 3;
! 		      max_insns -= 3;
  		    }
  		  icount += 2;
  		  pc += 4;
--- 393,443 ----
  		     Only emit before/after handlers if necessary.  */
  		  if (trace_p || profile_p)
  		    {
! 		      if (((insn >> 16) & 0xfff0) == 0x10f0)
! 		        {
! 		          /* FIXME: No need to handle this sequentially if
! 			     system calls will be able to execute after second
! 			     insn in parallel. ( trap #num || insn ) */
! 		          /* insn */
! 			  idesc = emit_full16 (current_cpu, pc + 2,
! 					       insn & 0x7fff, sc, 0, 0);
! 		          /* trap */
! 			  emit_full16 (current_cpu, pc, insn >> 16, sc + 3,
! 				       0, 0);
! 		        }
! 		      else
! 		        {
! 		          idesc = emit_full_parallel (current_cpu, pc, insn,
! 						      sc, trace_p, profile_p);
! 		        }
  		      cti_sc = sc + 1;
  		      sc += 6;
  		      max_insns -= 6;
  		    }
  		  else
  		    {
!                       int up_count;
! 
! 		      if (((insn >> 16) & 0xfff0) == 0x10f0)
! 		        {
! 		          /* FIXME: No need to handle this sequentially if
! 			     system calls will be able to execute after second
! 			     insn in parallel. ( trap #num || insn ) */
! 		          /* insn */
! 		          idesc = emit_16 (current_cpu, pc + 2, insn & 0x7fff,
! 				           sc, 0, 0);
! 		          /* trap */
! 		          emit_16 (current_cpu, pc, insn >> 16, sc + 1, 0, 0);
!                           up_count = 2;
! 		        }
! 		      else
! 		        {
! 		          idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
!                           up_count = 3;
! 		        }
  		      cti_sc = sc;
! 		      sc += up_count;
! 		      max_insns -= up_count;
  		    }
  		  icount += 2;
  		  pc += 4;
Index: mloopx.in
===================================================================
RCS file: /cvs/src/src/sim/m32r/mloopx.in,v
retrieving revision 1.1.1.1
diff -c -r1.1.1.1 mloopx.in
*** mloopx.in	12 Oct 1999 04:37:53 -0000	1.1.1.1
--- mloopx.in	19 Jan 2004 04:34:48 -0000
***************
*** 289,303 ****
  	    {
  	      if ((insn & 0x8000) != 0) /* parallel? */
  		{
! 		  /* Yep.  Here's the "interesting" [sic] part.  */
! 		  idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
! 		  sc += 3;
! 		  max_insns -= 3;
  		  icount += 2;
  		  pc += 4;
  		  if (IDESC_CTI_P (idesc))
  		    {
! 		      SET_CTI_VPC (sc - 3);
  		      break;
  		    }
  		}
--- 289,321 ----
  	    {
  	      if ((insn & 0x8000) != 0) /* parallel? */
  		{
! 		  int up_count;
! 
! 		  if (((insn >> 16) & 0xfff0) == 0x10f0)
! 		    {
! 		      /* FIXME: No need to handle this sequentially if system
! 		         calls will be able to execute after second insn in
! 		         parallel. ( trap #num || insn ) */
! 		      /* insn */
! 		      idesc = emit_16 (current_cpu, pc + 2, insn & 0x7fff,
!  				       sc, 1, 0);
! 		      /* trap */
! 		      emit_16 (current_cpu, pc, insn >> 16, sc + 1, 1, 0);
! 		      up_count = 2;
! 		    }
! 		  else
! 		    {
! 		      /* Yep.  Here's the "interesting" [sic] part.  */
! 		      idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
! 		      up_count = 3;
! 		    }
! 		  sc += up_count;
! 		  max_insns -= up_count;
  		  icount += 2;
  		  pc += 4;
  		  if (IDESC_CTI_P (idesc))
  		    {
! 		      SET_CTI_VPC (sc - up_count);
  		      break;
  		    }
  		}
***************
*** 375,392 ****
  		     Only emit before/after handlers if necessary.  */
  		  if (trace_p || profile_p)
  		    {
! 		      idesc = emit_full_parallel (current_cpu, pc, insn, sc,
! 						  trace_p, profile_p);
  		      cti_sc = sc + 1;
  		      sc += 6;
  		      max_insns -= 6;
  		    }
  		  else
  		    {
! 		      idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
  		      cti_sc = sc;
! 		      sc += 3;
! 		      max_insns -= 3;
  		    }
  		  icount += 2;
  		  pc += 4;
--- 393,443 ----
  		     Only emit before/after handlers if necessary.  */
  		  if (trace_p || profile_p)
  		    {
! 		      if (((insn >> 16) & 0xfff0) == 0x10f0)
! 			{
! 			  /* FIXME: No need to handle this sequentially if
! 			     system calls will be able to execute after second
! 			     insn in parallel. ( trap #num || insn ) */
! 			  /* insn */
! 			  idesc = emit_full16 (current_cpu, pc + 2,
! 					       insn & 0x7fff, sc, 0, 0);
! 			  /* trap */
! 			  emit_full16 (current_cpu, pc, insn >> 16, sc + 3,
! 				       0, 0);
! 			}
! 		      else
! 			{
! 		          idesc = emit_full_parallel (current_cpu, pc, insn,
! 						      sc, trace_p, profile_p);
! 			}
  		      cti_sc = sc + 1;
  		      sc += 6;
  		      max_insns -= 6;
  		    }
  		  else
  		    {
! 		      int up_count;
! 
! 		      if (((insn >> 16) & 0xfff0) == 0x10f0)
! 			{
!                           /* FIXME: No need to handle this sequentially if
!                              system calls will be able to execute after second
!                              insn in parallel. ( trap #num || insn ) */
!                           /* insn */
!                           idesc = emit_16 (current_cpu, pc + 2, insn & 0x7fff,
!                                            sc, 0, 0);
!                           /* trap */
!                           emit_16 (current_cpu, pc, insn >> 16, sc + 1, 0, 0);
!                           up_count = 2;
! 			}
! 		      else
! 			{
! 		          idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
!                           up_count = 3;
! 			}
  		      cti_sc = sc;
! 		      sc += up_count;
! 		      max_insns -= up_count;
  		    }
  		  icount += 2;
  		  pc += 4;

  reply	other threads:[~2004-01-19  6:29 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2004-01-16  3:26 Kazuhiro Inaoka
2004-01-16  3:43 ` Doug Evans
2004-01-16  5:56   ` Kazuhiro Inaoka
2004-01-16 21:11     ` Doug Evans
2004-01-19  6:29       ` Kazuhiro Inaoka [this message]
2004-01-19 23:05         ` Doug Evans
2004-01-20  4:57           ` Kazuhiro Inaoka
2004-01-27  3:53         ` Andrew Cagney

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