From: Andrew Cagney <ac131313@redhat.com>
To: cgd@broadcom.com
Cc: Kevin Buettner <kevinb@redhat.com>, gdb-patches@sources.redhat.com
Subject: Re: [WIP/RFC] MIPS registers overhaul
Date: Mon, 16 Jun 2003 20:41:00 -0000 [thread overview]
Message-ID: <3EEE2B85.6030207@redhat.com> (raw)
In-Reply-To: <yov5wuflwzx4.fsf@ldt-sj3-010.sj.broadcom.com>
>> OK, I'm going to go out on a limb here. I don't think the two are
>> equivalent, and I think the second is wrong. For big-endian, the
>> second would store fp[n+0] ||| fp[n+1] backwards.
>
>
> No, the two are not equivalent, in terms of the memory layout that
> results on big endian systems. (On little-endian systems, AFAICT they
> end up producing the same results.)
>
> However, neither is more correct w.r.t. what's allowed by the MIPS
> architecture; both will work with MIPS2 and later hardware. Doing the
> stores as dwords is clearly more efficient, though.
The IRIX kernel exports an interface that makes it appear as though two
single stores were used. To GDB, that interface is all that matters :-)
> Err, I'm not sure what code you reference. I couldn't find
> "register_to_type" (case insensitively), anywhere in the GDB source.
Sorry, it was register_to_type. It's been replaced with register_to_value.
> is going to need, for BE, a big-byte little-word DOUBLE, and a similar
>> INT64. Otherwize, $f0.int32 would modify the wrong part of the double
>> register. Alternatively, some of those union values could be given
>> magic offsets. Looking at kevin's patch:
>
>
> Right. I think the "assume 4 bytes of pad before the 4-byte item" is
> the right way to look at it.
The kernel, when it presents the value to GDB, doesn't do that. It puts
the even register in the low address. If possible the register's type
should reflect the underlying format - big-byte, little-word.
> And then to follow on from that:
>
> * if 32-bit FPU (32-bit MIPS or 64-bit MIPS with FR == 0), assume you
> have 16 of them, or
Careful. If the ABI is o32, and FR == 0/..., then there should be only
16 floating point registers in use. The original MIPS 1, and r5900 ABIs
would both allow use of all 32 32 bit floating point registers.
> * if 64-bit FPU, you have 32.
>
> (at least, that's the way it should work for "normal" FPU usage. For
> single-float, where $f0 and $f1 contain independent singles, it's
> another story.)
Yes.
Andrew
next prev parent reply other threads:[~2003-06-16 20:41 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-05-10 0:25 Kevin Buettner
2003-05-10 20:30 ` Andrew Cagney
2003-05-10 20:40 ` Daniel Jacobowitz
2003-05-14 22:00 ` Kevin Buettner
[not found] ` <mailpost.1052949911.28802@news-sj1-1>
2003-05-14 23:35 ` cgd
2003-05-15 0:07 ` Kevin Buettner
2003-05-15 0:15 ` Daniel Jacobowitz
2003-05-15 22:01 ` Kevin Buettner
2003-05-16 3:24 ` Andrew Cagney
2003-05-16 4:00 ` Andrew Cagney
2003-05-16 17:20 ` Kevin Buettner
[not found] ` <mailpost.1053057614.17325@news-sj1-1>
2003-05-16 22:25 ` cgd
[not found] ` <mailpost.1053123913.16634@news-sj1-1>
2003-05-16 22:50 ` cgd
2003-05-16 23:05 ` Kevin Buettner
[not found] ` <mailpost.1053126410.17856@news-sj1-1>
2003-05-16 23:24 ` cgd
2003-05-17 0:41 ` Kevin Buettner
2003-05-17 20:59 ` Daniel Jacobowitz
2003-05-20 20:18 ` Always remote: " Andrew Cagney
2003-05-20 20:26 ` Daniel Jacobowitz
[not found] ` <mailpost.1053132070.20348@news-sj1-1>
2003-05-20 20:37 ` cgd
2003-05-20 20:51 ` Kevin Buettner
2003-05-20 20:52 ` Andrew Cagney
2003-05-20 21:57 ` cgd
2003-05-21 15:34 ` Andrew Cagney
2003-05-21 15:41 ` Daniel Jacobowitz
2003-05-21 16:38 ` Andrew Cagney
2003-05-21 16:58 ` Daniel Jacobowitz
2003-05-21 18:32 ` Kevin Buettner
2003-05-21 19:15 ` Andrew Cagney
2003-05-21 19:45 ` Kevin Buettner
2003-05-22 0:32 ` Daniel Jacobowitz
2003-05-23 18:39 ` Andrew Cagney
2003-05-23 19:02 ` Daniel Jacobowitz
2003-05-23 20:45 ` Andrew Cagney
2003-05-20 20:25 ` Andrew Cagney
2003-05-20 20:32 ` cgd
2003-05-21 15:40 ` Andrew Cagney
2003-06-15 1:44 ` Andrew Cagney
2003-06-16 18:06 ` cgd
2003-06-16 18:47 ` Andrew Cagney
2003-06-15 17:23 ` Andrew Cagney
2003-06-16 20:06 ` cgd
2003-06-16 20:41 ` Andrew Cagney [this message]
[not found] ` <mailpost.1055796186.4097@news-sj1-1>
2003-06-17 5:04 ` cgd
2003-06-17 14:27 ` Andrew Cagney
[not found] ` <mailpost.1055860052.3406@news-sj1-1>
2003-06-17 16:27 ` cgd
2003-05-21 20:58 David Anderson
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