* [RFA] sparc-solaris stack-checking - new prologue sequence
@ 2011-05-06 0:46 Jerome Guitton
2011-05-19 9:20 ` Jerome Guitton
0 siblings, 1 reply; 6+ messages in thread
From: Jerome Guitton @ 2011-05-06 0:46 UTC (permalink / raw)
To: gdb-patches; +Cc: Jerome Guitton
This patch should fix gdb.base/stack-checking.exp on sparc-solaris.
GCC generates some new sequences for stack checking, we just need to
recognize them. Compare:
sethi <some immediate>,%g1
sub %sp, %g1, %g1
sethi <some immediate>, %g4
sub %g1, %g4, %g4
cmp %g1, %g4
be <disp>
add %g1, -<some immediate>, %g1
ba <disp>
st [%g0, [%g1]]
clr [%g4 - some immediate]
with this new sequence:
sethi <some immediate>,%g1
sethi <some immediate>, %g4
sub %sp, %g1, %g1
sub %g1, %g4, %g4
cmp %g1, %g4
be <disp>
add %g1, -<some immediate>, %g1
ba <disp>
st [%g0, [%g1 - 0]]
[clr [%g4 - some immediate]]
Two differences:
* first, the probing loop has been slightly reordered;
* second, to clear a memory location, GCC may now generate
"st %g0, [%g1+0]" instead of "st %g0, [%g1]". The same effect,
but a different instruction format.
Also, the last probe may not be generated if the probe loop leaves no
remainder.
I cannot run the testsuite on sparc solaris, as it crashes the machine
pretty badly. We ought to identify the test that causes this crash.
I could run stack-checking.exp and check that it fixes one regression
though. And I tested against AdaCore's testsuite, which
is already a fairly good insurance that this patch is safe.
OK to apply?
gdb/ChangeLog:
* sparc-tdep.c (sparc_skip_stack_check): Recognize a new instruction
sequence for probing loops.
---
gdb/sparc-tdep.c | 68 +++++++++++++++++++++++++++++++++++++++++------------
1 files changed, 52 insertions(+), 16 deletions(-)
diff --git a/gdb/sparc-tdep.c b/gdb/sparc-tdep.c
index 1039bd8..947d812 100644
--- a/gdb/sparc-tdep.c
+++ b/gdb/sparc-tdep.c
@@ -609,9 +609,28 @@ sparc_skip_stack_check (const CORE_ADDR start_pc)
CORE_ADDR pc = start_pc;
unsigned long insn;
int offset_stack_checking_sequence = 0;
+ int probing_loop = 0;
/* With GCC, all stack checking sequences begin with the same two
- instructions. */
+ instructions, plus an optional one in the case of a probing loop:
+
+ sethi <some immediate>,%g1
+ sub %sp, %g1, %g1
+
+ or:
+
+ sethi <some immediate>,%g1
+ sethi <some immediate>, %g4
+ sub %sp, %g1, %g1
+
+ or:
+
+ sethi <some immediate>,%g1
+ sub %sp, %g1, %g1
+ sethi <some immediate>, %g4
+
+ If the optional instruction is found (setting g4), assume that a
+ probing loop will follow. */
/* sethi <some immediate>,%g1 */
insn = sparc_fetch_instruction (pc);
@@ -619,9 +638,17 @@ sparc_skip_stack_check (const CORE_ADDR start_pc)
if (!(X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 1))
return start_pc;
- /* sub %sp, %g1, %g1 */
+ /* optional: sethi <some immediate>, %g4 */
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
+ if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4)
+ {
+ probing_loop = 1;
+ insn = sparc_fetch_instruction (pc);
+ pc = pc + 4;
+ }
+
+ /* sub %sp, %g1, %g1 */
if (!(X_OP (insn) == 2 && X_OP3 (insn) == 0x4 && !X_I(insn)
&& X_RD (insn) == 1 && X_RS1 (insn) == 14 && X_RS2 (insn) == 1))
return start_pc;
@@ -629,6 +656,14 @@ sparc_skip_stack_check (const CORE_ADDR start_pc)
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
+ /* optional: sethi <some immediate>, %g4 */
+ if ((X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4))
+ {
+ probing_loop = 1;
+ insn = sparc_fetch_instruction (pc);
+ pc = pc + 4;
+ }
+
/* First possible sequence:
[first two instructions above]
clr [%g1 - some immediate] */
@@ -680,22 +715,21 @@ sparc_skip_stack_check (const CORE_ADDR start_pc)
}
/* Third sequence: A probing loop.
- [first two instructions above]
- sethi <some immediate>, %g4
+ [first three instructions above]
sub %g1, %g4, %g4
cmp %g1, %g4
be <disp>
add %g1, -<some immediate>, %g1
ba <disp>
clr [%g1]
+
+ And an optional last probe for the remainder:
+
clr [%g4 - some immediate] */
- /* sethi <some immediate>, %g4 */
- else if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4)
+ if (probing_loop)
{
/* sub %g1, %g4, %g4 */
- insn = sparc_fetch_instruction (pc);
- pc = pc + 4;
if (!(X_OP (insn) == 2 && X_OP3 (insn) == 0x4 && !X_I(insn)
&& X_RD (insn) == 4 && X_RS1 (insn) == 1 && X_RS2 (insn) == 4))
return start_pc;
@@ -726,22 +760,24 @@ sparc_skip_stack_check (const CORE_ADDR start_pc)
if (!(X_OP (insn) == 0 && X_COND (insn) == 0x8))
return start_pc;
- /* clr [%g1] */
+ /* clr [%g1] (st %g0, [%g1] or st %g0, [%g1+0]) */
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
- if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4 && !X_I(insn)
- && X_RD (insn) == 0 && X_RS1 (insn) == 1))
+ if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4
+ && X_RD (insn) == 0 && X_RS1 (insn) == 1
+ && (!X_I(insn) || X_SIMM13 (insn) == 0)))
return start_pc;
- /* clr [%g4 - some immediate] */
+ /* We found a valid stack-check sequence, return the new PC. */
+
+ /* optional: clr [%g4 - some immediate] */
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4 && X_I(insn)
&& X_RS1 (insn) == 4 && X_RD (insn) == 0))
- return start_pc;
-
- /* We found a valid stack-check sequence, return the new PC. */
- return pc;
+ return pc - 4;
+ else
+ return pc;
}
/* No stack check code in our prologue, return the start_pc. */
--
1.7.0.2
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RFA] sparc-solaris stack-checking - new prologue sequence
2011-05-06 0:46 [RFA] sparc-solaris stack-checking - new prologue sequence Jerome Guitton
@ 2011-05-19 9:20 ` Jerome Guitton
2011-05-19 9:44 ` Mark Kettenis
0 siblings, 1 reply; 6+ messages in thread
From: Jerome Guitton @ 2011-05-19 9:20 UTC (permalink / raw)
To: gdb-patches
[-- Attachment #1: Type: text/plain, Size: 1865 bytes --]
Ping? I'm attaching a slightly different patch after having fixed
a small style issue.
I can now run the gdb-testsuite without crashing my sparc-solaris
machine; not sure what have changed in the meantime. In any case, I
had no new regressions and one new PASS (stack-checking.exp).
OK to apply?
Jerome Guitton (guitton@adacore.com):
> This patch should fix gdb.base/stack-checking.exp on sparc-solaris.
> GCC generates some new sequences for stack checking, we just need to
> recognize them. Compare:
>
> sethi <some immediate>,%g1
> sub %sp, %g1, %g1
> sethi <some immediate>, %g4
> sub %g1, %g4, %g4
> cmp %g1, %g4
> be <disp>
> add %g1, -<some immediate>, %g1
> ba <disp>
> st [%g0, [%g1]]
> clr [%g4 - some immediate]
>
> with this new sequence:
>
> sethi <some immediate>,%g1
> sethi <some immediate>, %g4
> sub %sp, %g1, %g1
> sub %g1, %g4, %g4
> cmp %g1, %g4
> be <disp>
> add %g1, -<some immediate>, %g1
> ba <disp>
> st [%g0, [%g1 - 0]]
> [clr [%g4 - some immediate]]
>
> Two differences:
> * first, the probing loop has been slightly reordered;
> * second, to clear a memory location, GCC may now generate
> "st %g0, [%g1+0]" instead of "st %g0, [%g1]". The same effect,
> but a different instruction format.
>
> Also, the last probe may not be generated if the probe loop leaves no
> remainder.
>
> I cannot run the testsuite on sparc solaris, as it crashes the machine
> pretty badly. We ought to identify the test that causes this crash.
> I could run stack-checking.exp and check that it fixes one regression
> though. And I tested against AdaCore's testsuite, which
> is already a fairly good insurance that this patch is safe.
> OK to apply?
[-- Attachment #2: sparc-tdep.diff --]
[-- Type: text/x-diff, Size: 4314 bytes --]
gdb/ChangeLog:
* sparc-tdep.c (sparc_skip_stack_check): Recognize a new instruction
sequence for probing loops.
diff --git a/gdb/sparc-tdep.c b/gdb/sparc-tdep.c
index 1039bd8..5f07827 100644
--- a/gdb/sparc-tdep.c
+++ b/gdb/sparc-tdep.c
@@ -609,9 +609,28 @@ sparc_skip_stack_check (const CORE_ADDR start_pc)
CORE_ADDR pc = start_pc;
unsigned long insn;
int offset_stack_checking_sequence = 0;
+ int probing_loop = 0;
/* With GCC, all stack checking sequences begin with the same two
- instructions. */
+ instructions, plus an optional one in the case of a probing loop:
+
+ sethi <some immediate>,%g1
+ sub %sp, %g1, %g1
+
+ or:
+
+ sethi <some immediate>,%g1
+ sethi <some immediate>, %g4
+ sub %sp, %g1, %g1
+
+ or:
+
+ sethi <some immediate>,%g1
+ sub %sp, %g1, %g1
+ sethi <some immediate>, %g4
+
+ If the optional instruction is found (setting g4), assume that a
+ probing loop will follow. */
/* sethi <some immediate>,%g1 */
insn = sparc_fetch_instruction (pc);
@@ -619,9 +638,17 @@ sparc_skip_stack_check (const CORE_ADDR start_pc)
if (!(X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 1))
return start_pc;
- /* sub %sp, %g1, %g1 */
+ /* optional: sethi <some immediate>, %g4 */
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
+ if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4)
+ {
+ probing_loop = 1;
+ insn = sparc_fetch_instruction (pc);
+ pc = pc + 4;
+ }
+
+ /* sub %sp, %g1, %g1 */
if (!(X_OP (insn) == 2 && X_OP3 (insn) == 0x4 && !X_I(insn)
&& X_RD (insn) == 1 && X_RS1 (insn) == 14 && X_RS2 (insn) == 1))
return start_pc;
@@ -629,6 +656,14 @@ sparc_skip_stack_check (const CORE_ADDR start_pc)
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
+ /* optional: sethi <some immediate>, %g4 */
+ if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4)
+ {
+ probing_loop = 1;
+ insn = sparc_fetch_instruction (pc);
+ pc = pc + 4;
+ }
+
/* First possible sequence:
[first two instructions above]
clr [%g1 - some immediate] */
@@ -680,22 +715,21 @@ sparc_skip_stack_check (const CORE_ADDR start_pc)
}
/* Third sequence: A probing loop.
- [first two instructions above]
- sethi <some immediate>, %g4
+ [first three instructions above]
sub %g1, %g4, %g4
cmp %g1, %g4
be <disp>
add %g1, -<some immediate>, %g1
ba <disp>
clr [%g1]
+
+ And an optional last probe for the remainder:
+
clr [%g4 - some immediate] */
- /* sethi <some immediate>, %g4 */
- else if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4)
+ if (probing_loop)
{
/* sub %g1, %g4, %g4 */
- insn = sparc_fetch_instruction (pc);
- pc = pc + 4;
if (!(X_OP (insn) == 2 && X_OP3 (insn) == 0x4 && !X_I(insn)
&& X_RD (insn) == 4 && X_RS1 (insn) == 1 && X_RS2 (insn) == 4))
return start_pc;
@@ -726,22 +760,24 @@ sparc_skip_stack_check (const CORE_ADDR start_pc)
if (!(X_OP (insn) == 0 && X_COND (insn) == 0x8))
return start_pc;
- /* clr [%g1] */
+ /* clr [%g1] (st %g0, [%g1] or st %g0, [%g1+0]) */
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
- if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4 && !X_I(insn)
- && X_RD (insn) == 0 && X_RS1 (insn) == 1))
+ if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4
+ && X_RD (insn) == 0 && X_RS1 (insn) == 1
+ && (!X_I(insn) || X_SIMM13 (insn) == 0)))
return start_pc;
- /* clr [%g4 - some immediate] */
+ /* We found a valid stack-check sequence, return the new PC. */
+
+ /* optional: clr [%g4 - some immediate] */
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4 && X_I(insn)
&& X_RS1 (insn) == 4 && X_RD (insn) == 0))
- return start_pc;
-
- /* We found a valid stack-check sequence, return the new PC. */
- return pc;
+ return pc - 4;
+ else
+ return pc;
}
/* No stack check code in our prologue, return the start_pc. */
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RFA] sparc-solaris stack-checking - new prologue sequence
2011-05-19 9:20 ` Jerome Guitton
@ 2011-05-19 9:44 ` Mark Kettenis
2011-05-19 10:17 ` Jerome Guitton
0 siblings, 1 reply; 6+ messages in thread
From: Mark Kettenis @ 2011-05-19 9:44 UTC (permalink / raw)
To: guitton; +Cc: gdb-patches
> Date: Thu, 19 May 2011 11:20:16 +0200
> From: Jerome Guitton <guitton@adacore.com>
>
> Ping? I'm attaching a slightly different patch after having fixed
> a small style issue.
>
> I can now run the gdb-testsuite without crashing my sparc-solaris
> machine; not sure what have changed in the meantime. In any case, I
> had no new regressions and one new PASS (stack-checking.exp).
>
> OK to apply?
I had wanted to give this a spin on OpenBSD/sparc, but unfortunately
my SS20 seems to have hardware issues. Origionally I thought the
changes were restricted to 32-bit code. But it seems this code is use
for 64-bit code as well. So I'll give this a spin on an
OpenBSD/sparc64 machine tonight.
Some (very minor) turd shining nits:
> gdb/ChangeLog:
>
> * sparc-tdep.c (sparc_skip_stack_check): Recognize a new instruction
> sequence for probing loops.
>
> diff --git a/gdb/sparc-tdep.c b/gdb/sparc-tdep.c
> index 1039bd8..5f07827 100644
> --- a/gdb/sparc-tdep.c
> +++ b/gdb/sparc-tdep.c
> @@ -609,9 +609,28 @@ sparc_skip_stack_check (const CORE_ADDR start_pc)
> CORE_ADDR pc = start_pc;
> unsigned long insn;
> int offset_stack_checking_sequence = 0;
> + int probing_loop = 0;
>
> /* With GCC, all stack checking sequences begin with the same two
> - instructions. */
> + instructions, plus an optional one in the case of a probing loop:
> +
> + sethi <some immediate>,%g1
> + sub %sp, %g1, %g1
> +
> + or:
> +
> + sethi <some immediate>,%g1
> + sethi <some immediate>, %g4
> + sub %sp, %g1, %g1
> +
> + or:
> +
> + sethi <some immediate>,%g1
> + sub %sp, %g1, %g1
> + sethi <some immediate>, %g4
Spacing here is a tad bit inconsistent. Would be nice if you could
make sure there always is a space after a comma.
> + /* optional: sethi <some immediate>, %g4 */
And here there are two spaces after the sethi, where you use only a
single space before.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RFA] sparc-solaris stack-checking - new prologue sequence
2011-05-19 9:44 ` Mark Kettenis
@ 2011-05-19 10:17 ` Jerome Guitton
2011-05-20 17:32 ` Mark Kettenis
0 siblings, 1 reply; 6+ messages in thread
From: Jerome Guitton @ 2011-05-19 10:17 UTC (permalink / raw)
To: Mark Kettenis; +Cc: gdb-patches
[-- Attachment #1: Type: text/plain, Size: 644 bytes --]
Mark Kettenis (mark.kettenis@xs4all.nl):
> I had wanted to give this a spin on OpenBSD/sparc, but unfortunately
> my SS20 seems to have hardware issues. Origionally I thought the
> changes were restricted to 32-bit code. But it seems this code is use
> for 64-bit code as well. So I'll give this a spin on an
> OpenBSD/sparc64 machine tonight.
OK, perfect. Thank you.
In any case, I have fixed the space inconsistencies that I introduced;
the new patch is in attachment. I noticed that there are other
inconsistencies that are worth fixing in sparc_skip_stack_check (on
clr instructions in particular); I'll do that on a separate patch.
[-- Attachment #2: sparc-tdep.diff --]
[-- Type: text/x-diff, Size: 4298 bytes --]
gdb/ChangeLog:
* sparc-tdep.c (sparc_skip_stack_check): Recognize a new instruction
sequence for probing loops.
diff --git a/gdb/sparc-tdep.c b/gdb/sparc-tdep.c
index 1039bd8..87d6f76 100644
--- a/gdb/sparc-tdep.c
+++ b/gdb/sparc-tdep.c
@@ -609,19 +609,46 @@ sparc_skip_stack_check (const CORE_ADDR start_pc)
CORE_ADDR pc = start_pc;
unsigned long insn;
int offset_stack_checking_sequence = 0;
+ int probing_loop = 0;
/* With GCC, all stack checking sequences begin with the same two
- instructions. */
+ instructions, plus an optional one in the case of a probing loop:
- /* sethi <some immediate>,%g1 */
+ sethi <some immediate>, %g1
+ sub %sp, %g1, %g1
+
+ or:
+
+ sethi <some immediate>, %g1
+ sethi <some immediate>, %g4
+ sub %sp, %g1, %g1
+
+ or:
+
+ sethi <some immediate>, %g1
+ sub %sp, %g1, %g1
+ sethi <some immediate>, %g4
+
+ If the optional instruction is found (setting g4), assume that a
+ probing loop will follow. */
+
+ /* sethi <some immediate>, %g1 */
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
if (!(X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 1))
return start_pc;
- /* sub %sp, %g1, %g1 */
+ /* optional: sethi <some immediate>, %g4 */
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
+ if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4)
+ {
+ probing_loop = 1;
+ insn = sparc_fetch_instruction (pc);
+ pc = pc + 4;
+ }
+
+ /* sub %sp, %g1, %g1 */
if (!(X_OP (insn) == 2 && X_OP3 (insn) == 0x4 && !X_I(insn)
&& X_RD (insn) == 1 && X_RS1 (insn) == 14 && X_RS2 (insn) == 1))
return start_pc;
@@ -629,6 +656,14 @@ sparc_skip_stack_check (const CORE_ADDR start_pc)
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
+ /* optional: sethi <some immediate>, %g4 */
+ if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4)
+ {
+ probing_loop = 1;
+ insn = sparc_fetch_instruction (pc);
+ pc = pc + 4;
+ }
+
/* First possible sequence:
[first two instructions above]
clr [%g1 - some immediate] */
@@ -680,22 +715,21 @@ sparc_skip_stack_check (const CORE_ADDR start_pc)
}
/* Third sequence: A probing loop.
- [first two instructions above]
- sethi <some immediate>, %g4
+ [first three instructions above]
sub %g1, %g4, %g4
cmp %g1, %g4
be <disp>
add %g1, -<some immediate>, %g1
ba <disp>
clr [%g1]
+
+ And an optional last probe for the remainder:
+
clr [%g4 - some immediate] */
- /* sethi <some immediate>, %g4 */
- else if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4)
+ if (probing_loop)
{
/* sub %g1, %g4, %g4 */
- insn = sparc_fetch_instruction (pc);
- pc = pc + 4;
if (!(X_OP (insn) == 2 && X_OP3 (insn) == 0x4 && !X_I(insn)
&& X_RD (insn) == 4 && X_RS1 (insn) == 1 && X_RS2 (insn) == 4))
return start_pc;
@@ -726,22 +760,24 @@ sparc_skip_stack_check (const CORE_ADDR start_pc)
if (!(X_OP (insn) == 0 && X_COND (insn) == 0x8))
return start_pc;
- /* clr [%g1] */
+ /* clr [%g1] (st %g0, [%g1] or st %g0, [%g1+0]) */
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
- if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4 && !X_I(insn)
- && X_RD (insn) == 0 && X_RS1 (insn) == 1))
+ if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4
+ && X_RD (insn) == 0 && X_RS1 (insn) == 1
+ && (!X_I(insn) || X_SIMM13 (insn) == 0)))
return start_pc;
- /* clr [%g4 - some immediate] */
+ /* We found a valid stack-check sequence, return the new PC. */
+
+ /* optional: clr [%g4 - some immediate] */
insn = sparc_fetch_instruction (pc);
pc = pc + 4;
if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4 && X_I(insn)
&& X_RS1 (insn) == 4 && X_RD (insn) == 0))
- return start_pc;
-
- /* We found a valid stack-check sequence, return the new PC. */
- return pc;
+ return pc - 4;
+ else
+ return pc;
}
/* No stack check code in our prologue, return the start_pc. */
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RFA] sparc-solaris stack-checking - new prologue sequence
2011-05-19 10:17 ` Jerome Guitton
@ 2011-05-20 17:32 ` Mark Kettenis
2011-05-23 16:38 ` Jerome Guitton
0 siblings, 1 reply; 6+ messages in thread
From: Mark Kettenis @ 2011-05-20 17:32 UTC (permalink / raw)
To: guitton; +Cc: gdb-patches
> Date: Thu, 19 May 2011 12:17:11 +0200
> From: Jerome Guitton <guitton@adacore.com>
>
> Mark Kettenis (mark.kettenis@xs4all.nl):
>
> > I had wanted to give this a spin on OpenBSD/sparc, but unfortunately
> > my SS20 seems to have hardware issues. Origionally I thought the
> > changes were restricted to 32-bit code. But it seems this code is use
> > for 64-bit code as well. So I'll give this a spin on an
> > OpenBSD/sparc64 machine tonight.
>
> OK, perfect. Thank you.
No regressions on OpenBSD/sparc64. Don't know enough about GCC to
judge whether these instructions are really part of the prologue, but
this looks somewhat sane. So go ahead.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RFA] sparc-solaris stack-checking - new prologue sequence
2011-05-20 17:32 ` Mark Kettenis
@ 2011-05-23 16:38 ` Jerome Guitton
0 siblings, 0 replies; 6+ messages in thread
From: Jerome Guitton @ 2011-05-23 16:38 UTC (permalink / raw)
To: Mark Kettenis; +Cc: gdb-patches
Mark Kettenis (mark.kettenis@xs4all.nl):
> No regressions on OpenBSD/sparc64. Don't know enough about GCC to
> judge whether these instructions are really part of the prologue, but
> this looks somewhat sane. So go ahead.
OK, thank you! Now committed.
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2011-05-23 16:38 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-05-06 0:46 [RFA] sparc-solaris stack-checking - new prologue sequence Jerome Guitton
2011-05-19 9:20 ` Jerome Guitton
2011-05-19 9:44 ` Mark Kettenis
2011-05-19 10:17 ` Jerome Guitton
2011-05-20 17:32 ` Mark Kettenis
2011-05-23 16:38 ` Jerome Guitton
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