From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30357 invoked by alias); 19 May 2011 10:17:39 -0000 Received: (qmail 30324 invoked by uid 22791); 19 May 2011 10:17:36 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from mel.act-europe.fr (HELO mel.act-europe.fr) (194.98.77.210) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 19 May 2011 10:17:16 +0000 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id 41B7ACB0257; Thu, 19 May 2011 12:17:14 +0200 (CEST) Received: from mel.act-europe.fr ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id WcV0amqqFEda; Thu, 19 May 2011 12:17:11 +0200 (CEST) Received: from province.act-europe.fr (province.act-europe.fr [10.10.0.214]) by mel.act-europe.fr (Postfix) with ESMTP id 44404CB01E5; Thu, 19 May 2011 12:17:11 +0200 (CEST) Received: by province.act-europe.fr (Postfix, from userid 560) id 36B11164814; Thu, 19 May 2011 12:17:11 +0200 (CEST) Date: Thu, 19 May 2011 10:17:00 -0000 From: Jerome Guitton To: Mark Kettenis Cc: gdb-patches@sourceware.org Subject: Re: [RFA] sparc-solaris stack-checking - new prologue sequence Message-ID: <20110519101711.GT66900@adacore.com> References: <1304642774-21950-1-git-send-email-guitton@adacore.com> <20110519092016.GC64873@adacore.com> <201105190943.p4J9hkTv026774@glazunov.sibelius.xs4all.nl> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="ZwgA9U+XZDXt4+m+" Content-Disposition: inline In-Reply-To: <201105190943.p4J9hkTv026774@glazunov.sibelius.xs4all.nl> User-Agent: Mutt/1.5.17 (2007-11-01) Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2011-05/txt/msg00433.txt.bz2 --ZwgA9U+XZDXt4+m+ Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-length: 644 Mark Kettenis (mark.kettenis@xs4all.nl): > I had wanted to give this a spin on OpenBSD/sparc, but unfortunately > my SS20 seems to have hardware issues. Origionally I thought the > changes were restricted to 32-bit code. But it seems this code is use > for 64-bit code as well. So I'll give this a spin on an > OpenBSD/sparc64 machine tonight. OK, perfect. Thank you. In any case, I have fixed the space inconsistencies that I introduced; the new patch is in attachment. I noticed that there are other inconsistencies that are worth fixing in sparc_skip_stack_check (on clr instructions in particular); I'll do that on a separate patch. --ZwgA9U+XZDXt4+m+ Content-Type: text/x-diff; charset=us-ascii Content-Disposition: attachment; filename="sparc-tdep.diff" Content-length: 4298 gdb/ChangeLog: * sparc-tdep.c (sparc_skip_stack_check): Recognize a new instruction sequence for probing loops. diff --git a/gdb/sparc-tdep.c b/gdb/sparc-tdep.c index 1039bd8..87d6f76 100644 --- a/gdb/sparc-tdep.c +++ b/gdb/sparc-tdep.c @@ -609,19 +609,46 @@ sparc_skip_stack_check (const CORE_ADDR start_pc) CORE_ADDR pc = start_pc; unsigned long insn; int offset_stack_checking_sequence = 0; + int probing_loop = 0; /* With GCC, all stack checking sequences begin with the same two - instructions. */ + instructions, plus an optional one in the case of a probing loop: - /* sethi ,%g1 */ + sethi , %g1 + sub %sp, %g1, %g1 + + or: + + sethi , %g1 + sethi , %g4 + sub %sp, %g1, %g1 + + or: + + sethi , %g1 + sub %sp, %g1, %g1 + sethi , %g4 + + If the optional instruction is found (setting g4), assume that a + probing loop will follow. */ + + /* sethi , %g1 */ insn = sparc_fetch_instruction (pc); pc = pc + 4; if (!(X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 1)) return start_pc; - /* sub %sp, %g1, %g1 */ + /* optional: sethi , %g4 */ insn = sparc_fetch_instruction (pc); pc = pc + 4; + if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4) + { + probing_loop = 1; + insn = sparc_fetch_instruction (pc); + pc = pc + 4; + } + + /* sub %sp, %g1, %g1 */ if (!(X_OP (insn) == 2 && X_OP3 (insn) == 0x4 && !X_I(insn) && X_RD (insn) == 1 && X_RS1 (insn) == 14 && X_RS2 (insn) == 1)) return start_pc; @@ -629,6 +656,14 @@ sparc_skip_stack_check (const CORE_ADDR start_pc) insn = sparc_fetch_instruction (pc); pc = pc + 4; + /* optional: sethi , %g4 */ + if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4) + { + probing_loop = 1; + insn = sparc_fetch_instruction (pc); + pc = pc + 4; + } + /* First possible sequence: [first two instructions above] clr [%g1 - some immediate] */ @@ -680,22 +715,21 @@ sparc_skip_stack_check (const CORE_ADDR start_pc) } /* Third sequence: A probing loop. - [first two instructions above] - sethi , %g4 + [first three instructions above] sub %g1, %g4, %g4 cmp %g1, %g4 be add %g1, -, %g1 ba clr [%g1] + + And an optional last probe for the remainder: + clr [%g4 - some immediate] */ - /* sethi , %g4 */ - else if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4) + if (probing_loop) { /* sub %g1, %g4, %g4 */ - insn = sparc_fetch_instruction (pc); - pc = pc + 4; if (!(X_OP (insn) == 2 && X_OP3 (insn) == 0x4 && !X_I(insn) && X_RD (insn) == 4 && X_RS1 (insn) == 1 && X_RS2 (insn) == 4)) return start_pc; @@ -726,22 +760,24 @@ sparc_skip_stack_check (const CORE_ADDR start_pc) if (!(X_OP (insn) == 0 && X_COND (insn) == 0x8)) return start_pc; - /* clr [%g1] */ + /* clr [%g1] (st %g0, [%g1] or st %g0, [%g1+0]) */ insn = sparc_fetch_instruction (pc); pc = pc + 4; - if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4 && !X_I(insn) - && X_RD (insn) == 0 && X_RS1 (insn) == 1)) + if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4 + && X_RD (insn) == 0 && X_RS1 (insn) == 1 + && (!X_I(insn) || X_SIMM13 (insn) == 0))) return start_pc; - /* clr [%g4 - some immediate] */ + /* We found a valid stack-check sequence, return the new PC. */ + + /* optional: clr [%g4 - some immediate] */ insn = sparc_fetch_instruction (pc); pc = pc + 4; if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4 && X_I(insn) && X_RS1 (insn) == 4 && X_RD (insn) == 0)) - return start_pc; - - /* We found a valid stack-check sequence, return the new PC. */ - return pc; + return pc - 4; + else + return pc; } /* No stack check code in our prologue, return the start_pc. */ --ZwgA9U+XZDXt4+m+--