[PATCH] FR-V: Improve handling of SPR registers

[PATCH] FR-V: Improve handling of SPR registers

[Kevin Buettner]

The patch below depends on some work that Dave Brolley has done on the
simulator.  I'll commit the change below after Dave commits his patch.

I'll eventually provide a pseudo-register for obtaining access iacc0
as a unit (instead of separate upper and lower halves).  But, before
that happens, I have some more de-deprecation to do first.

Of all the SPRs the FR-V has, the simulator had only implemented
support for fetching / setting the link register.  Dave's patch will
provide GDB with the ability to access all of them, making it very
easy to add support for other SPRs from GDB.  The patch below (in
conjunction with Dave's patch) will enable support for all of the
SPRs presently known to GDB (including iacc0).

I had considered (attempting) to provide support for all known FR-V
SPRs from GDB, but there were a number of drawbacks with doing this:
1) The g/G packet would get very large.  2) There are a lot of "holes"
in the register set do to reserved registers, unimplemented registers,
and the like.  3) I don't think it makes sense for all of the remaining
registers to be fetched/set via g/G packets.

Kevin

	* frv-tdep.c (gdb_assert.h, sim-regno.h, opcodes/frv-desc.h):
	Include.
	(iacc0h_regnum, iacc0l_regnum): Define.
	(last_spr_regnum, frv_num_regs): Update.
	(new_variant): Don't supply default names for holes in the SPRs.
	Supply names for iacc0h_regnum and iacc0l_regnum.
	(frv_register_type): Use symbolic constants first_fpr_regnum and
	last_fpr_regnum instead of hardcoded constants 64 and 127.  Use
	builtin_type_int instead of builtin_type_int32.
	(frv_register_sim_regno): New function.
	(frv_gdbarch_init): Call set_gdbarch_register_sim_regno().
	* Makefile.in (frv-tdep.o): Update dependencies.

Index: Makefile.in
===================================================================
RCS file: /cvs/src/src/gdb/Makefile.in,v
retrieving revision 1.463
diff -u -p -r1.463 Makefile.in
--- Makefile.in	24 Oct 2003 20:24:05 -0000	1.463
+++ Makefile.in	31 Oct 2003 00:14:29 -0000
@@ -588,6 +588,7 @@ demangle_h =    $(INCLUDE_DIR)/demangle.
 obstack_h =     $(INCLUDE_DIR)/obstack.h
 opcode_m68hc11_h = $(INCLUDE_DIR)/opcode/m68hc11.h
 readline_h = 	$(READLINE_SRC)/readline.h
+frv_desc_h =	$(OPCODES_SRC)/frv-desc.h
 sh_opc_h = 	$(OPCODES_SRC)/sh-opc.h
 gdb_sim_arm_h =	$(INCLUDE_DIR)/gdb/sim-arm.h
 gdb_sim_d10v_h = $(INCLUDE_DIR)/gdb/sim-d10v.h
@@ -1773,7 +1774,8 @@ frame-unwind.o: frame-unwind.c $(defs_h)
 	$(gdb_assert_h) $(dummy_frame_h)
 frv-tdep.o: frv-tdep.c $(defs_h) $(gdb_string_h) $(inferior_h) $(symfile_h) \
 	$(gdbcore_h) $(arch_utils_h) $(regcache_h) $(frame_h) \
-	$(frame_unwind_h) $(frame_base_h) $(trad_frame_h) $(dis_asm_h)
+	$(frame_unwind_h) $(frame_base_h) $(trad_frame_h) $(dis_asm_h) \
+	$(gdb_assert_h) $(sim_regno_h) $(frv_desc_h)
 f-typeprint.o: f-typeprint.c $(defs_h) $(gdb_obstack_h) $(bfd_h) $(symtab_h) \
 	$(gdbtypes_h) $(expression_h) $(value_h) $(gdbcore_h) $(target_h) \
 	$(f_lang_h) $(gdb_string_h)
Index: frv-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/frv-tdep.c,v
retrieving revision 1.57
diff -u -p -r1.57 frv-tdep.c
--- frv-tdep.c	27 Oct 2003 06:30:49 -0000	1.57
+++ frv-tdep.c	31 Oct 2003 00:14:29 -0000
@@ -30,6 +30,9 @@
 #include "frame-base.h"
 #include "trad-frame.h"
 #include "dis-asm.h"
+#include "gdb_assert.h"
+#include "sim-regno.h"
+#include "opcodes/frv-desc.h"	/* for the H_SPR_... enums */
 
 extern void _initialize_frv_tdep (void);
 
@@ -45,12 +48,9 @@ static gdbarch_frameless_function_invoca
 static gdbarch_deprecated_push_arguments_ftype frv_push_arguments;
 static gdbarch_deprecated_saved_pc_after_call_ftype frv_saved_pc_after_call;
 
-/* Register numbers.  You can change these as needed, but don't forget
-   to update the simulator accordingly.  */
+/* Register numbers.  The order in which these appear define the
+   remote protocol, so take care in changing them.  */
 enum {
-  /* The total number of registers we know exist.  */
-  frv_num_regs = 147,
-
   /* Register numbers 0 -- 63 are always reserved for general-purpose
      registers.  The chip at hand may have less.  */
   first_gpr_regnum = 0,
@@ -64,10 +64,12 @@ enum {
   first_fpr_regnum = 64,
   last_fpr_regnum = 127,
 
-  /* Register numbers 128 on up are always reserved for special-purpose
-     registers.  */
-  first_spr_regnum = 128,
+  /* The PC register.  */
   pc_regnum = 128,
+
+  /* Register numbers 129 on up are always reserved for special-purpose
+     registers.  */
+  first_spr_regnum = 129,
   psr_regnum = 129,
   ccr_regnum = 130,
   cccr_regnum = 131,
@@ -79,7 +81,12 @@ enum {
   dbar3_regnum = 140,
   lr_regnum = 145,
   lcr_regnum = 146,
-  last_spr_regnum = 146
+  iacc0h_regnum = 147,
+  iacc0l_regnum = 148,
+  last_spr_regnum = 148,
+
+  /* The total number of registers we know exist.  */
+  frv_num_regs = last_spr_regnum + 1
 };
 
 static LONGEST frv_call_dummy_words[] =
@@ -159,13 +166,8 @@ new_variant (void)
   for (r = 0; r < frv_num_regs; r++)
     var->register_names[r] = "";
 
-  /* Do, however, supply default names for the special-purpose
+  /* Do, however, supply default names for the known special-purpose
      registers.  */
-  for (r = first_spr_regnum; r <= last_spr_regnum; ++r)
-    {
-      sprintf (buf, "x%d", r);
-      var->register_names[r] = xstrdup (buf);
-    }
 
   var->register_names[pc_regnum] = "pc";
   var->register_names[lr_regnum] = "lr";
@@ -183,6 +185,10 @@ new_variant (void)
   var->register_names[dbar2_regnum] = "dbar2";
   var->register_names[dbar3_regnum] = "dbar3";
 
+  /* iacc0 (Only found on MB93405.)  */
+  var->register_names[iacc0h_regnum] = "iacc0h";
+  var->register_names[iacc0l_regnum] = "iacc0l";
+
   return var;
 }
 
@@ -236,13 +242,14 @@ frv_register_name (int reg)
   return CURRENT_VARIANT->register_names[reg];
 }
 
+
 static struct type *
 frv_register_type (struct gdbarch *gdbarch, int reg)
 {
-  if (reg >= 64 && reg <= 127)
+  if (reg >= first_fpr_regnum && reg <= last_fpr_regnum)
     return builtin_type_float;
   else
-    return builtin_type_int;
+    return builtin_type_int32;
 }
 
 static int
@@ -251,6 +258,60 @@ frv_register_byte (int reg)
   return (reg * 4);
 }
 
+static int
+frv_register_sim_regno (int reg)
+{
+  static const int spr_map[] =
+    {
+      H_SPR_PSR,		/* psr_regnum */
+      H_SPR_CCR,		/* ccr_regnum */
+      H_SPR_CCCR,		/* cccr_regnum */
+      -1,			/* 132 */
+      -1,			/* 133 */
+      -1,			/* 134 */
+      H_SPR_TBR,		/* tbr_regnum */
+      H_SPR_BRR,		/* brr_regnum */
+      H_SPR_DBAR0,		/* dbar0_regnum */
+      H_SPR_DBAR1,		/* dbar1_regnum */
+      H_SPR_DBAR2,		/* dbar2_regnum */
+      H_SPR_DBAR3,		/* dbar3_regnum */
+      -1,			/* 141 */
+      -1,			/* 142 */
+      -1,			/* 143 */
+      -1,			/* 144 */
+      H_SPR_LR,			/* lr_regnum */
+      H_SPR_LCR,		/* lcr_regnum */
+      H_SPR_IACC0H,		/* iacc0h_regnum */
+      H_SPR_IACC0L		/* iacc0l_regnum */
+    };
+
+  gdb_assert (reg >= 0 && reg < NUM_REGS);
+
+  if (reg < first_spr_regnum)
+    return reg;
+  else if (reg >= first_spr_regnum
+           && reg < first_spr_regnum + sizeof (spr_map) / sizeof (spr_map[0]))
+    {
+      int spr_reg = spr_map[reg - first_spr_regnum];
+
+      if (spr_reg < 0)
+	return SIM_REGNO_DOES_NOT_EXIST;
+      else
+	{
+	  /* More precisely, the following line of code should be
+
+	       return SPR_REGNUM_MIN + spr_reg;
+
+	     where SPR_REGNUM_MIN is obtained from sim/frv/frv-sim.h.
+	     However, first_spr_regnum is intended to match this value,
+	     so that's what we use.  */
+	  return first_spr_regnum + spr_reg;
+	}
+    }
+
+  internal_error (__FILE__, __LINE__, "Bad register number %d", reg);
+}
+
 static const unsigned char *
 frv_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenp)
 {
@@ -1138,6 +1199,7 @@ frv_gdbarch_init (struct gdbarch_info in
   set_gdbarch_register_name (gdbarch, frv_register_name);
   set_gdbarch_deprecated_register_byte (gdbarch, frv_register_byte);
   set_gdbarch_register_type (gdbarch, frv_register_type);
+  set_gdbarch_register_sim_regno (gdbarch, frv_register_sim_regno);
 
   set_gdbarch_skip_prologue (gdbarch, frv_skip_prologue);
   set_gdbarch_breakpoint_from_pc (gdbarch, frv_breakpoint_from_pc);

Re: [PATCH] FR-V: Improve handling of SPR registers

[Andrew Cagney]

> +#include "gdb_assert.h"
> +#include "sim-regno.h"
> +#include "opcodes/frv-desc.h"	/* for the H_SPR_... enums */

Kevin, the FRV should add include/gdb/sim-frv.h and that should contain 
the published gdb<->sim register numbers.

Andrew

Re: [PATCH] FR-V: Improve handling of SPR registers

[Dave Brolley]

[-- Attachment #1: Type: text/plain, Size: 1251 bytes --]

This is the patch to which Kevin refers below. I've committed it.

Dave

Kevin Buettner wrote:

>The patch below depends on some work that Dave Brolley has done on the
>simulator.  I'll commit the change below after Dave commits his patch.
>
>I'll eventually provide a pseudo-register for obtaining access iacc0
>as a unit (instead of separate upper and lower halves).  But, before
>that happens, I have some more de-deprecation to do first.
>
>Of all the SPRs the FR-V has, the simulator had only implemented
>support for fetching / setting the link register.  Dave's patch will
>provide GDB with the ability to access all of them, making it very
>easy to add support for other SPRs from GDB.  The patch below (in
>conjunction with Dave's patch) will enable support for all of the
>SPRs presently known to GDB (including iacc0).
>
>I had considered (attempting) to provide support for all known FR-V
>SPRs from GDB, but there were a number of drawbacks with doing this:
>1) The g/G packet would get very large.  2) There are a lot of "holes"
>in the register set do to reserved registers, unimplemented registers,
>and the like.  3) I don't think it makes sense for all of the remaining
>registers to be fetched/set via g/G packets.
>
>Kevin
>
>  
>

[-- Attachment #2: sim-spr.ChangeLog --]
[-- Type: text/plain, Size: 446 bytes --]

2003-10-31  Dave Brolley  <brolley@redhat.com>

        * frv-sim.h (REGNUM_LR): Removed.
        (SPR_REGNUM_MIN,SPR_REGNUM_MAX): New macros.
        * frv.c (frvbf_fetch_register): Fetch SPR registers based on
        SPR_REGNUM_MIN and SPR_REGNUM_MAX. Check whether SPRs are implemented.
        Return 0 for an unimplemented register. Return the length of the data
        for an implemented register.
        (frvbf_store_register): Ditto.


[-- Attachment #3: sim-spr.patch.txt --]
[-- Type: text/plain, Size: 3029 bytes --]

Index: sim/frv/frv-sim.h
===================================================================
RCS file: /cvs/src/src/sim/frv/frv-sim.h,v
retrieving revision 1.3
diff -c -p -r1.3 frv-sim.h
*** sim/frv/frv-sim.h	8 Oct 2003 18:19:32 -0000	1.3
--- sim/frv/frv-sim.h	31 Oct 2003 18:18:42 -0000
*************** with this program; if not, write to the 
*** 33,39 ****
  #define GR_REGNUM_MAX	63
  #define FR_REGNUM_MAX  127
  #define PC_REGNUM      128
! #define LR_REGNUM      145
  
  /* Initialization of the frv cpu.  */
  void frv_initialize (SIM_CPU *, SIM_DESC);
--- 33,40 ----
  #define GR_REGNUM_MAX	63
  #define FR_REGNUM_MAX  127
  #define PC_REGNUM      128
! #define SPR_REGNUM_MIN 129
! #define SPR_REGNUM_MAX (SPR_REGNUM_MIN + 4096 - 1)
  
  /* Initialization of the frv cpu.  */
  void frv_initialize (SIM_CPU *, SIM_DESC);
Index: sim/frv/frv.c
===================================================================
RCS file: /cvs/src/src/sim/frv/frv.c,v
retrieving revision 1.3
diff -c -p -r1.3 frv.c
*** sim/frv/frv.c	8 Oct 2003 18:19:32 -0000	1.3
--- sim/frv/frv.c	31 Oct 2003 18:18:43 -0000
*************** frvbf_fetch_register (SIM_CPU *current_c
*** 44,55 ****
      SETTSI (buf, GET_H_FR (rn - GR_REGNUM_MAX - 1));
    else if (rn == PC_REGNUM)
      SETTSI (buf, GET_H_PC ());
!   else if (rn == LR_REGNUM)
!     SETTSI (buf, GET_H_SPR (H_SPR_LR));
    else
!     SETTSI (buf, 0xdeadbeef);
  
!   return -1;
  }
  
  /* The contents of BUF are in target byte order.  */
--- 44,65 ----
      SETTSI (buf, GET_H_FR (rn - GR_REGNUM_MAX - 1));
    else if (rn == PC_REGNUM)
      SETTSI (buf, GET_H_PC ());
!   else if (rn >= SPR_REGNUM_MIN && rn <= SPR_REGNUM_MAX)
!     {
!       /* Make sure the register is implemented.  */
!       FRV_REGISTER_CONTROL *control = CPU_REGISTER_CONTROL (current_cpu);
!       int spr = rn - SPR_REGNUM_MIN;
!       if (! control->spr[spr].implemented)
! 	return 0;
!       SETTSI (buf, GET_H_SPR (spr));
!     }
    else
!     {
!       SETTSI (buf, 0xdeadbeef);
!       return 0;
!     }
  
!   return len;
  }
  
  /* The contents of BUF are in target byte order.  */
*************** frvbf_store_register (SIM_CPU *current_c
*** 63,72 ****
      SET_H_FR (rn - GR_REGNUM_MAX - 1, GETTSI (buf));
    else if (rn == PC_REGNUM)
      SET_H_PC (GETTSI (buf));
!   else if (rn == LR_REGNUM)
!     SET_H_SPR (H_SPR_LR, GETTSI (buf));
  
!   return -1;
  }
  \f
  /* Cover fns to access the general registers.  */
--- 73,91 ----
      SET_H_FR (rn - GR_REGNUM_MAX - 1, GETTSI (buf));
    else if (rn == PC_REGNUM)
      SET_H_PC (GETTSI (buf));
!   else if (rn >= SPR_REGNUM_MIN && rn <= SPR_REGNUM_MAX)
!     {
!       /* Make sure the register is implemented.  */
!       FRV_REGISTER_CONTROL *control = CPU_REGISTER_CONTROL (current_cpu);
!       int spr = rn - SPR_REGNUM_MIN;
!       if (! control->spr[spr].implemented)
! 	return 0;
!       SET_H_SPR (spr, GETTSI (buf));
!     }
!   else
!     return 0;
  
!   return len;
  }
  \f
  /* Cover fns to access the general registers.  */

Re: [PATCH] FR-V: Improve handling of SPR registers

[Kevin Buettner]

On Oct 30,  5:42pm, Kevin Buettner wrote:

> The patch below depends on some work that Dave Brolley has done on the
> simulator.  I'll commit the change below after Dave commits his patch.

Dave committed his patch earlier today.

My patch had (and still has) the following line:

+#include "opcodes/frv-desc.h"	/* for the H_SPR_... enums */

Andrew pointed out that the file include/gdb/sim-frv.h should
be used to determine the gdb<->sim register numbers.  I've just
added this file and I've added a #include for it in frv-tdep.c.
I've updated frv_register_sim_regno() to use these constants.

opcodes/frv-desc.h is still included in order to calculate particular
SPR numbers.  The H_SPR_ offsets (from opcodes/frv-desc.h) are added
to SIM_FRV_SPR0_REGNUM (from include/gdb/sim-frv.h) to calculate SPR
numbers used for gdb<->sim interactions.  I've noted this fact in the
new header file, include/gdb/sim-frv.h.

It would be possible to add precalculated constants for the SPRs to
include/gdb/sim-frv.h.  However, I don't think this is a good idea
due to the maintenance difficulties associated with keeping this file
in sync with opcodes/frv-desc.h.

Here's what I ended up committing...

	* frv-tdep.c (gdb_assert.h, sim-regno.h, gdb/sim-frv.h)
	(opcodes/frv-desc.h): Include.
	(iacc0h_regnum, iacc0l_regnum): Define.
	(last_spr_regnum, frv_num_regs): Update.
	(new_variant): Don't supply default names for holes in the SPRs.
	Supply names for iacc0h_regnum and iacc0l_regnum.
	(frv_register_type): Use symbolic constants first_fpr_regnum and
	last_fpr_regnum instead of hardcoded constants 64 and 127.  Use
	builtin_type_int instead of builtin_type_int32.
	(frv_register_sim_regno): New function.
	(frv_gdbarch_init): Call set_gdbarch_register_sim_regno().
	* Makefile.in (gdb_sim_frv_h): Define.
	(frv-tdep.o): Update dependencies.

Index: Makefile.in
===================================================================
RCS file: /cvs/src/src/gdb/Makefile.in,v
retrieving revision 1.466
diff -u -p -r1.466 Makefile.in
--- Makefile.in	31 Oct 2003 21:13:45 -0000	1.466
+++ Makefile.in	1 Nov 2003 01:37:20 -0000
@@ -590,9 +590,11 @@ demangle_h =    $(INCLUDE_DIR)/demangle.
 obstack_h =     $(INCLUDE_DIR)/obstack.h
 opcode_m68hc11_h = $(INCLUDE_DIR)/opcode/m68hc11.h
 readline_h = 	$(READLINE_SRC)/readline.h
+frv_desc_h =	$(OPCODES_SRC)/frv-desc.h
 sh_opc_h = 	$(OPCODES_SRC)/sh-opc.h
 gdb_sim_arm_h =	$(INCLUDE_DIR)/gdb/sim-arm.h
 gdb_sim_d10v_h = $(INCLUDE_DIR)/gdb/sim-d10v.h
+gdb_sim_frv_h = $(INCLUDE_DIR)/gdb/sim-frv.h
 gdb_sim_sh_h =	$(INCLUDE_DIR)/gdb/sim-sh.h
 splay_tree_h =  $(INCLUDE_DIR)/splay-tree.h
 
@@ -1780,7 +1782,8 @@ frame-unwind.o: frame-unwind.c $(defs_h)
 	$(gdb_assert_h) $(dummy_frame_h)
 frv-tdep.o: frv-tdep.c $(defs_h) $(gdb_string_h) $(inferior_h) $(symfile_h) \
 	$(gdbcore_h) $(arch_utils_h) $(regcache_h) $(frame_h) \
-	$(frame_unwind_h) $(frame_base_h) $(trad_frame_h) $(dis_asm_h)
+	$(frame_unwind_h) $(frame_base_h) $(trad_frame_h) $(dis_asm_h) \
+	$(gdb_assert_h) $(sim_regno_h) $(gdb_sim_frv_h) $(frv_desc_h)
 f-typeprint.o: f-typeprint.c $(defs_h) $(gdb_obstack_h) $(bfd_h) $(symtab_h) \
 	$(gdbtypes_h) $(expression_h) $(value_h) $(gdbcore_h) $(target_h) \
 	$(f_lang_h) $(gdb_string_h)
Index: frv-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/frv-tdep.c,v
retrieving revision 1.57
diff -u -p -r1.57 frv-tdep.c
--- frv-tdep.c	27 Oct 2003 06:30:49 -0000	1.57
+++ frv-tdep.c	1 Nov 2003 01:37:20 -0000
@@ -30,6 +30,10 @@
 #include "frame-base.h"
 #include "trad-frame.h"
 #include "dis-asm.h"
+#include "gdb_assert.h"
+#include "sim-regno.h"
+#include "gdb/sim-frv.h"
+#include "opcodes/frv-desc.h"	/* for the H_SPR_... enums */
 
 extern void _initialize_frv_tdep (void);
 
@@ -45,12 +49,9 @@ static gdbarch_frameless_function_invoca
 static gdbarch_deprecated_push_arguments_ftype frv_push_arguments;
 static gdbarch_deprecated_saved_pc_after_call_ftype frv_saved_pc_after_call;
 
-/* Register numbers.  You can change these as needed, but don't forget
-   to update the simulator accordingly.  */
+/* Register numbers.  The order in which these appear define the
+   remote protocol, so take care in changing them.  */
 enum {
-  /* The total number of registers we know exist.  */
-  frv_num_regs = 147,
-
   /* Register numbers 0 -- 63 are always reserved for general-purpose
      registers.  The chip at hand may have less.  */
   first_gpr_regnum = 0,
@@ -64,10 +65,12 @@ enum {
   first_fpr_regnum = 64,
   last_fpr_regnum = 127,
 
-  /* Register numbers 128 on up are always reserved for special-purpose
-     registers.  */
-  first_spr_regnum = 128,
+  /* The PC register.  */
   pc_regnum = 128,
+
+  /* Register numbers 129 on up are always reserved for special-purpose
+     registers.  */
+  first_spr_regnum = 129,
   psr_regnum = 129,
   ccr_regnum = 130,
   cccr_regnum = 131,
@@ -79,7 +82,12 @@ enum {
   dbar3_regnum = 140,
   lr_regnum = 145,
   lcr_regnum = 146,
-  last_spr_regnum = 146
+  iacc0h_regnum = 147,
+  iacc0l_regnum = 148,
+  last_spr_regnum = 148,
+
+  /* The total number of registers we know exist.  */
+  frv_num_regs = last_spr_regnum + 1
 };
 
 static LONGEST frv_call_dummy_words[] =
@@ -159,13 +167,8 @@ new_variant (void)
   for (r = 0; r < frv_num_regs; r++)
     var->register_names[r] = "";
 
-  /* Do, however, supply default names for the special-purpose
+  /* Do, however, supply default names for the known special-purpose
      registers.  */
-  for (r = first_spr_regnum; r <= last_spr_regnum; ++r)
-    {
-      sprintf (buf, "x%d", r);
-      var->register_names[r] = xstrdup (buf);
-    }
 
   var->register_names[pc_regnum] = "pc";
   var->register_names[lr_regnum] = "lr";
@@ -183,6 +186,10 @@ new_variant (void)
   var->register_names[dbar2_regnum] = "dbar2";
   var->register_names[dbar3_regnum] = "dbar3";
 
+  /* iacc0 (Only found on MB93405.)  */
+  var->register_names[iacc0h_regnum] = "iacc0h";
+  var->register_names[iacc0l_regnum] = "iacc0l";
+
   return var;
 }
 
@@ -236,13 +243,14 @@ frv_register_name (int reg)
   return CURRENT_VARIANT->register_names[reg];
 }
 
+
 static struct type *
 frv_register_type (struct gdbarch *gdbarch, int reg)
 {
-  if (reg >= 64 && reg <= 127)
+  if (reg >= first_fpr_regnum && reg <= last_fpr_regnum)
     return builtin_type_float;
   else
-    return builtin_type_int;
+    return builtin_type_int32;
 }
 
 static int
@@ -251,6 +259,55 @@ frv_register_byte (int reg)
   return (reg * 4);
 }
 
+static int
+frv_register_sim_regno (int reg)
+{
+  static const int spr_map[] =
+    {
+      H_SPR_PSR,		/* psr_regnum */
+      H_SPR_CCR,		/* ccr_regnum */
+      H_SPR_CCCR,		/* cccr_regnum */
+      -1,			/* 132 */
+      -1,			/* 133 */
+      -1,			/* 134 */
+      H_SPR_TBR,		/* tbr_regnum */
+      H_SPR_BRR,		/* brr_regnum */
+      H_SPR_DBAR0,		/* dbar0_regnum */
+      H_SPR_DBAR1,		/* dbar1_regnum */
+      H_SPR_DBAR2,		/* dbar2_regnum */
+      H_SPR_DBAR3,		/* dbar3_regnum */
+      -1,			/* 141 */
+      -1,			/* 142 */
+      -1,			/* 143 */
+      -1,			/* 144 */
+      H_SPR_LR,			/* lr_regnum */
+      H_SPR_LCR,		/* lcr_regnum */
+      H_SPR_IACC0H,		/* iacc0h_regnum */
+      H_SPR_IACC0L		/* iacc0l_regnum */
+    };
+
+  gdb_assert (reg >= 0 && reg < NUM_REGS);
+
+  if (first_gpr_regnum <= reg && reg <= last_gpr_regnum)
+    return reg - first_gpr_regnum + SIM_FRV_GR0_REGNUM;
+  else if (first_fpr_regnum <= reg && reg <= last_fpr_regnum)
+    return reg - first_fpr_regnum + SIM_FRV_FR0_REGNUM;
+  else if (pc_regnum == reg)
+    return SIM_FRV_PC_REGNUM;
+  else if (reg >= first_spr_regnum
+           && reg < first_spr_regnum + sizeof (spr_map) / sizeof (spr_map[0]))
+    {
+      int spr_reg_offset = spr_map[reg - first_spr_regnum];
+
+      if (spr_reg_offset < 0)
+	return SIM_REGNO_DOES_NOT_EXIST;
+      else
+	return SIM_FRV_SPR0_REGNUM + spr_reg_offset;
+    }
+
+  internal_error (__FILE__, __LINE__, "Bad register number %d", reg);
+}
+
 static const unsigned char *
 frv_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenp)
 {
@@ -1138,6 +1195,7 @@ frv_gdbarch_init (struct gdbarch_info in
   set_gdbarch_register_name (gdbarch, frv_register_name);
   set_gdbarch_deprecated_register_byte (gdbarch, frv_register_byte);
   set_gdbarch_register_type (gdbarch, frv_register_type);
+  set_gdbarch_register_sim_regno (gdbarch, frv_register_sim_regno);
 
   set_gdbarch_skip_prologue (gdbarch, frv_skip_prologue);
   set_gdbarch_breakpoint_from_pc (gdbarch, frv_breakpoint_from_pc);