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From: Stan Shebs <shebs@cygnus.com>
To: dberlin@msn.com
Cc: jtc@redback.com, gdb@cygnus.com, jepler@inetnebr.com, jimb@cygnus.com
Subject: Re: MMX registers on x86?
Date: Wed, 14 Apr 1999 17:59:00 -0000	[thread overview]
Message-ID: <199904150058.RAA17793@andros.cygnus.com> (raw)
In-Reply-To: <001d01be8799$59947480$8d8f9780@DANIELBE>

   From: "Daniel Berlin" <dberlin@msn.com>
   Date: Thu, 15 Apr 1999 19:40:26 -0400

   However, it might be better to just add some mechanism to define "special"
   registers (Fer instance, ,3dnow/KNI/MMX) that are in some way different from
   the rest of the processor registers, be it in size/usage/whatever.
   I'm about to add KNI support to the BeOS port, as well as MMX and 3DNow
   support, and i'd rather have some standard supported way of doing it than
   making another hack that someone will have to futz with and learn the
   reasoning behind a year or two down the line.  Or when something like
   Altivec comes along, it wouldn't take major retrofitting and port hacking
   (every single target that can run on that processor with a different -nat
   file) to do.

Andrew Cagney has been working on some infrastructure that will, among
other things, greatly simplify handling of special registers and
multiple register sets.  He's supposed to send a long detailed message
to this list in a few days.  We're hoping to roll the code out into the
sources this month, give people a crack at it.

							Stan



WARNING: multiple messages have this Message-ID
From: Stan Shebs <shebs@cygnus.com>
To: dberlin@msn.com
Cc: jtc@redback.com, gdb@cygnus.com, jepler@inetnebr.com, jimb@cygnus.com
Subject: Re: MMX registers on x86?
Date: Wed, 14 Apr 1999 18:55:00 -0000	[thread overview]
Message-ID: <199904150058.RAA17793@andros.cygnus.com> (raw)
Message-ID: <19990414185500.YlBvzFOr7irZ5PgiTMherexc7pDJy-2ENIb6B0qQMSI@z> (raw)
In-Reply-To: <001d01be8799$59947480$8d8f9780@DANIELBE>

   From: "Daniel Berlin" <dberlin@msn.com>
   Date: Thu, 15 Apr 1999 19:40:26 -0400

   However, it might be better to just add some mechanism to define "special"
   registers (Fer instance, ,3dnow/KNI/MMX) that are in some way different from
   the rest of the processor registers, be it in size/usage/whatever.
   I'm about to add KNI support to the BeOS port, as well as MMX and 3DNow
   support, and i'd rather have some standard supported way of doing it than
   making another hack that someone will have to futz with and learn the
   reasoning behind a year or two down the line.  Or when something like
   Altivec comes along, it wouldn't take major retrofitting and port hacking
   (every single target that can run on that processor with a different -nat
   file) to do.

Andrew Cagney has been working on some infrastructure that will, among
other things, greatly simplify handling of special registers and
multiple register sets.  He's supposed to send a long detailed message
to this list in a few days.  We're hoping to roll the code out into the
sources this month, give people a crack at it.

							Stan


  reply	other threads:[~1999-04-14 17:59 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
1999-04-01  0:00 Jeff Epler
1999-04-12 11:41 ` Jim Blandy
1999-04-12 13:12   ` Jeff Epler
1999-04-14 14:14   ` J.T. Conklin
1999-04-14 15:18     ` J.T. Conklin
1999-04-14 16:43     ` Daniel Berlin
1999-04-14 17:59       ` Stan Shebs [this message]
1999-04-14 18:55         ` Stan Shebs

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