* SIM: Handle XScale COFF binaries
@ 2002-02-05 2:55 Nick Clifton
2002-02-05 3:05 ` Richard Earnshaw
0 siblings, 1 reply; 2+ messages in thread
From: Nick Clifton @ 2002-02-05 2:55 UTC (permalink / raw)
To: gdb-patches
Hi Guys,
I have checked in the following patch. It fixes the ARM simulator
so that COFF based XScale binaries will be correctly simulated. The
problem was that the COFF header did not have enough bits to
distinguish between the v5, v5T, v5TE and XScale architectures, and
so it was defaulting to v5, disabling the simulation of the XScale
instructions.
Cheers
Nick
2002-02-04 Nick Clifton <nickc@cambridge.redhat.com>
* wrapper.c: If a v5 architecture is detected, assume it might be
an XScale binary, since there is no way to distinguish between
the two in the COFF file format.
Index: sim/arm/wrapper.c
===================================================================
RCS file: /cvs/src/src/sim/arm/wrapper.c,v
retrieving revision 1.15
retrieving revision 1.16
diff -c -3 -p -w -r1.15 -r1.16
*** wrapper.c 2002/01/09 15:08:21 1.15
--- wrapper.c 2002/02/04 16:27:22 1.16
*************** sim_create_inferior (sd, abfd, argv, env
*** 234,239 ****
--- 234,248 ----
break;
case bfd_mach_arm_5:
+ /* This is a special case in order to support COFF based ARM toolchains.
+ The COFF header does not have enough room to store all the different
+ kinds of ARM cpu, so the XScale, v5T and v5TE architectures all default
+ to v5. (See coff_set_flags() in bdf/coffcode.h). So if we see a v5
+ machine type here, we assume it could be any of the above architectures
+ and so select the most feature-full. */
+ ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop);
+ break;
+
case bfd_mach_arm_5T:
ARMul_SelectProcessor (state, ARM_v5_Prop);
break;
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: SIM: Handle XScale COFF binaries
2002-02-05 2:55 SIM: Handle XScale COFF binaries Nick Clifton
@ 2002-02-05 3:05 ` Richard Earnshaw
0 siblings, 0 replies; 2+ messages in thread
From: Richard Earnshaw @ 2002-02-05 3:05 UTC (permalink / raw)
To: Nick Clifton; +Cc: gdb-patches, Richard.Earnshaw
> Hi Guys,
>
> I have checked in the following patch. It fixes the ARM simulator
> so that COFF based XScale binaries will be correctly simulated. The
> problem was that the COFF header did not have enough bits to
> distinguish between the v5, v5T, v5TE and XScale architectures, and
> so it was defaulting to v5, disabling the simulation of the XScale
> instructions.
>
> Cheers
> Nick
>
> 2002-02-04 Nick Clifton <nickc@cambridge.redhat.com>
>
> * wrapper.c: If a v5 architecture is detected, assume it might be
> an XScale binary, since there is no way to distinguish between
> the two in the COFF file format.
UG.
Can't we restrict this so that it only happens if we have COFF files (as
it stands ELF files will do the same as well).
R.
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