[PATCH v2 10/12] MIPS: Correct segment calculation for MIPS16 JAL/X

["Maciej W. Rozycki" <macro@orcam.me.uk>]

From: Maciej W. Rozycki <macro@globalfoundries.com>

Fix an off-by-two segment calculation bug in determining the target PC 
for MIPS16 JAL and JALX instructions in `extended_mips16_next_pc'.  The 
segment to use is determined by the address right after the instruction.  
However unlike with extended instructions while JAL and JALX are being 
decoded by said function `pc' points at the start of the instruction 
rather than beyond the EXTEND prefix.  Therefore the correct adjustment 
for `pc' is 4 rather than 2.

This bug was originally present in `add_offset_16' and not eliminated 
with the rewrite in commit 484933d11fca ("MIPS: Rewrite `add_offset_16' 
to match its name").

No testcase added as that would require 256MiB+ of target memory and a 
correspondingly large executable to be built, which seems not worth it 
for such a corner-case bug.

Approved-By: Maciej W. Rozycki <macro@orcam.me.uk>
---
New change in v2.
---
 gdb/mips-tdep.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

gdb-mips16-next-pc-jal.diff
Index: binutils-gdb/gdb/mips-tdep.c
===================================================================
--- binutils-gdb.orig/gdb/mips-tdep.c
+++ binutils-gdb/gdb/mips-tdep.c
@@ -2297,7 +2297,7 @@ extended_mips16_next_pc (regcache *regca
       {
 	struct upk_mips16 upk;
 	unpack_mips16 (gdbarch, pc, extension, insn, jalxtype, &upk);
-	pc = ((pc + 2) & (~(CORE_ADDR) 0x0fffffff)) | (upk.offset << 2);
+	pc = ((pc + 4) & (~(CORE_ADDR) 0x0fffffff)) | (upk.offset << 2);
 	if ((insn >> 10) & 0x01)	/* Exchange mode */
 	  pc = pc & ~0x01;	/* Clear low bit, indicate 32 bit mode.  */
 	else