From: "Maciej W. Rozycki" <macro@orcam.me.uk>
To: gdb-patches@sourceware.org
Cc: Jovan Dmitrovic <jovan.dmitrovic@htecgroup.com>,
Djordje Todorovic <Djordje.Todorovic@htecgroup.com>,
Milica Matic <milica.matic@htecgroup.com>,
"Maciej W. Rozycki" <macro@globalfoundries.com>
Subject: [PATCH 4/7] MIPS: Correct BLEZL single-stepping
Date: Thu, 23 Jul 2026 19:53:00 +0100 (BST) [thread overview]
Message-ID: <alpine.DEB.2.21.2607230035130.14485@angie.orcam.me.uk> (raw)
In-Reply-To: <alpine.DEB.2.21.2607220148540.14485@angie.orcam.me.uk>
From: Maciej W. Rozycki <macro@globalfoundries.com>
Correct `mips32_next_pc' and also consider BLEZL taken for the value of
zero held in the source register as per the instruction's semantics,
restoring `less_zero_branch' label discarded with commit 54f1137d66be
and actually matching the comment present in the source.
Verification will be provided with the test cases in the next change.
Co-Authored-By: Andrew Bennett <andrew.bennett@imgtec.com>
Co-Authored-By: Matthew Fortune <matthew.fortune@mips.com>
Co-Authored-By: Faraz Shahbazker <fshahbazker@wavecomp.com>
Co-Authored-By: Milica Matic <milica.matic@htecgroup.com>
Co-Authored-By: Jovan Dmitrović <jovan.dmitrovic@htecgroup.com>
Approved-by: Maciej W. Rozycki <macro@orcam.me.uk>
---
gdb/mips-tdep.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
gdb-mips-next-pc-blezl.diff
Index: binutils-gdb/gdb/mips-tdep.c
===================================================================
--- binutils-gdb.orig/gdb/mips-tdep.c
+++ binutils-gdb/gdb/mips-tdep.c
@@ -1662,7 +1662,7 @@ mips32_next_pc (struct regcache *regcach
case 1: /* BNEL */
goto neq_branch;
case 2: /* BLEZL */
- goto less_branch;
+ goto less_equal_branch;
case 3: /* BGTZL */
goto greater_branch;
default:
@@ -1751,7 +1751,6 @@ mips32_next_pc (struct regcache *regcach
case 2: /* BLTZL */
case 16: /* BLTZAL */
case 18: /* BLTZALL */
- less_branch:
if (regcache_raw_get_signed (regcache, itype_rs (inst)) < 0)
pc += mips32_relative_offset (inst) + 4;
else
@@ -1817,6 +1816,7 @@ mips32_next_pc (struct regcache *regcach
pc += 8;
break;
case 6: /* BLEZ, BLEZL */
+ less_equal_branch:
if (regcache_raw_get_signed (regcache, itype_rs (inst)) <= 0)
pc += mips32_relative_offset (inst) + 4;
else
next prev parent reply other threads:[~2026-07-23 18:53 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-23 18:52 [PATCH 0/7] MIPS+testsuite: BLEZL stepping fix and associated test infrastructure Maciej W. Rozycki
2026-07-23 18:52 ` [PATCH 1/7] testsuite: Factor out target feature test template Maciej W. Rozycki
2026-07-23 18:52 ` [PATCH 2/7] PowerPC/testsuite: Reduce feature tests in terms of `allow_target_tests' Maciej W. Rozycki
2026-07-23 18:52 ` [PATCH 3/7] MIPS/testsuite: Verify MIPS I CPU branch stepping Maciej W. Rozycki
2026-07-23 18:53 ` Maciej W. Rozycki [this message]
2026-07-23 18:53 ` [PATCH 5/7] MIPS/testsuite: Verify MIPS II " Maciej W. Rozycki
2026-07-23 18:53 ` [PATCH 6/7] MIPS/testsuite: Verify MIPS16 " Maciej W. Rozycki
2026-07-23 18:53 ` [PATCH 7/7] MIPS: Reorder a reference to "BGTZ, BGTZL" in `mips32_next_pc' Maciej W. Rozycki
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