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From: "Maciej W. Rozycki" <macro@imgtec.com>
To: Bhushan Attarde <bhushan.attarde@imgtec.com>
Cc: <gdb-patches@sourceware.org>, <Matthew.Fortune@imgtec.com>,
	<James.Hogan@imgtec.com>, <Andrew.Bennett@imgtec.com>,
	<Jaydeep.Patil@imgtec.com>
Subject: Re: [PATCH 03/24]     regcache: handle invalidated regcache
Date: Fri, 21 Oct 2016 22:42:00 -0000	[thread overview]
Message-ID: <alpine.DEB.2.00.1610210504460.31859@tp.orcam.me.uk> (raw)
In-Reply-To: <1467038991-6600-3-git-send-email-bhushan.attarde@imgtec.com>

On Mon, 27 Jun 2016, Bhushan Attarde wrote:

>     When registers are marked as change, set a new regcache_invalidated
>     variable which is used by get_thread_regcache to decide whether to
>     recreate the gdbarch.

 Can you please be a bit more specific as to why this change is needed?

> 	gdb/ChangeLog:
> 		* regcache.c (regcache_invalidated): New variable.
> 		(set_current_thread_ptid_arch): Use regcache_invalidated to
> 		set registers_changed_p.
> 		(get_thread_regcache): Reset regcache_invalidated to 0.
> 		(registers_changed_ptid): Set regcache_invalidated to 1.

 Single-tab indentation please.

 But overall it looks like a bug fix to me, applying to 01/24 and 
addressing the assumption made there that there is only a single thread 
being debugged.  Which may have been OK for the majority of bare-metal 
cases, but certainly not for OS debugging.  So please fold this change 
into 01/24.

 But I have a concern about the implementation too.

> diff --git a/gdb/regcache.c b/gdb/regcache.c
> index c3405b6..3cbec6e 100644
> --- a/gdb/regcache.c
> +++ b/gdb/regcache.c
> @@ -489,6 +489,7 @@ struct regcache_list
>  };
>  
>  static struct regcache_list *current_regcache;
> +static int regcache_invalidated = 1;
>  
>  struct regcache *
>  get_thread_arch_aspace_regcache (ptid_t ptid, struct gdbarch *gdbarch,
> @@ -547,7 +548,7 @@ set_current_thread_ptid_arch (ptid_t ptid)
>  struct regcache *
>  get_thread_regcache (ptid_t ptid)
>  {
> -  int registers_changed_p = current_regcache == NULL;
> +  int registers_changed_p = current_regcache == NULL || regcache_invalidated;
>    struct regcache *new_regcache;
>  
>    set_current_thread_ptid_arch (ptid);
> @@ -560,6 +561,7 @@ get_thread_regcache (ptid_t ptid)
>        registers_changed ();
>        set_current_thread_ptid_arch (ptid);
>        new_regcache = get_thread_arch_regcache (ptid, current_thread_arch);
> +      regcache_invalidated = 0;
>      }
>  
>    return new_regcache;
> @@ -646,6 +648,7 @@ registers_changed_ptid (ptid_t ptid)
>  	 forget about any frames we have cached, too.  */
>        reinit_frame_cache ();
>      }
> +  regcache_invalidated = 1;
>  }

 This uses a global `regcache_invalidated' flag for what looks to me like 
a thread-specific case, i.e. you really want to set `registers_changed_p' 
above only if `ptid' thread's registers have changed.  Or in other words 
if the old regcache was gone and a new one has been allocated for `ptid' 
requested.  Yes, with the MIPS FPU topology changes in particular this may 
not matter much, but let's get this piece right for the general case, like 
multiprocess scenarios perhaps.

 So it looks to me like a better approach will be to either scan the 
regcache list from `current_regcache' to see if there's a match for `ptid' 
or to make `get_thread_arch_regcache' return additional status of the scan 
it already does.  I have no clear preference between these two choices, so 
please pick up whichever you like better or maybe a general maintainer can 
speak out.

  Maciej


  reply	other threads:[~2016-10-21 22:42 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-27 14:50 [PATCH 01/24] MIPS: Handle run-time reconfigurable FPR size Bhushan Attarde
2016-06-27 14:50 ` [PATCH 11/24] MIPS: Add support for hybrid fp32/fp64 mode Bhushan Attarde
2016-06-27 14:50 ` [PATCH 06/24] mips-linux-nat: pick fp64 target description when appropriate Bhushan Attarde
2016-06-27 14:50 ` [PATCH 03/24] regcache: handle invalidated regcache Bhushan Attarde
2016-10-21 22:42   ` Maciej W. Rozycki [this message]
2016-06-27 14:50 ` [PATCH 08/24] MIPS: Convert FP mode to enum and put fp registers into fp reggroup Bhushan Attarde
2016-06-27 14:50 ` [PATCH 10/24] MIPS: override fscr/fir types and print control registers specially Bhushan Attarde
2016-06-27 14:51 ` [PATCH 19/24] Add MIPS MSA vector branch instruction support Bhushan Attarde
2016-06-27 14:51 ` [PATCH 22/24] Support all new ABIs when detecting if an FPU is present Bhushan Attarde
2016-06-27 14:51 ` [PATCH 09/24] MIPS: Enhance cooked FP format Bhushan Attarde
2016-06-27 14:51 ` [PATCH 14/24] Implement core MSA stuff Bhushan Attarde
2016-06-27 14:51 ` [PATCH 20/24] Drop FP and MSA control registers from default info registers Bhushan Attarde
2016-06-27 14:51 ` [PATCH 12/24] o32 sigframe unwinding with FR1 Bhushan Attarde
2016-06-27 14:51 ` [PATCH 24/24] MIPS R6 forbidden slot support Bhushan Attarde
2016-06-27 14:51 ` [PATCH 05/24] MIPS: Add config5 to MIPS GDB target descriptions Bhushan Attarde
2016-06-27 14:51 ` [PATCH 21/24] MIPSR6 support for GDB Bhushan Attarde
2016-07-29 21:10   ` Maciej W. Rozycki
2016-06-27 14:51 ` [PATCH 23/24] MIPS R6 opcode table shuffle for LDC2/SDC2 Bhushan Attarde
2016-06-27 14:51 ` [PATCH 13/24] Add MIPS MSA GDB target descriptions Bhushan Attarde
2016-06-27 14:51 ` [PATCH 07/24] MIPS: Make Linux restart register more dynamic Bhushan Attarde
2016-06-27 14:51 ` [PATCH 02/24] Add MIPS32 FPU64 GDB target descriptions Bhushan Attarde
2016-10-12 12:42   ` Maciej W. Rozycki
2016-10-12 13:58     ` James Hogan
2016-10-12 16:30       ` Maciej W. Rozycki
2016-10-12 18:05         ` James Hogan
2016-10-12 22:04           ` Maciej W. Rozycki
2016-10-13 10:09             ` Matthew Fortune
2016-10-21 19:17               ` Maciej W. Rozycki
2016-10-21 19:24                 ` Maciej W. Rozycki
2016-06-27 14:51 ` [PATCH 04/24] Add MIPS Config5 register related support Bhushan Attarde
2016-06-27 14:51 ` [PATCH 18/24] mips-linux-nat: get msa registers Bhushan Attarde
2016-07-25 14:03 ` [PATCH 01/24] MIPS: Handle run-time reconfigurable FPR size Maciej W. Rozycki
2016-10-18 17:37   ` Maciej W. Rozycki
2016-11-08 19:46 ` Yao Qi
2016-11-10 12:43   ` Maciej W. Rozycki
2016-11-11 12:29     ` Yao Qi
2016-12-02  2:31       ` Maciej W. Rozycki

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