From: Bhushan Attarde <bhushan.attarde@imgtec.com>
To: <gdb-patches@sourceware.org>
Cc: <Maciej.Rozycki@imgtec.com>, <Matthew.Fortune@imgtec.com>,
<James.Hogan@imgtec.com>, <Andrew.Bennett@imgtec.com>,
<Jaydeep.Patil@imgtec.com>,
Bhushan Attarde <bhushan.attarde@imgtec.com>
Subject: [PATCH 22/24] Support all new ABIs when detecting if an FPU is present
Date: Mon, 27 Jun 2016 14:51:00 -0000 [thread overview]
Message-ID: <1467038991-6600-22-git-send-email-bhushan.attarde@imgtec.com> (raw)
In-Reply-To: <1467038991-6600-1-git-send-email-bhushan.attarde@imgtec.com>
gdb/ChangeLog:
* mips-tdep.c (mips_gdbarch_init): Handle fpxx, fp64 and
fp64a ABI's.
---
gdb/mips-tdep.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 68e00ec..d5dd668 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -10163,6 +10163,9 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
switch (elf_fpu_type)
{
case Val_GNU_MIPS_ABI_FP_DOUBLE:
+ case Val_GNU_MIPS_ABI_FP_XX:
+ case Val_GNU_MIPS_ABI_FP_64:
+ case Val_GNU_MIPS_ABI_FP_64A:
fpu_type = MIPS_FPU_DOUBLE;
break;
case Val_GNU_MIPS_ABI_FP_SINGLE:
--
1.9-rc2
next prev parent reply other threads:[~2016-06-27 14:51 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-27 14:50 [PATCH 01/24] MIPS: Handle run-time reconfigurable FPR size Bhushan Attarde
2016-06-27 14:50 ` [PATCH 10/24] MIPS: override fscr/fir types and print control registers specially Bhushan Attarde
2016-06-27 14:50 ` [PATCH 08/24] MIPS: Convert FP mode to enum and put fp registers into fp reggroup Bhushan Attarde
2016-06-27 14:50 ` [PATCH 03/24] regcache: handle invalidated regcache Bhushan Attarde
2016-10-21 22:42 ` Maciej W. Rozycki
2016-06-27 14:50 ` [PATCH 06/24] mips-linux-nat: pick fp64 target description when appropriate Bhushan Attarde
2016-06-27 14:50 ` [PATCH 11/24] MIPS: Add support for hybrid fp32/fp64 mode Bhushan Attarde
2016-06-27 14:51 ` [PATCH 23/24] MIPS R6 opcode table shuffle for LDC2/SDC2 Bhushan Attarde
2016-06-27 14:51 ` [PATCH 18/24] mips-linux-nat: get msa registers Bhushan Attarde
2016-06-27 14:51 ` [PATCH 04/24] Add MIPS Config5 register related support Bhushan Attarde
2016-06-27 14:51 ` [PATCH 02/24] Add MIPS32 FPU64 GDB target descriptions Bhushan Attarde
2016-10-12 12:42 ` Maciej W. Rozycki
2016-10-12 13:58 ` James Hogan
2016-10-12 16:30 ` Maciej W. Rozycki
2016-10-12 18:05 ` James Hogan
2016-10-12 22:04 ` Maciej W. Rozycki
2016-10-13 10:09 ` Matthew Fortune
2016-10-21 19:17 ` Maciej W. Rozycki
2016-10-21 19:24 ` Maciej W. Rozycki
2016-06-27 14:51 ` [PATCH 07/24] MIPS: Make Linux restart register more dynamic Bhushan Attarde
2016-06-27 14:51 ` [PATCH 13/24] Add MIPS MSA GDB target descriptions Bhushan Attarde
2016-06-27 14:51 ` [PATCH 21/24] MIPSR6 support for GDB Bhushan Attarde
2016-07-29 21:10 ` Maciej W. Rozycki
2016-06-27 14:51 ` [PATCH 12/24] o32 sigframe unwinding with FR1 Bhushan Attarde
2016-06-27 14:51 ` [PATCH 05/24] MIPS: Add config5 to MIPS GDB target descriptions Bhushan Attarde
2016-06-27 14:51 ` [PATCH 24/24] MIPS R6 forbidden slot support Bhushan Attarde
2016-06-27 14:51 ` [PATCH 09/24] MIPS: Enhance cooked FP format Bhushan Attarde
2016-06-27 14:51 ` Bhushan Attarde [this message]
2016-06-27 14:51 ` [PATCH 19/24] Add MIPS MSA vector branch instruction support Bhushan Attarde
2016-06-27 14:51 ` [PATCH 20/24] Drop FP and MSA control registers from default info registers Bhushan Attarde
2016-06-27 14:51 ` [PATCH 14/24] Implement core MSA stuff Bhushan Attarde
2016-07-25 14:03 ` [PATCH 01/24] MIPS: Handle run-time reconfigurable FPR size Maciej W. Rozycki
2016-10-18 17:37 ` Maciej W. Rozycki
2016-11-08 19:46 ` Yao Qi
2016-11-10 12:43 ` Maciej W. Rozycki
2016-11-11 12:29 ` Yao Qi
2016-12-02 2:31 ` Maciej W. Rozycki
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