From: "Aktemur, Tankut Baris" <tankut.baris.aktemur@intel.com>
To: Simon Marchi <simark@simark.ca>,
"gdb-patches@sourceware.org" <gdb-patches@sourceware.org>,
"Metzger, Markus T" <markus.t.metzger@intel.com>
Subject: RE: [PATCH v3 08/44] gdb, intelgt: add disassemble feature for the Intel GT architecture.
Date: Tue, 23 Dec 2025 11:03:58 +0000 [thread overview]
Message-ID: <DM4PR11MB730386D053A0996CADD427A1C4B5A@DM4PR11MB7303.namprd11.prod.outlook.com> (raw)
In-Reply-To: <d56d7331-713c-406a-ace9-0a9532c361a4@simark.ca>
Hi Simon,
On Thursday, December 11, 2025 8:37 PM, Simon Marchi wrote:
> > diff --git a/gdb/configure.ac b/gdb/configure.ac
> > index
> 226e27e4fe54a9d3ac06e8be4439dd5dce8eb975..0507f03043c61385181b667d0e7117
> d4b2547d6d 100644
> > --- a/gdb/configure.ac
> > +++ b/gdb/configure.ac
> > @@ -1351,6 +1351,58 @@ fi
> > AC_SUBST(SRCHIGH_LIBS)
> > AC_SUBST(SRCHIGH_CFLAGS)
> >
> > +# Check for Intel(R) Graphics Technology assembler library
> > +intelgt_target=false
> > +
> > +for targ_alias in `echo $target_alias $enable_targets | sed 's/,/
> /g'`
> > +do
> > + if test "$targ_alias" = "all"; then
> > + intelgt_target=true
> > + else
> > + case "$targ_alias" in
> > + intelgt-*)
> > + intelgt_target=true
> > + ;;
> > + esac
> > + fi
> > +done
> > +
> > +case "${target}" in
> > + intelgt-*)
> > + intelgt_target=true
> > + ;;
> > +esac
>
> Do you really need this last "case"? I would think that the main target
> would be included in the loop above (as $target_alias).
No, this shouldn't be needed. We'll remove it in the next revision.
> > +
> > +if test "${intelgt_target}" != true; then
> > + HAVE_LIBIGA64=no
> > +else
> > + AC_ARG_WITH(libiga64,
> > + AS_HELP_STRING([--with-libiga64], [include IntelGT disassembly
> support (auto/yes/no)]),
> > + [], [with_libiga64=auto])
>
> Not an autoconf expert, but I think it makes more sense (and is clearer)
> to put the AC_ARG_WITH at the top-level. The --with-libiga64 flag will
> always be there, it's not like it will be predicated by $intelgt_target.
We'll move it outside 'else'.
> > @@ -544,13 +553,75 @@ intelgt_sw_breakpoint_from_kind (gdbarch
> *gdbarch, int kind, int *size)
> > return nullptr;
> > }
> >
> > +#if defined (HAVE_LIBIGA64)
> > +/* Map CORE_ADDR to symbol names for jump labels in an IGA
> disassembly. */
> > +
> > +static const char *
> > +intelgt_disasm_sym_cb (int addr, void *ctx)
> > +{
> > + disassemble_info *info = (disassemble_info *) ctx;
> > + symbol *sym = find_pc_function (addr + (uintptr_t) info-
> >private_data);
> > + return sym ? sym->linkage_name () : nullptr;
> > +}
> > +#endif /* defined (HAVE_LIBIGA64) */
> > +
> > /* Print one instruction from MEMADDR on INFO->STREAM. */
> >
> > static int
> > intelgt_print_insn (bfd_vma memaddr, struct disassemble_info *info)
> > {
> > - /* Disassembler is to be added in a later patch. */
> > +#if !defined (HAVE_LIBIGA64)
> > + gdb_printf (_("\nDisassemble feature not available: libiga64 "
> > + "is missing.\n"));
> > return -1;
> > +#else
> > + std::unique_ptr<bfd_byte[]> insn (new
> bfd_byte[intelgt::MAX_INST_LENGTH]);
>
> Can this be statically allocated?
>
> bfd_byte insn[intelgt::MAX_INST_LENGTH];
Yes.
> > +
> > + int status = (*info->read_memory_func) (memaddr, insn.get (),
> > + intelgt::COMPACT_INST_LENGTH, info);
> > + if (status != 0)
> > + {
> > + /* Aborts disassembling with a memory_error exception. */
> > + (*info->memory_error_func) (status, memaddr, info);
> > + return -1;
> > + }
> > +
> > + uint32_t device_id = get_device_id (current_inferior ());
> > + gdb::array_view<bfd_byte> insn_view
> > + = gdb::make_array_view (insn.get (),
> intelgt::COMPACT_INST_LENGTH);
> > + unsigned int length = intelgt::inst_length (insn_view, device_id);
> > +
> > + if (length == intelgt::MAX_INST_LENGTH)
> > + {
> > + status = (*info->read_memory_func) (memaddr, insn.get (),
> > + intelgt::MAX_INST_LENGTH, info);
> > + if (status != 0)
> > + {
> > + /* Aborts disassembling with a memory_error exception. */
> > + (*info->memory_error_func) (status, memaddr, info);
> > + return -1;
> > + }
> > + }
> > +
> > + char *dbuf;
> > + iga_disassemble_options_t dopts = IGA_DISASSEMBLE_OPTIONS_INIT ();
> > + gdb_disassemble_info *di
> > + = static_cast<gdb_disassemble_info *>(info->application_data);
>
> Space before paren.
Fixed.
> > @@ -771,6 +842,46 @@ intelgt_gdbarch_init (gdbarch_info info,
> gdbarch_list *arches)
> > intelgt_gdbarch_tdep *data
> > = gdbarch_tdep<intelgt_gdbarch_tdep> (gdbarch);
> >
> > +#if defined (HAVE_LIBIGA64)
> > + iga_gen_t iga_version = IGA_GEN_INVALID;
> > +
> > + if (tdesc != nullptr)
> > + {
> > + const tdesc_device *device_info = tdesc_device_info (tdesc);
> > + if (!(device_info->vendor_id.has_value ()
> > + && device_info->target_id.has_value ()))
> > + {
> > + warning (_("Device vendor id and target id not found."));
>
> Perhaps say "... not found in target description."? Trying to think
> about a clueless user seeing this message without much context.
Updating with "... not found in intelgt target description."
> > + gdbarch_free (gdbarch);
> > + return nullptr;
> > + }
> > +
> > + uint32_t vendor_id = *device_info->vendor_id;
> > + uint32_t device_id = *device_info->target_id;
> > + if (vendor_id != 0x8086)
> > + {
> > + warning (_("Device not recognized: vendor id=0x%04x,"
> > + " device id=0x%04x"), vendor_id, device_id);
> > + gdbarch_free (gdbarch);
> > + return nullptr;
>
> I don't think these two gdbarch_free are needed, that is managed by
> gdbarch_u.
Thanks. These are leftovers from the time when gdbarch_u was not used.
Removed.
> > + }
> > + else
>
> I would remove this "else" (just de-indent the code below).
Done.
> > + {
> > + iga_version = (iga_gen_t) intelgt::get_xe_version (device_id);
> > + if (iga_version == IGA_GEN_INVALID)
> > + warning (_("Intel GT device id is unrecognized: ID 0x%04x"),
> > + device_id);
> > + }
> > + }
> > +
> > + /* Take the best guess in case IGA_VERSION is still invalid. */
> > + if (iga_version == IGA_GEN_INVALID)
> > + iga_version = IGA_XE_HPC;
> > +
> > + const iga_context_options_t options = IGA_CONTEXT_OPTIONS_INIT
> (iga_version);
> > + iga_context_create (&options, &data->iga_ctx);
>
> Should probably check the return value of iga_context_create.
Done.
>
> Simon
Thank you.
-Baris
Intel Deutschland GmbH
Registered Address: Dornacher Straße 1, 85622 Feldkirchen, Germany
Tel: +49 89 991 430, www.intel.de
Managing Directors: Harry Demas, Jeffrey Schneiderman, Yin Chong Sorrell
Chairperson of the Supervisory Board: Nicole Lau
Registered Seat: Munich
Commercial Register: Amtsgericht München HRB 186928
next prev parent reply other threads:[~2025-12-23 11:04 UTC|newest]
Thread overview: 92+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-01 9:37 [PATCH v3 00/44] A new target to debug Intel GPUs Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 01/44] gdb, intelgt: add intelgt as a basic machine Tankut Baris Aktemur
2025-12-09 20:44 ` Simon Marchi
2025-12-19 11:13 ` Aktemur, Tankut Baris
2025-08-01 9:37 ` [PATCH v3 02/44] bfd: add intelgt target to BFD Tankut Baris Aktemur
2025-08-01 12:20 ` Jan Beulich
2025-08-08 5:03 ` Metzger, Markus T
2025-12-09 21:05 ` Simon Marchi
2025-12-19 12:46 ` Aktemur, Tankut Baris
2025-08-01 9:37 ` [PATCH v3 03/44] ld: add intelgt as a target configuration Tankut Baris Aktemur
2025-08-01 12:06 ` Jan Beulich
2025-08-08 5:03 ` Metzger, Markus T
2025-08-01 9:37 ` [PATCH v3 04/44] opcodes: add intelgt as a configuration Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 05/44] gdb, gdbserver, gdbsupport: add 'device' tag to XML target description Tankut Baris Aktemur
2025-12-09 21:27 ` Simon Marchi
2025-12-15 21:03 ` Simon Marchi
2025-12-18 15:04 ` Aktemur, Tankut Baris
2026-01-09 19:12 ` Aktemur, Tankut Baris
2026-01-09 19:34 ` Simon Marchi
2025-08-01 9:37 ` [PATCH v3 06/44] gdb, arch, intelgt: add intelgt arch definitions Tankut Baris Aktemur
2025-12-09 21:48 ` Simon Marchi
2025-12-16 15:47 ` Metzger, Markus T
2025-08-01 9:37 ` [PATCH v3 07/44] gdb, intelgt: add the target-dependent definitions for the Intel GT architecture Tankut Baris Aktemur
2025-12-11 18:53 ` Simon Marchi
2025-12-19 16:01 ` Aktemur, Tankut Baris
2025-08-01 9:37 ` [PATCH v3 08/44] gdb, intelgt: add disassemble feature " Tankut Baris Aktemur
2025-12-11 19:37 ` Simon Marchi
2025-12-23 11:03 ` Aktemur, Tankut Baris [this message]
2025-08-01 9:37 ` [PATCH v3 09/44] gdb, gdbserver, ze: in-memory libraries Tankut Baris Aktemur
2025-12-12 4:13 ` Simon Marchi
2025-12-12 11:20 ` Metzger, Markus T
2025-12-12 19:34 ` Simon Marchi
2025-12-15 13:07 ` Metzger, Markus T
2025-12-15 21:25 ` Simon Marchi
2025-08-01 9:37 ` [PATCH v3 10/44] gdb, gdbserver, rsp, ze: acknowledge libraries Tankut Baris Aktemur
2025-12-12 4:41 ` Simon Marchi
2025-12-12 14:28 ` Metzger, Markus T
2025-08-01 9:37 ` [PATCH v3 11/44] gdb, solib, ze: update target_solib_ops::bfd_open_from_target_memory Tankut Baris Aktemur
2025-12-12 4:43 ` Simon Marchi
2025-12-12 14:33 ` Metzger, Markus T
2025-08-01 9:37 ` [PATCH v3 12/44] gdb, infrun, ze: allow saving process events Tankut Baris Aktemur
2025-12-12 4:57 ` Simon Marchi
2025-12-15 13:13 ` Metzger, Markus T
2025-12-16 21:10 ` Simon Marchi
2025-12-17 9:30 ` Metzger, Markus T
2025-12-17 20:44 ` Simon Marchi
2025-12-18 7:20 ` Metzger, Markus T
2025-08-01 9:37 ` [PATCH v3 13/44] gdb, ze: add TARGET_WAITKIND_UNAVAILABLE Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 14/44] gdb, infrun, ze: handle stopping unavailable threads Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 15/44] gdb, infrun, ze: allow resuming " Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 16/44] gdb, gdbserver, ze: add U stop reply Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 17/44] gdb, gdbserver, ze: add library notification to " Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 18/44] gdbserver, ze: report TARGET_WAITKIND_UNAVAILABLE events Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 19/44] gdb, ze: handle TARGET_WAITKIND_UNAVAILABLE in stop_all_threads Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 20/44] gdb, remote: handle thread unavailability in print_one_stopped_thread Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 21/44] gdb, remote: do 'remote_add_inferior' in 'remote_notice_new_inferior' earlier Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 22/44] gdb, remote: handle a generic process PID in remote_notice_new_inferior Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 23/44] gdb, remote: handle a generic process PID in process_stop_reply Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 24/44] gdb: use the pid from inferior in setup_inferior Tankut Baris Aktemur
2025-12-12 19:51 ` Simon Marchi
2025-12-13 12:40 ` Aktemur, Tankut Baris
2025-08-01 9:37 ` [PATCH v3 25/44] gdb: revise the pid_to_exec_file target op Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 26/44] gdb: load solibs if the target does not have the notion of an exec file Tankut Baris Aktemur
2025-12-12 20:30 ` Simon Marchi
2026-01-09 19:10 ` Aktemur, Tankut Baris
2025-08-01 9:37 ` [PATCH v3 27/44] gdbserver: import AC_LIB_HAVE_LINKFLAGS macro into the autoconf script Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 28/44] gdbserver: add a pointer to the owner thread in regcache Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 29/44] gdbserver: wait for stopped threads in queue_stop_reply_callback Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 30/44] gdbserver: adjust pid after the target attaches Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 31/44] gdb: do not create a thread after a process event Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 32/44] gdb, ze: on a whole process stop, mark all threads as not_resumed Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 33/44] gdb, dwarf, ze: add DW_OP_INTEL_regval_bits Tankut Baris Aktemur
2025-08-01 12:02 ` Jan Beulich
2025-08-01 12:31 ` Metzger, Markus T
2025-08-01 12:50 ` Jan Beulich
2025-08-08 5:25 ` Metzger, Markus T
2025-08-01 9:37 ` [PATCH v3 34/44] gdbserver: allow configuring for a heterogeneous target Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 35/44] gdbserver, ze, intelgt: introduce ze-low and intel-ze-low targets Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 36/44] testsuite, sycl: add SYCL support Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 37/44] testsuite, sycl: add test for backtracing inside a kernel Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 38/44] testsuite, sycl: add test for 'info locals' and 'info args' Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 39/44] testsuite, sycl: add tests for stepping and accessing data elements Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 40/44] testsuite, sycl: add test for 1-D and 2-D parallel_for kernels Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 41/44] testsuite, sycl: add test for scheduler-locking Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 42/44] testsuite, arch, intelgt: add a disassembly test Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 43/44] testsuite, arch, intelgt: add intelgt-program-bp.exp Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 44/44] testsuite, sycl: test canceling a stepping flow Tankut Baris Aktemur
2025-09-17 12:43 ` [PATCH v3 00/44] A new target to debug Intel GPUs Aktemur, Tankut Baris
2025-10-14 6:34 ` Aktemur, Tankut Baris
2025-12-08 11:32 ` Aktemur, Tankut Baris
2025-12-09 21:30 ` Simon Marchi
2025-12-19 12:52 ` Aktemur, Tankut Baris
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