From: Tankut Baris Aktemur <tankut.baris.aktemur@intel.com>
To: gdb-patches@sourceware.org,
Markus Metzger <markus.t.metzger@intel.com>,
binutils@sourceware.org
Subject: [PATCH v3 02/44] bfd: add intelgt target to BFD
Date: Fri, 1 Aug 2025 11:37:04 +0200 [thread overview]
Message-ID: <20250801-upstream-intelgt-mvp-v3-2-59ce0f87075b@intel.com> (raw)
In-Reply-To: <20250801-upstream-intelgt-mvp-v3-0-59ce0f87075b@intel.com>
From: Natalia Saiapova <natalia.saiapova@intel.com>
Add description of IntelGT target to BFD. Describe its relocation
types.
To: <binutils@sourceware.org>
---
bfd/Makefile.am | 2 +
bfd/Makefile.in | 4 ++
bfd/archures.c | 4 ++
bfd/bfd-in2.h | 6 ++
bfd/config.bfd | 13 +++-
bfd/configure | 1 +
bfd/configure.ac | 1 +
bfd/cpu-intelgt.c | 57 +++++++++++++++
bfd/elf64-intelgt.c | 195 ++++++++++++++++++++++++++++++++++++++++++++++++++
bfd/libbfd.h | 2 +
bfd/reloc.c | 7 ++
bfd/targets.c | 2 +
binutils/readelf.c | 9 +++
include/elf/intelgt.h | 39 ++++++++++
14 files changed, 339 insertions(+), 3 deletions(-)
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
index 3c3243269f12a603d2036d61c0c7a26db070d610..02b4f16e6efcd7d719c5c3e36ba7b1d8bd67db54 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -119,6 +119,7 @@ ALL_MACHINES = \
cpu-i386.lo \
cpu-ia64.lo \
cpu-iamcu.lo \
+ cpu-intelgt.lo \
cpu-ip2k.lo \
cpu-iq2000.lo \
cpu-kvx.lo \
@@ -202,6 +203,7 @@ ALL_MACHINES_CFILES = \
cpu-i386.c \
cpu-ia64.c \
cpu-iamcu.c \
+ cpu-intelgt.c \
cpu-ip2k.c \
cpu-iq2000.c \
cpu-kvx.c \
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index 4c259682fd0214f5df0ef8f5c2be867301a1650c..5c68934e79424d8171e7e1ea98543bb50dd06ad7 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -584,6 +584,7 @@ ALL_MACHINES = \
cpu-i386.lo \
cpu-ia64.lo \
cpu-iamcu.lo \
+ cpu-intelgt.lo \
cpu-ip2k.lo \
cpu-iq2000.lo \
cpu-kvx.lo \
@@ -667,6 +668,7 @@ ALL_MACHINES_CFILES = \
cpu-i386.c \
cpu-ia64.c \
cpu-iamcu.c \
+ cpu-intelgt.c \
cpu-ip2k.c \
cpu-iq2000.c \
cpu-kvx.c \
@@ -1021,6 +1023,7 @@ BFD64_BACKENDS = \
elf64-hppa.lo \
elf64-ia64-vms.lo \
elf64-ia64.lo \
+ elf64-intelgt.lo \
elf64-kvx.lo \
elf64-loongarch.lo \
elf64-mips.lo \
@@ -1492,6 +1495,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-i386.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-ia64.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-iamcu.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-intelgt.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-ip2k.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-iq2000.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-kvx.Plo@am__quote@
diff --git a/bfd/archures.c b/bfd/archures.c
index fd22c94d6d6e9dce0089b7be270c35fec4bce86c..25991565cb5ec4404f2026b10e375c4db5136804 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -399,6 +399,8 @@ DESCRIPTION
. bfd_arch_ia64, {* HP/Intel ia64. *}
.#define bfd_mach_ia64_elf64 64
.#define bfd_mach_ia64_elf32 32
+. bfd_arch_intelgt, {* Intel(R) Graphics Technology. *}
+.#define bfd_mach_intelgt 9
. bfd_arch_ip2k, {* Ubicom IP2K microcontrollers. *}
.#define bfd_mach_ip2022 1
.#define bfd_mach_ip2022ext 2
@@ -650,6 +652,7 @@ extern const bfd_arch_info_type bfd_hppa_arch;
extern const bfd_arch_info_type bfd_i386_arch;
extern const bfd_arch_info_type bfd_iamcu_arch;
extern const bfd_arch_info_type bfd_ia64_arch;
+extern const bfd_arch_info_type bfd_intelgt_arch;
extern const bfd_arch_info_type bfd_ip2k_arch;
extern const bfd_arch_info_type bfd_iq2000_arch;
extern const bfd_arch_info_type bfd_kvx_arch;
@@ -738,6 +741,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_i386_arch,
&bfd_iamcu_arch,
&bfd_ia64_arch,
+ &bfd_intelgt_arch,
&bfd_ip2k_arch,
&bfd_iq2000_arch,
&bfd_kvx_arch,
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 2ff3e930bfa2fb441aa68bc81618747a576571a2..2133b126502955b92caae4fb23d2e98093aac72b 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1620,6 +1620,8 @@ enum bfd_architecture
bfd_arch_ia64, /* HP/Intel ia64. */
#define bfd_mach_ia64_elf64 64
#define bfd_mach_ia64_elf32 32
+ bfd_arch_intelgt, /* Intel(R) Graphics Technology. */
+#define bfd_mach_intelgt 9
bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */
#define bfd_mach_ip2022 1
#define bfd_mach_ip2022ext 2
@@ -7458,6 +7460,10 @@ enum bfd_reloc_code_real
BFD_RELOC_LARCH_TLS_LD_PCREL20_S2,
BFD_RELOC_LARCH_TLS_GD_PCREL20_S2,
BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2,
+
+ /* IntelGT relocations. */
+ BFD_RELOC_ZE_SYM_ADDR32_HI,
+ BFD_RELOC_ZE_PER_THREAD_PAYLOAD_OFFSET_32,
BFD_RELOC_UNUSED
};
typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
diff --git a/bfd/config.bfd b/bfd/config.bfd
index eb20a01ef54aaeec6889bc010faa51576fe0d65b..edf2b83e00ef7f6b3edf2a0c0298db5b65115577 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -198,6 +198,7 @@ fido*) targ_archs=bfd_m68k_arch ;;
hppa*) targ_archs=bfd_hppa_arch ;;
i[3-7]86) targ_archs=bfd_i386_arch ;;
ia16) targ_archs=bfd_i386_arch ;;
+intelgt) targ_archs=bfd_intelgt_arch ;;
kvx) targ_archs=bfd_kvx_arch ;;
loongarch*) targ_archs=bfd_loongarch_arch ;;
m6811*|m68hc11*) targ_archs="bfd_m68hc11_arch bfd_m68hc12_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;;
@@ -705,12 +706,12 @@ case "${targ}" in
;;
x86_64-*-linux-*)
targ_defvec=x86_64_elf64_vec
- targ_selvecs="i386_elf32_vec iamcu_elf32_vec x86_64_elf32_vec i386_pei_vec x86_64_pe_vec x86_64_pei_vec"
+ targ_selvecs="i386_elf32_vec iamcu_elf32_vec x86_64_elf32_vec i386_pei_vec x86_64_pe_vec x86_64_pei_vec intelgt_elf64_vec"
want64=true
;;
x86_64-*-mingw* | x86_64-*-pe | x86_64-*-pep | x86_64-*-cygwin)
targ_defvec=x86_64_pe_vec
- targ_selvecs="x86_64_pe_vec x86_64_pei_vec x86_64_pe_big_vec x86_64_elf64_vec i386_pe_vec i386_pei_vec i386_elf32_vec iamcu_elf32_vec pdb_vec"
+ targ_selvecs="x86_64_pe_vec x86_64_pei_vec x86_64_pe_big_vec x86_64_elf64_vec i386_pe_vec i386_pei_vec i386_elf32_vec iamcu_elf32_vec pdb_vec intelgt_elf64_vec intelgt_legacy_elf64_vec"
want64=true
targ_underscore=no
;;
@@ -781,7 +782,13 @@ case "${targ}" in
targ_defvec=i386_elf32_vec
targ_selvecs="i386_msdos_vec i386_aout_vec"
;;
-
+#ifdef BFD64
+ intelgt-*-elf)
+ targ_defvec=intelgt_elf64_vec
+ targ_selvecs="intelgt_elf64_vec"
+ want64=true
+ ;;
+#endif
ip2k-*-elf)
targ_defvec=ip2k_elf32_vec
targ_underscore=yes
diff --git a/bfd/configure b/bfd/configure
index 28ac5ccfbe570d7454db5ab81d67a4919f207878..3bbcb4f4833d66f4a9fc065712449d1bace9bc25 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -15573,6 +15573,7 @@ do
ia64_elf64_hpux_be_vec) tb="$tb elf64-ia64.lo elfxx-ia64.lo elf64.lo $elf"; target_size=64 ;;
ia64_elf64_vms_vec) tb="$tb elf64-ia64-vms.lo elf64-ia64.lo elfxx-ia64.lo elf64.lo vms-lib.lo vms-misc.lo $elf"; target_size=64 ;;
ia64_pei_vec) tb="$tb pei-ia64.lo pepigen.lo $coff"; target_size=64 ;;
+ intelgt_elf64_vec) tb="$tb elf64-intelgt.lo elf64.lo $elf"; target_size=64 ;;
ip2k_elf32_vec) tb="$tb elf32-ip2k.lo elf32.lo $elf" ;;
iq2000_elf32_vec) tb="$tb elf32-iq2000.lo elf32.lo $elf" ;;
kvx_elf32_vec) tb="$tb elf32-kvx.lo elfxx-kvx.lo elf32.lo $elf $ipa" ;;
diff --git a/bfd/configure.ac b/bfd/configure.ac
index 502c526b606aaef61bead97db0f5ab83acf0aa1d..ddec7c895a596b1451155fe80ec5ab3783df8d15 100644
--- a/bfd/configure.ac
+++ b/bfd/configure.ac
@@ -497,6 +497,7 @@ do
ia64_elf64_hpux_be_vec) tb="$tb elf64-ia64.lo elfxx-ia64.lo elf64.lo $elf"; target_size=64 ;;
ia64_elf64_vms_vec) tb="$tb elf64-ia64-vms.lo elf64-ia64.lo elfxx-ia64.lo elf64.lo vms-lib.lo vms-misc.lo $elf"; target_size=64 ;;
ia64_pei_vec) tb="$tb pei-ia64.lo pepigen.lo $coff"; target_size=64 ;;
+ intelgt_elf64_vec) tb="$tb elf64-intelgt.lo elf64.lo $elf"; target_size=64 ;;
ip2k_elf32_vec) tb="$tb elf32-ip2k.lo elf32.lo $elf" ;;
iq2000_elf32_vec) tb="$tb elf32-iq2000.lo elf32.lo $elf" ;;
kvx_elf32_vec) tb="$tb elf32-kvx.lo elfxx-kvx.lo elf32.lo $elf $ipa" ;;
diff --git a/bfd/cpu-intelgt.c b/bfd/cpu-intelgt.c
new file mode 100644
index 0000000000000000000000000000000000000000..2d90e768325904dc5a265711a721f5437e13eb12
--- /dev/null
+++ b/bfd/cpu-intelgt.c
@@ -0,0 +1,57 @@
+/* BFD support for the Intel(R) Graphics Technology architecture.
+ Copyright (C) 2019-2025 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#include "sysdep.h"
+#include "bfd.h"
+#include "libbfd.h"
+
+static void *
+bfd_arch_intelgt_fill (bfd_size_type count,
+ bool is_bigendian ATTRIBUTE_UNUSED,
+ bool code)
+{
+ void *fill = bfd_malloc (count);
+
+ if (fill != NULL)
+ {
+ /* nop on gen is 0x7e. */
+ memset (fill, code ? 0x7e : 0, count);
+ }
+
+ return fill;
+}
+
+const bfd_arch_info_type bfd_intelgt_arch =
+ {
+ 64, /* 64 bits in a word. */
+ 64, /* 64 bits in an address. */
+ 8, /* 8 bits in a byte. */
+ bfd_arch_intelgt, /* Architecture. */
+ bfd_mach_intelgt, /* Machine number. */
+ "intelgt", /* Architecture name. */
+ "intelgt", /* Printable name. */
+ 3, /* Section alignment power. */
+ true, /* Default machine for this architecture. */
+ bfd_default_compatible, /* Check for compatibility. */
+ bfd_default_scan, /* Check for an arch and mach hit. */
+ bfd_arch_intelgt_fill, /* Allocate and fill bfd. */
+ NULL, /* Pointer to next. */
+ 0 /* Maximum offset of a reloc from the start of an insn. */
+ };
diff --git a/bfd/elf64-intelgt.c b/bfd/elf64-intelgt.c
new file mode 100644
index 0000000000000000000000000000000000000000..41351318e797342d29fbafdf3802d09e91edadb6
--- /dev/null
+++ b/bfd/elf64-intelgt.c
@@ -0,0 +1,195 @@
+/* Intel(R) Graphics Technology-specific support for ELF
+ Copyright (C) 2022-2025 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#include "sysdep.h"
+#include "bfd.h"
+#include "libbfd.h"
+#include "elf-bfd.h"
+
+#include "elf/common.h"
+#include "elf/intelgt.h"
+
+#define MINUS_ONE (~ (bfd_vma) 0)
+
+#define INTELGT_ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
+
+static bool
+elf64_intelgt_elf_object_p (bfd *abfd)
+{
+ return bfd_default_set_arch_mach (abfd, bfd_arch_intelgt, bfd_mach_intelgt);
+}
+
+/* Map BFD relocs to the IntelGT relocs. */
+struct elf_reloc_map
+{
+ bfd_reloc_code_real_type bfd_reloc_val;
+ unsigned char elf_reloc_val;
+};
+
+static const struct elf_reloc_map elf64_intelgt_reloc_map[] =
+{
+ { BFD_RELOC_64, R_ZE_SYM_ADDR },
+ { BFD_RELOC_32, R_ZE_SYM_ADDR_32 },
+ { BFD_RELOC_ZE_SYM_ADDR32_HI, R_ZE_SYM_ADDR32_HI },
+ { BFD_RELOC_ZE_PER_THREAD_PAYLOAD_OFFSET_32,
+ R_PER_THREAD_PAYLOAD_OFFSET_32 },
+};
+
+static reloc_howto_type elf64_intelgt_howto_table[] =
+{
+ HOWTO (R_ZE_NONE, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 0, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ NULL, /* special_function */
+ "R_ZE_NONE", /* name */
+ false, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ false), /* pcrel_offset */
+ HOWTO (R_ZE_SYM_ADDR, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 64, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_unsigned, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ZE_SYM_ADDR", /* name */
+ false, /* partial_inplace */
+ MINUS_ONE, /* src_mask */
+ MINUS_ONE, /* dst_mask */
+ false), /* pcrel_offset */
+ HOWTO (R_ZE_SYM_ADDR_32, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_unsigned, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ZE_SYM_ADDR_32", /* name */
+ false, /* partial_inplace */
+ MINUS_ONE, /* src_mask */
+ MINUS_ONE, /* dst_mask */
+ false), /* pcrel_offset */
+ HOWTO (R_ZE_SYM_ADDR32_HI, /* type */
+ 32, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_unsigned, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_ZE_SYM_ADDR32_HI", /* name */
+ false, /* partial_inplace */
+ MINUS_ONE, /* src_mask */
+ MINUS_ONE, /* dst_mask */
+ false), /* pcrel_offset */
+ HOWTO (R_PER_THREAD_PAYLOAD_OFFSET_32, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_unsigned, /* complain_on_overflow */
+ NULL, /* special_function */
+ "R_PER_THREAD_PAYLOAD_OFFSET_32", /* name */
+ false, /* partial_inplace */
+ MINUS_ONE, /* src_mask */
+ MINUS_ONE, /* dst_mask */
+ false), /* pcrel_offset */
+};
+
+/* Given a BFD reloc type, return a HOWTO structure. */
+static reloc_howto_type *
+elf64_intelgt_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
+ bfd_reloc_code_real_type code)
+{
+ unsigned int i;
+
+ for (i = 0; i < INTELGT_ARRAY_SIZE (elf64_intelgt_reloc_map); i++)
+ {
+ struct elf_reloc_map reloc_map = elf64_intelgt_reloc_map[i];
+
+ if (reloc_map.bfd_reloc_val == code)
+ return &elf64_intelgt_howto_table[reloc_map.elf_reloc_val];
+ }
+
+ return NULL;
+}
+
+/* Given relocation NAME, find its HOWTO structure. */
+static reloc_howto_type *
+elf64_intelgt_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
+ const char *r_name)
+{
+ unsigned int i;
+
+ for (i = 0; i < INTELGT_ARRAY_SIZE (elf64_intelgt_howto_table); i++)
+ if (elf64_intelgt_howto_table[i].name != NULL
+ && strcasecmp (elf64_intelgt_howto_table[i].name, r_name) == 0)
+ return &elf64_intelgt_howto_table[i];
+
+ return NULL;
+}
+
+/* Sets HOWTO of the BFD_RELOC to the entry of howto table based
+ on the type of ELF_RELOC. */
+static bool
+elf64_info_to_howto (bfd *abfd, arelent *bfd_reloc,
+ Elf_Internal_Rela *elf_reloc)
+{
+ unsigned int r_type = ELF32_R_TYPE (elf_reloc->r_info);
+ bfd_reloc->howto = &elf64_intelgt_howto_table[r_type];
+
+ if (bfd_reloc->howto == NULL)
+ {
+ /* xgettext:c-format */
+ _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
+ abfd, r_type);
+ return false;
+ }
+ return true;
+}
+
+#define ELF_MAXPAGESIZE 0x40000000
+
+#define TARGET_LITTLE_SYM intelgt_elf64_vec
+#define TARGET_LITTLE_NAME "elf64-intelgt"
+#define ELF_ARCH bfd_arch_intelgt
+#define ELF_MACHINE_CODE EM_INTELGT
+
+#define ELF_OSABI 0
+
+#define elf64_bed elf64_intelgt_bed
+
+#define elf_backend_object_p elf64_intelgt_elf_object_p
+
+#define elf_backend_want_plt_sym 0
+
+#define bfd_elf64_bfd_reloc_type_lookup elf64_intelgt_reloc_type_lookup
+#define bfd_elf64_bfd_reloc_name_lookup elf64_intelgt_reloc_name_lookup
+#define elf_info_to_howto elf64_info_to_howto
+
+#include "elf64-target.h"
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index bab1f71f7e3ff6570e546085622b299be22bb8f5..70cf898f8379577a88af1f9682a6bb349b672636 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -3618,6 +3618,8 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_LARCH_TLS_LD_PCREL20_S2",
"BFD_RELOC_LARCH_TLS_GD_PCREL20_S2",
"BFD_RELOC_LARCH_TLS_DESC_PCREL20_S2",
+ "BFD_RELOC_ZE_SYM_ADDR32_HI",
+ "BFD_RELOC_ZE_PER_THREAD_PAYLOAD_OFFSET_32",
"@@overflow: BFD_RELOC_UNUSED@@",
};
#endif
diff --git a/bfd/reloc.c b/bfd/reloc.c
index c9d53bb9e11b93d5394bd7e0bbd511a9852d550a..c7f2d80b02c53f4a2cf3b14c66b2c48e903b49f6 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -8266,6 +8266,13 @@ ENUMX
ENUMDOC
LARCH relocations.
+ENUM
+ BFD_RELOC_ZE_SYM_ADDR32_HI
+ENUMX
+ BFD_RELOC_ZE_PER_THREAD_PAYLOAD_OFFSET_32
+ENUMDOC
+ IntelGT relocations.
+
ENDSENUM
BFD_RELOC_UNUSED
diff --git a/bfd/targets.c b/bfd/targets.c
index c2ee9179f374cdc5686389c85c7cc2c18a0e260d..aed079c0a92564f8a765f3d1fceb6ad3745a06a9 100644
--- a/bfd/targets.c
+++ b/bfd/targets.c
@@ -762,6 +762,7 @@ extern const bfd_target ia64_elf64_le_vec;
extern const bfd_target ia64_elf64_hpux_be_vec;
extern const bfd_target ia64_elf64_vms_vec;
extern const bfd_target ia64_pei_vec;
+extern const bfd_target intelgt_elf64_vec;
extern const bfd_target ip2k_elf32_vec;
extern const bfd_target iq2000_elf32_vec;
extern const bfd_target kvx_elf32_vec;
@@ -1119,6 +1120,7 @@ static const bfd_target * const _bfd_target_vector[] =
&ia64_elf64_hpux_be_vec,
&ia64_elf64_vms_vec,
&ia64_pei_vec,
+ &intelgt_elf64_vec,
#endif
&ip2k_elf32_vec,
diff --git a/binutils/readelf.c b/binutils/readelf.c
index bb81c824ac3b5b98217e8ebc20c47bdda1c75561..f9612120352e2293c227a95b90c64b9955e7a882 100644
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
@@ -124,6 +124,7 @@
#include "elf/kvx.h"
#include "elf/lm32.h"
#include "elf/iq2000.h"
+#include "elf/intelgt.h"
#include "elf/m32c.h"
#include "elf/m32r.h"
#include "elf/m68k.h"
@@ -2395,6 +2396,10 @@ dump_relocations (Filedata * filedata,
case EM_AMDGPU:
rtype = elf_amdgpu_reloc_type (type);
break;
+
+ case EM_INTELGT:
+ rtype = elf_intelgt_reloc_type (type);
+ break;
}
if (rtype == NULL)
@@ -15589,6 +15594,8 @@ is_32bit_abs_reloc (Filedata * filedata, unsigned int reloc_type)
return reloc_type == 1; /* R_XTENSA_32. */
case EM_Z80:
return reloc_type == 6; /* R_Z80_32. */
+ case EM_INTELGT:
+ return reloc_type == 2; /* R_ZE_SYM_ADDR_32 */
default:
{
static unsigned int prev_warn = 0;
@@ -15728,6 +15735,8 @@ is_64bit_abs_reloc (Filedata * filedata, unsigned int reloc_type)
return reloc_type == 18; /* R_MIPS_64. */
case EM_KVX:
return reloc_type == 3; /* R_KVX_64 */
+ case EM_INTELGT:
+ return reloc_type == 1; /* R_ZE_SYM_ADDR. */
default:
return false;
}
diff --git a/include/elf/intelgt.h b/include/elf/intelgt.h
new file mode 100644
index 0000000000000000000000000000000000000000..cdade55ea4864aa23cd6e8b2a079e6f5e2ff91fb
--- /dev/null
+++ b/include/elf/intelgt.h
@@ -0,0 +1,39 @@
+/* Copyright (C) 2022-2025 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+/* This file holds definitions specific to the IntelGT ABI. */
+
+#ifndef __INTELGT_H_
+#define __INTELGT_H_
+
+#include "elf/reloc-macros.h"
+
+START_RELOC_NUMBERS (elf_intelgt_reloc_type)
+ RELOC_NUMBER (R_ZE_NONE, 0)
+ /* 64-bit address. */
+ RELOC_NUMBER (R_ZE_SYM_ADDR, 1)
+ /* 32-bit address or lower 32-bit of a 64-bit address. */
+ RELOC_NUMBER (R_ZE_SYM_ADDR_32, 2)
+ /* Higher 32bits of a 64-bit address. */
+ RELOC_NUMBER (R_ZE_SYM_ADDR32_HI, 3)
+ /* 32-bit field of payload offset of per-thread data. */
+ RELOC_NUMBER (R_PER_THREAD_PAYLOAD_OFFSET_32, 4)
+END_RELOC_NUMBERS (R_ZE_max)
+
+#endif /* __INTELGT_H_ */
--
2.34.1
Intel Deutschland GmbH
Registered Address: Am Campeon 10, 85579 Neubiberg, Germany
Tel: +49 89 99 8853-0, www.intel.de
Managing Directors: Sean Fennelly, Jeffrey Schneiderman, Tiffany Doon Silva
Chairperson of the Supervisory Board: Nicole Lau
Registered Office: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928
next prev parent reply other threads:[~2025-08-01 9:51 UTC|newest]
Thread overview: 92+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-01 9:37 [PATCH v3 00/44] A new target to debug Intel GPUs Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 01/44] gdb, intelgt: add intelgt as a basic machine Tankut Baris Aktemur
2025-12-09 20:44 ` Simon Marchi
2025-12-19 11:13 ` Aktemur, Tankut Baris
2025-08-01 9:37 ` Tankut Baris Aktemur [this message]
2025-08-01 12:20 ` [PATCH v3 02/44] bfd: add intelgt target to BFD Jan Beulich
2025-08-08 5:03 ` Metzger, Markus T
2025-12-09 21:05 ` Simon Marchi
2025-12-19 12:46 ` Aktemur, Tankut Baris
2025-08-01 9:37 ` [PATCH v3 03/44] ld: add intelgt as a target configuration Tankut Baris Aktemur
2025-08-01 12:06 ` Jan Beulich
2025-08-08 5:03 ` Metzger, Markus T
2025-08-01 9:37 ` [PATCH v3 04/44] opcodes: add intelgt as a configuration Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 05/44] gdb, gdbserver, gdbsupport: add 'device' tag to XML target description Tankut Baris Aktemur
2025-12-09 21:27 ` Simon Marchi
2025-12-15 21:03 ` Simon Marchi
2025-12-18 15:04 ` Aktemur, Tankut Baris
2026-01-09 19:12 ` Aktemur, Tankut Baris
2026-01-09 19:34 ` Simon Marchi
2025-08-01 9:37 ` [PATCH v3 06/44] gdb, arch, intelgt: add intelgt arch definitions Tankut Baris Aktemur
2025-12-09 21:48 ` Simon Marchi
2025-12-16 15:47 ` Metzger, Markus T
2025-08-01 9:37 ` [PATCH v3 07/44] gdb, intelgt: add the target-dependent definitions for the Intel GT architecture Tankut Baris Aktemur
2025-12-11 18:53 ` Simon Marchi
2025-12-19 16:01 ` Aktemur, Tankut Baris
2025-08-01 9:37 ` [PATCH v3 08/44] gdb, intelgt: add disassemble feature " Tankut Baris Aktemur
2025-12-11 19:37 ` Simon Marchi
2025-12-23 11:03 ` Aktemur, Tankut Baris
2025-08-01 9:37 ` [PATCH v3 09/44] gdb, gdbserver, ze: in-memory libraries Tankut Baris Aktemur
2025-12-12 4:13 ` Simon Marchi
2025-12-12 11:20 ` Metzger, Markus T
2025-12-12 19:34 ` Simon Marchi
2025-12-15 13:07 ` Metzger, Markus T
2025-12-15 21:25 ` Simon Marchi
2025-08-01 9:37 ` [PATCH v3 10/44] gdb, gdbserver, rsp, ze: acknowledge libraries Tankut Baris Aktemur
2025-12-12 4:41 ` Simon Marchi
2025-12-12 14:28 ` Metzger, Markus T
2025-08-01 9:37 ` [PATCH v3 11/44] gdb, solib, ze: update target_solib_ops::bfd_open_from_target_memory Tankut Baris Aktemur
2025-12-12 4:43 ` Simon Marchi
2025-12-12 14:33 ` Metzger, Markus T
2025-08-01 9:37 ` [PATCH v3 12/44] gdb, infrun, ze: allow saving process events Tankut Baris Aktemur
2025-12-12 4:57 ` Simon Marchi
2025-12-15 13:13 ` Metzger, Markus T
2025-12-16 21:10 ` Simon Marchi
2025-12-17 9:30 ` Metzger, Markus T
2025-12-17 20:44 ` Simon Marchi
2025-12-18 7:20 ` Metzger, Markus T
2025-08-01 9:37 ` [PATCH v3 13/44] gdb, ze: add TARGET_WAITKIND_UNAVAILABLE Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 14/44] gdb, infrun, ze: handle stopping unavailable threads Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 15/44] gdb, infrun, ze: allow resuming " Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 16/44] gdb, gdbserver, ze: add U stop reply Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 17/44] gdb, gdbserver, ze: add library notification to " Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 18/44] gdbserver, ze: report TARGET_WAITKIND_UNAVAILABLE events Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 19/44] gdb, ze: handle TARGET_WAITKIND_UNAVAILABLE in stop_all_threads Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 20/44] gdb, remote: handle thread unavailability in print_one_stopped_thread Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 21/44] gdb, remote: do 'remote_add_inferior' in 'remote_notice_new_inferior' earlier Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 22/44] gdb, remote: handle a generic process PID in remote_notice_new_inferior Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 23/44] gdb, remote: handle a generic process PID in process_stop_reply Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 24/44] gdb: use the pid from inferior in setup_inferior Tankut Baris Aktemur
2025-12-12 19:51 ` Simon Marchi
2025-12-13 12:40 ` Aktemur, Tankut Baris
2025-08-01 9:37 ` [PATCH v3 25/44] gdb: revise the pid_to_exec_file target op Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 26/44] gdb: load solibs if the target does not have the notion of an exec file Tankut Baris Aktemur
2025-12-12 20:30 ` Simon Marchi
2026-01-09 19:10 ` Aktemur, Tankut Baris
2025-08-01 9:37 ` [PATCH v3 27/44] gdbserver: import AC_LIB_HAVE_LINKFLAGS macro into the autoconf script Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 28/44] gdbserver: add a pointer to the owner thread in regcache Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 29/44] gdbserver: wait for stopped threads in queue_stop_reply_callback Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 30/44] gdbserver: adjust pid after the target attaches Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 31/44] gdb: do not create a thread after a process event Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 32/44] gdb, ze: on a whole process stop, mark all threads as not_resumed Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 33/44] gdb, dwarf, ze: add DW_OP_INTEL_regval_bits Tankut Baris Aktemur
2025-08-01 12:02 ` Jan Beulich
2025-08-01 12:31 ` Metzger, Markus T
2025-08-01 12:50 ` Jan Beulich
2025-08-08 5:25 ` Metzger, Markus T
2025-08-01 9:37 ` [PATCH v3 34/44] gdbserver: allow configuring for a heterogeneous target Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 35/44] gdbserver, ze, intelgt: introduce ze-low and intel-ze-low targets Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 36/44] testsuite, sycl: add SYCL support Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 37/44] testsuite, sycl: add test for backtracing inside a kernel Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 38/44] testsuite, sycl: add test for 'info locals' and 'info args' Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 39/44] testsuite, sycl: add tests for stepping and accessing data elements Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 40/44] testsuite, sycl: add test for 1-D and 2-D parallel_for kernels Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 41/44] testsuite, sycl: add test for scheduler-locking Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 42/44] testsuite, arch, intelgt: add a disassembly test Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 43/44] testsuite, arch, intelgt: add intelgt-program-bp.exp Tankut Baris Aktemur
2025-08-01 9:37 ` [PATCH v3 44/44] testsuite, sycl: test canceling a stepping flow Tankut Baris Aktemur
2025-09-17 12:43 ` [PATCH v3 00/44] A new target to debug Intel GPUs Aktemur, Tankut Baris
2025-10-14 6:34 ` Aktemur, Tankut Baris
2025-12-08 11:32 ` Aktemur, Tankut Baris
2025-12-09 21:30 ` Simon Marchi
2025-12-19 12:52 ` Aktemur, Tankut Baris
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