[PATCH 0/8] AARCH64 SVE: Initial SVE support

[Alan Hayward <alan.hayward@arm.com>]

Hi,

I'd like to submit GDB and gdbserver support for ARM's Scalable Vector
Extension (SVE).

For more details about the extension itself, please see Nigel's blog post
at:

  
https://community.arm.com/groups/processors/blog/2016/08/22/technology-upda
te-the-scalable-vector-extension-sve-for-the-armv8-a-architecture

Francesco has also written a white paper about programming for SVE,
with some worked examples:

  http://developer.arm.com/hpc/a-sneak-peek-into-sve-and-vla-programming

In order to support SVE, GDB needs to be able to handle registers which may
change size at any time whilst the debugged program is running. The target
architecture descriptions (patch 5) contain a minimum size for each
variable
register. GDB (patch 7) and gdbserver (patch 8) must then scale these
registers
using the current VG for the target (obtained using ptrace).
This also requires increasing the maximum register size to 256 bytes
(patch 1).

For these sets of patches to work, Linux Kernel support also needs adding,
which is currently under review here:
  
http://archive.arm.linux.org.uk/lurker/message/20161125.193848.bec98fed.en.
html
Without kernel support, the code will safely fall back to non-SVE Aarch64.

These patches assume the vector length the same across a process, which is
consistant with the current Kernel implementation. Once support is added to
the kernel for independent vector lengths per thread, then further patches
will be required to allow a different target descriptor for each thread.


Thanks,
Alan Hayward.