Re: [PATCH] RISC-V: Don't decrement pc after break.

[Jim Wilson <jimw@sifive.com>]

On Mon, Jul 23, 2018 at 3:30 AM, Sebastian Huber
<sebastian.huber@embedded-brains.de> wrote:
> Hello Jim,
>
> this patch broke debugging with Qemu (qemu-system-riscv64, Git commit
> 6598f0cdad6acc6674c4f060fa46e537228c2c47).  The GDB error message is:
>
> Register 3921 is not available

I don't understand how rtems debugging could have worked without this
patch.  3921 minus 65 in hex is 0xf10 which is the legacy misa.  The
legacy misa is checked only if a read of the v1.9.1 misa fails.  If
the read of both the v1.9.1 misa and the legacy misa fails, then you
get a confusing error stating that register 3921 is not available.
But the real problem is that both misa reads failed.  The ISA spec
says that misa must exist and be readable, although an implementation
is allowed to return 0 when it is read.  Gdb uses misa to determine
target features.  Gdb does handle the 0 read case by deducing info
from ELF header flags instead of the misa register.

If you have a rtems target support, then it must handle reading the
misa register.  If is OK to just return 0.  That is what my linux port
does for now.  At some point I may try adding a linux kernel patch to
add ptrace support for reading misa.  If rtems is running in machine
mode, you can probably read misa directly.  Otherwise, you would need
something like a linux ptrace to read it.  For embedded targets using
openocd, they can just read misa directly.

The problem with misa is easy to miss, as gdb only tries to read misa
if you execute a command that requires info about the target, such as
trying to use hardware floating point.  Actually, one of my other
patches, the one to remove the pc decrement after a break, modified
the code so that we try to read misa when checking to see if
compressed breakpoints could be used.  Before it was only checking ELF
headers for this, which wasn't right.  This is probably the patch that
exposed the bug in your rtems target support.

Jim